diff --git a/BCDLite/klayout/lvs/rule_decks/bjt_connections.lvs b/BCDLite/klayout/lvs/rule_decks/bjt_connections.lvs
index 5d1e477..fb5dcec 100644
--- a/BCDLite/klayout/lvs/rule_decks/bjt_connections.lvs
+++ b/BCDLite/klayout/lvs/rule_decks/bjt_connections.lvs
@@ -38,10 +38,10 @@
 connect(npn_00p54x08p00_b, contact)
 connect(npn_00p54x08p00_c, contact)
 
-# npn_00p54x02p00 nodes connections
-connect(npn_00p54x02p00_e, contact)
-connect(npn_00p54x02p00_b, contact)
-connect(npn_00p54x02p00_c, contact)
+# npn_00p54x04p00 nodes connections
+connect(npn_00p54x04p00_e, contact)
+connect(npn_00p54x04p00_b, contact)
+connect(npn_00p54x04p00_c, contact)
 
 # ==============
 # ---- vpnp ----
@@ -71,3 +71,4 @@
 connect(pnp_00p42x05p00_06v0_e, contact)
 connect(pnp_00p42x05p00_06v0_b, contact)
 connect(pnp_00p42x05p00_06v0_c, contact)
+
diff --git a/BCDLite/klayout/lvs/rule_decks/bjt_derivations.lvs b/BCDLite/klayout/lvs/rule_decks/bjt_derivations.lvs
index 21e4a69..a18c1c5 100644
--- a/BCDLite/klayout/lvs/rule_decks/bjt_derivations.lvs
+++ b/BCDLite/klayout/lvs/rule_decks/bjt_derivations.lvs
@@ -33,9 +33,9 @@
                         .or(swfet_mk).or(mom_mk).or(hvnddd).or(hvpddd).or(hvpolyrs).or(ldmos_xtor)
 
 # vnpn general nodes DERIVATIONS
-vnpn_e = ncomp_mv.interacting(lvs_bjt).and(dnwell).and(dualgate2_d).not(bjt_exclude_layers)
-vnpn_b = pcomp_mv.and(drc_bjt).and(lvpwell).and(dnwell).and(dualgate2_d).not(bjt_exclude_layers)
-vnpn_c = ncomp_mv.and(drc_bjt).not(lvs_bjt).and(dnwell).and(dualgate2_d).not(bjt_exclude_layers)
+vnpn_e = ncomp.interacting(lvs_bjt).and(dnwell).and(dualgate2_d).not(bjt_exclude_layers)
+vnpn_b = pcomp.and(drc_bjt).and(lvpwell).and(dnwell).and(dualgate2_d).not(bjt_exclude_layers)
+vnpn_c = ncomp.and(drc_bjt).not(lvs_bjt).and(dnwell).and(dualgate2_d).not(bjt_exclude_layers)
 
 # npn_05p00x05p00 nodes DERIVATIONS
 npn_05p00x05p00_e = vnpn_e.with_area(24.5.um, 25.5.um).interacting(vnpn_e.edges.with_length(4.8.um, 5.2.um))
@@ -52,10 +52,10 @@
 npn_00p54x08p00_b = vnpn_b.interacting(vnpn_b.extents.interacting(npn_00p54x08p00_e))
 npn_00p54x08p00_c = vnpn_c.interacting(vnpn_c.extents.interacting(npn_00p54x08p00_e))
 
-# npn_00p54x02p00 nodes DERIVATIONS
-npn_00p54x02p00_e = vnpn_e.with_area(0.8.um, 1.5.um).interacting(vnpn_e.edges.with_length(1.8.um, 2.2.um))
-npn_00p54x02p00_b = vnpn_b.interacting(vnpn_b.extents.interacting(npn_00p54x02p00_e))
-npn_00p54x02p00_c = vnpn_c.interacting(vnpn_c.extents.interacting(npn_00p54x02p00_e))
+# npn_00p54x04p00 nodes DERIVATIONS
+npn_00p54x04p00_e = vnpn_e.with_area(1.5.um, 2.5.um).interacting(vnpn_e.edges.with_length(3.8.um, 4.2.um))
+npn_00p54x04p00_b = vnpn_b.interacting(vnpn_b.extents.interacting(npn_00p54x04p00_e))
+npn_00p54x04p00_c = vnpn_c.interacting(vnpn_c.extents.interacting(npn_00p54x04p00_e))
 
 # ==============
 # ---- vpnp ----
@@ -63,9 +63,9 @@
 logger.info('Starting vpnp layers DERIVATIONS')
 
 # vpnp general nodes DERIVATIONS
-vpnp_e = pcomp_mv.and(nwell).interacting(lvs_bjt).not(dnwell).and(dualgate2_d).not(bjt_exclude_layers)
-vpnp_b = ncomp_mv.and(nwell).and(drc_bjt).not(dnwell).and(dualgate2_d).not(bjt_exclude_layers)
-vpnp_c = ptap_mv.not(lvs_bjt).and(drc_bjt).not(dnwell).and(dualgate2_d).not(bjt_exclude_layers)
+vpnp_e = pcomp.and(nwell).interacting(lvs_bjt).not(dnwell).and(dualgate2_d).not(bjt_exclude_layers)
+vpnp_b = ncomp.and(nwell).and(drc_bjt).not(dnwell).and(dualgate2_d).not(bjt_exclude_layers)
+vpnp_c = ptap.not(lvs_bjt).and(drc_bjt).not(dnwell).and(dualgate2_d).not(bjt_exclude_layers)
 
 # pnp_10p00x10p00_06v0 nodes DERIVATIONS
 pnp_10p00x10p00_06v0_e = vpnp_e.with_area(99.5.um, 100.5.um).interacting(vpnp_e.edges.with_length(9.8.um, 10.2.um))
diff --git a/BCDLite/klayout/lvs/rule_decks/bjt_extraction.lvs b/BCDLite/klayout/lvs/rule_decks/bjt_extraction.lvs
index 775eed1..216946d 100644
--- a/BCDLite/klayout/lvs/rule_decks/bjt_extraction.lvs
+++ b/BCDLite/klayout/lvs/rule_decks/bjt_extraction.lvs
@@ -25,10 +25,9 @@
 # ====================
 logger.info('Starting vnpn BJT EXTRACTION')
 
-# vnpn_5x5 BJT
-ignore_parameter('vnpn_5x5', 'AE')
-logger.info('Extracting vnpn_5x5 BJT')
-extract_devices(bjt4('vnpn_5x5'), { 'C' => npn_05p00x05p00_c.extents,
+# npn_05p00x05p00 [vnpn_5x5] BJT
+logger.info('Extracting npn_05p00x05p00 BJT')
+extract_devices(bjt4('npn_05p00x05p00'), { 'C' => npn_05p00x05p00_c.extents,
                                            'B' => npn_05p00x05p00_b.extents,
                                            'E' => npn_05p00x05p00_e,
                                            'S' => sub.extents,
@@ -36,11 +35,11 @@
                                            'tB' => npn_05p00x05p00_b,
                                            'tE' => npn_05p00x05p00_e,
                                            'tS' => sub })
+ignore_parameter('npn_05p00x05p00', 'AE')
 
-# vnpn_0p54x16 BJT
-ignore_parameter('vnpn_0p54x16', 'AE')
-logger.info('Extracting vnpn_0p54x16 BJT')
-extract_devices(bjt4('vnpn_0p54x16'), { 'C' => npn_00p54x16p00_c.extents,
+# npn_00p54x16p00 [vnpn_0p54x16] BJT
+logger.info('Extracting npn_00p54x16p00 BJT')
+extract_devices(bjt4('npn_00p54x16p00'), { 'C' => npn_00p54x16p00_c.extents,
                                            'B' => npn_00p54x16p00_b.extents,
                                            'E' => npn_00p54x16p00_e,
                                            'S' => sub.extents,
@@ -48,11 +47,11 @@
                                            'tB' => npn_00p54x16p00_b,
                                            'tE' => npn_00p54x16p00_e,
                                            'tS' => sub })
+ignore_parameter('npn_00p54x16p00', 'AE')
 
-# vnpn_0p54x8 BJT
-ignore_parameter('vnpn_0p54x8', 'AE')
-logger.info('Extracting vnpn_0p54x8 BJT')
-extract_devices(bjt4('vnpn_0p54x8'), { 'C' => npn_00p54x08p00_c.extents,
+# npn_00p54x08p00 [vnpn_0p54x8] BJT
+logger.info('Extracting npn_00p54x08p00 BJT')
+extract_devices(bjt4('npn_00p54x08p00'), { 'C' => npn_00p54x08p00_c.extents,
                                            'B' => npn_00p54x08p00_b.extents,
                                            'E' => npn_00p54x08p00_e,
                                            'S' => sub.extents,
@@ -60,69 +59,71 @@
                                            'tB' => npn_00p54x08p00_b,
                                            'tE' => npn_00p54x08p00_e,
                                            'tS' => sub })
+ignore_parameter('npn_00p54x08p00', 'AE')
 
-# vnpn_0p54x2 BJT
-ignore_parameter('vnpn_0p54x2', 'AE')
-logger.info('Extracting vnpn_0p54x2 BJT')
-extract_devices(bjt4('vnpn_0p54x2'), { 'C' => npn_00p54x02p00_c.extents,
-                                           'B' => npn_00p54x02p00_b.extents,
-                                           'E' => npn_00p54x02p00_e,
+# npn_00p54x04p00 [vnpn_0p54x4] BJT
+logger.info('Extracting npn_00p54x04p00 BJT')
+extract_devices(bjt4('npn_00p54x04p00'), { 'C' => npn_00p54x04p00_c.extents,
+                                           'B' => npn_00p54x04p00_b.extents,
+                                           'E' => npn_00p54x04p00_e,
                                            'S' => sub.extents,
-                                           'tC' => npn_00p54x02p00_c,
-                                           'tB' => npn_00p54x02p00_b,
-                                           'tE' => npn_00p54x02p00_e,
+                                           'tC' => npn_00p54x04p00_c,
+                                           'tB' => npn_00p54x04p00_b,
+                                           'tE' => npn_00p54x04p00_e,
                                            'tS' => sub })
+ignore_parameter('npn_00p54x04p00', 'AE')
 
 # ====================
 # ------- vpnp--------
 # ====================
 logger.info('Starting vpnp BJT EXTRACTION')
 
-# vpnp_6p0_10x10 BJT
-ignore_parameter('vpnp_6p0_10x10', 'AE')
-logger.info('Extracting vpnp_6p0_10x10 BJT')
-extract_devices(bjt3('vpnp_6p0_10x10'), { 'C' => pnp_10p00x10p00_06v0_c.extents,
-                                           'B' => pnp_10p00x10p00_06v0_b.extents,
-                                           'E' => pnp_10p00x10p00_06v0_e,
-                                           'tC' => pnp_10p00x10p00_06v0_c,
-                                           'tB' => pnp_10p00x10p00_06v0_b,
-                                           'tE' => pnp_10p00x10p00_06v0_e })
+# pnp_10p00x10p00_06v0 [vpnp_6p0_10x10] BJT
+logger.info('Extracting pnp_10p00x10p00_06v0 BJT')
+extract_devices(bjt3('pnp_10p00x10p00_06v0'), { 'C' => pnp_10p00x10p00_06v0_c.extents,
+                                                'B' => pnp_10p00x10p00_06v0_b.extents,
+                                                'E' => pnp_10p00x10p00_06v0_e,
+                                                'tC' => pnp_10p00x10p00_06v0_c,
+                                                'tB' => pnp_10p00x10p00_06v0_b,
+                                                'tE' => pnp_10p00x10p00_06v0_e })
+ignore_parameter('pnp_10p00x10p00_06v0', 'AE')
 
-# vpnp_6p0_5x5 BJT
-ignore_parameter('vpnp_6p0_5x5', 'AE')
-logger.info('Extracting vpnp_6p0_5x5 BJT')
-extract_devices(bjt3('vpnp_6p0_5x5'), { 'C' => pnp_05p00x05p00_06v0_c.extents,
-                                           'B' => pnp_05p00x05p00_06v0_b.extents,
-                                           'E' => pnp_05p00x05p00_06v0_e,
-                                           'tC' => pnp_05p00x05p00_06v0_c,
-                                           'tB' => pnp_05p00x05p00_06v0_b,
-                                           'tE' => pnp_05p00x05p00_06v0_e })
+# pnp_05p00x05p00_06v0 [vpnp_6p0_5x5] BJT
+logger.info('Extracting pnp_05p00x05p00_06v0 BJT')
+extract_devices(bjt3('pnp_05p00x05p00_06v0'), { 'C' => pnp_05p00x05p00_06v0_c.extents,
+                                                'B' => pnp_05p00x05p00_06v0_b.extents,
+                                                'E' => pnp_05p00x05p00_06v0_e,
+                                                'tC' => pnp_05p00x05p00_06v0_c,
+                                                'tB' => pnp_05p00x05p00_06v0_b,
+                                                'tE' => pnp_05p00x05p00_06v0_e })
+ignore_parameter('pnp_05p00x05p00_06v0', 'AE')
 
-# vpnp_6p0_0p42x20 BJT
-ignore_parameter('vpnp_6p0_0p42x20', 'AE')
-logger.info('Extracting vpnp_6p0_0p42x20 BJT')
-extract_devices(bjt3('vpnp_6p0_0p42x20'), { 'C' => pnp_00p42x20p00_06v0_c.extents,
-                                           'B' => pnp_00p42x20p00_06v0_b.extents,
-                                           'E' => pnp_00p42x20p00_06v0_e,
-                                           'tC' => pnp_00p42x20p00_06v0_c,
-                                           'tB' => pnp_00p42x20p00_06v0_b,
-                                           'tE' => pnp_00p42x20p00_06v0_e })
-# vpnp_6p0_0p42x10 BJT
-ignore_parameter('vpnp_6p0_0p42x10', 'AE')
-logger.info('Extracting vpnp_6p0_0p42x10 BJT')
-extract_devices(bjt3('vpnp_6p0_0p42x10'), { 'C' => pnp_00p42x10p00_06v0_c.extents,
-                                           'B' => pnp_00p42x10p00_06v0_b.extents,
-                                           'E' => pnp_00p42x10p00_06v0_e,
-                                           'tC' => pnp_00p42x10p00_06v0_c,
-                                           'tB' => pnp_00p42x10p00_06v0_b,
-                                           'tE' => pnp_00p42x10p00_06v0_e })
+# pnp_00p42x20p00_06v0 [vpnp_6p0_0p42x20] BJT
+logger.info('Extracting pnp_00p42x20p00_06v0 BJT')
+extract_devices(bjt3('pnp_00p42x20p00_06v0'), { 'C' => pnp_00p42x20p00_06v0_c.extents,
+                                                'B' => pnp_00p42x20p00_06v0_b.extents,
+                                                'E' => pnp_00p42x20p00_06v0_e,
+                                                'tC' => pnp_00p42x20p00_06v0_c,
+                                                'tB' => pnp_00p42x20p00_06v0_b,
+                                                'tE' => pnp_00p42x20p00_06v0_e })
+ignore_parameter('pnp_00p42x20p00_06v0', 'AE')
 
-# vpnp_6p0_0p42x5 BJT
-ignore_parameter('vpnp_6p0_0p42x5', 'AE')
-logger.info('Extracting vpnp_6p0_0p42x5 BJT')
-extract_devices(bjt3('vpnp_6p0_0p42x5'), { 'C' => pnp_00p42x05p00_06v0_c.extents,
-                                           'B' => pnp_00p42x05p00_06v0_b.extents,
-                                           'E' => pnp_00p42x05p00_06v0_e,
-                                           'tC' => pnp_00p42x05p00_06v0_c,
-                                           'tB' => pnp_00p42x05p00_06v0_b,
-                                           'tE' => pnp_00p42x05p00_06v0_e })
+# pnp_00p42x10p00_06v0 [vpnp_6p0_0p42x10] BJT
+logger.info('Extracting pnp_00p42x10p00_06v0 BJT')
+extract_devices(bjt3('pnp_00p42x10p00_06v0'), { 'C' => pnp_00p42x10p00_06v0_c.extents,
+                                                'B' => pnp_00p42x10p00_06v0_b.extents,
+                                                'E' => pnp_00p42x10p00_06v0_e,
+                                                'tC' => pnp_00p42x10p00_06v0_c,
+                                                'tB' => pnp_00p42x10p00_06v0_b,
+                                                'tE' => pnp_00p42x10p00_06v0_e })
+ignore_parameter('pnp_00p42x10p00_06v0', 'AE')
+
+# pnp_00p42x05p00_06v0 [vpnp_6p0_0p42x5] BJT
+logger.info('Extracting pnp_00p42x05p00_06v0 BJT')
+extract_devices(bjt3('pnp_00p42x05p00_06v0'), { 'C' => pnp_00p42x05p00_06v0_c.extents,
+                                                'B' => pnp_00p42x05p00_06v0_b.extents,
+                                                'E' => pnp_00p42x05p00_06v0_e,
+                                                'tC' => pnp_00p42x05p00_06v0_c,
+                                                'tB' => pnp_00p42x05p00_06v0_b,
+                                                'tE' => pnp_00p42x05p00_06v0_e })
+ignore_parameter('pnp_00p42x05p00_06v0', 'AE')
diff --git a/BCDLite/klayout/lvs/rule_decks/general_derivations.lvs b/BCDLite/klayout/lvs/rule_decks/general_derivations.lvs
index 93e36ca..481531b 100644
--- a/BCDLite/klayout/lvs/rule_decks/general_derivations.lvs
+++ b/BCDLite/klayout/lvs/rule_decks/general_derivations.lvs
@@ -28,21 +28,17 @@
 pcomp           = comp.and(pplus)
 tgate           = poly2.and(comp).not(res_mk)
 
-ncomp_mv        = ncomp.and(dualgate2_d)
-pcomp_mv        = pcomp.and(dualgate2_d)
-
 nactive         = ncomp.not(all_nwell)
 nactive_pw      = ncomp.not(all_nwell_pw)
 ngate           = nactive.and(tgate)
 ngate_pw        = nactive_pw.and(tgate)
 nsd             = nactive.interacting(ngate).not(ngate).not(res_mk)
-ptap            = pcomp.not(all_nwell).not(res_mk)
-ptap_mv         = ptap.and(dualgate2_d)
+ptap            = pcomp.not(all_nwell_pw).not(res_mk)
 
 pactive         = pcomp.and(all_nwell)
 pgate           = pactive.and(tgate)
 psd             = pactive.interacting(pgate).not(pgate).not(res_mk)
-ntap            = ncomp.and(all_nwell).not(res_mk)
+ntap            = ncomp.and(all_nwell_pw).not(res_mk)
 
 ngate_dn        = ngate.and(dnwell_p)
 ptap_dn         = ptap.and(dnwell_p).outside(well_diode_mk)
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/npn_00p54x04p00.gds b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/npn_00p54x04p00.gds
new file mode 100644
index 0000000..320b56f
--- /dev/null
+++ b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/npn_00p54x04p00.gds
Binary files differ
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vnpn_0p54x8.gds b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/npn_00p54x08p00.gds
similarity index 73%
rename from BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vnpn_0p54x8.gds
rename to BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/npn_00p54x08p00.gds
index 84d711b..60d2cfb 100644
--- a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vnpn_0p54x8.gds
+++ b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/npn_00p54x08p00.gds
Binary files differ
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vnpn_0p54x16.gds b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/npn_00p54x16p00.gds
similarity index 67%
rename from BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vnpn_0p54x16.gds
rename to BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/npn_00p54x16p00.gds
index 4a91319..1571b21 100644
--- a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vnpn_0p54x16.gds
+++ b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/npn_00p54x16p00.gds
Binary files differ
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/npn_05p00x05p00.gds b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/npn_05p00x05p00.gds
new file mode 100644
index 0000000..126a029
--- /dev/null
+++ b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/npn_05p00x05p00.gds
Binary files differ
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vpnp_6p0_0p42x5.gds b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_00p42x05p00_06v0.gds
similarity index 96%
rename from BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vpnp_6p0_0p42x5.gds
rename to BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_00p42x05p00_06v0.gds
index b2b60fc..de8d33d 100644
--- a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vpnp_6p0_0p42x5.gds
+++ b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_00p42x05p00_06v0.gds
Binary files differ
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vpnp_6p0_0p42x10.gds b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_00p42x10p00_06v0.gds
similarity index 95%
rename from BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vpnp_6p0_0p42x10.gds
rename to BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_00p42x10p00_06v0.gds
index f6474e6..d0fb1d2 100644
--- a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vpnp_6p0_0p42x10.gds
+++ b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_00p42x10p00_06v0.gds
Binary files differ
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_00p42x20p00_06v0.gds b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_00p42x20p00_06v0.gds
new file mode 100644
index 0000000..8ccd893
--- /dev/null
+++ b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_00p42x20p00_06v0.gds
Binary files differ
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vpnp_6p0_5x5.gds b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_05p00x05p00_06v0.gds
similarity index 75%
rename from BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vpnp_6p0_5x5.gds
rename to BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_05p00x05p00_06v0.gds
index 2ea4827..4ae5c69 100644
--- a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vpnp_6p0_5x5.gds
+++ b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_05p00x05p00_06v0.gds
Binary files differ
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vpnp_6p0_10x10.gds b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_10p00x10p00_06v0.gds
similarity index 74%
rename from BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vpnp_6p0_10x10.gds
rename to BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_10p00x10p00_06v0.gds
index 83d1ce6..bfeb0d0 100644
--- a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vpnp_6p0_10x10.gds
+++ b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_10p00x10p00_06v0.gds
Binary files differ
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vnpn_0p54x2.gds b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vnpn_0p54x2.gds
deleted file mode 100644
index 7b26685..0000000
--- a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vnpn_0p54x2.gds
+++ /dev/null
Binary files differ
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vnpn_5x5.gds b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vnpn_5x5.gds
deleted file mode 100644
index 1ad6cdd..0000000
--- a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vnpn_5x5.gds
+++ /dev/null
Binary files differ
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vpnp_6p0_0p42x20.gds b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vpnp_6p0_0p42x20.gds
deleted file mode 100644
index 692ccc1..0000000
--- a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/layout/vpnp_6p0_0p42x20.gds
+++ /dev/null
Binary files differ
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vnpn_0p54x16.cdl b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/npn_00p54x04p00.cdl
similarity index 76%
copy from BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vnpn_0p54x16.cdl
copy to BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/npn_00p54x04p00.cdl
index 35213d6..e50924d 100644
--- a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vnpn_0p54x16.cdl
+++ b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/npn_00p54x04p00.cdl
@@ -2,9 +2,9 @@
 * auCdl Netlist:
 * 
 * Library Name:  TCG_Library
-* Top Cell Name: vnpn_0p54x16
+* Top Cell Name: npn_00p54x04p00
 * View Name:     schematic
-* Netlisted on:  Nov 24 10:25:03 2021
+* Netlisted on:  Nov 24 10:22:13 2021
 ************************************************************************
 
 *.BIPOLAR
@@ -22,13 +22,12 @@
 
 ************************************************************************
 * Library Name: TCG_Library
-* Cell Name:    vnpn_0p54x16
+* Cell Name:    npn_00p54x04p00
 * View Name:    schematic
 ************************************************************************
 
-.SUBCKT vnpn_0p54x16 I1_default_B I1_default_C I1_default_E I1_default_S
+.SUBCKT npn_00p54x04p00 I1_default_B I1_default_C I1_default_E I1_default_S
 *.PININFO I1_default_B:I I1_default_C:I I1_default_E:I I1_default_S:I
-QI1_default I1_default_C I1_default_B I1_default_E I1_default_S vnpn_0p54x16 
-+ m=1
+QI1_default I1_default_C I1_default_B I1_default_E I1_default_S npn_00p54x04p00 m=1
 .ENDS
 
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vnpn_0p54x8.cdl b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/npn_00p54x08p00.cdl
similarity index 81%
rename from BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vnpn_0p54x8.cdl
rename to BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/npn_00p54x08p00.cdl
index ef185ba..20bfa6c 100644
--- a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vnpn_0p54x8.cdl
+++ b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/npn_00p54x08p00.cdl
@@ -2,7 +2,7 @@
 * auCdl Netlist:
 * 
 * Library Name:  TCG_Library
-* Top Cell Name: vnpn_0p54x8
+* Top Cell Name: npn_00p54x08p00
 * View Name:     schematic
 * Netlisted on:  Nov 24 10:24:33 2021
 ************************************************************************
@@ -22,12 +22,12 @@
 
 ************************************************************************
 * Library Name: TCG_Library
-* Cell Name:    vnpn_0p54x8
+* Cell Name:    npn_00p54x08p00
 * View Name:    schematic
 ************************************************************************
 
-.SUBCKT vnpn_0p54x8 I1_default_B I1_default_C I1_default_E I1_default_S
+.SUBCKT npn_00p54x08p00 I1_default_B I1_default_C I1_default_E I1_default_S
 *.PININFO I1_default_B:I I1_default_C:I I1_default_E:I I1_default_S:I
-QI1_default I1_default_C I1_default_B I1_default_E I1_default_S vnpn_0p54x8 m=1
+QI1_default I1_default_C I1_default_B I1_default_E I1_default_S npn_00p54x08p00 m=1
 .ENDS
 
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vnpn_0p54x16.cdl b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/npn_00p54x16p00.cdl
similarity index 81%
rename from BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vnpn_0p54x16.cdl
rename to BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/npn_00p54x16p00.cdl
index 35213d6..13d3fd5 100644
--- a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vnpn_0p54x16.cdl
+++ b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/npn_00p54x16p00.cdl
@@ -2,7 +2,7 @@
 * auCdl Netlist:
 * 
 * Library Name:  TCG_Library
-* Top Cell Name: vnpn_0p54x16
+* Top Cell Name: npn_00p54x16p00
 * View Name:     schematic
 * Netlisted on:  Nov 24 10:25:03 2021
 ************************************************************************
@@ -22,13 +22,13 @@
 
 ************************************************************************
 * Library Name: TCG_Library
-* Cell Name:    vnpn_0p54x16
+* Cell Name:    npn_00p54x16p00
 * View Name:    schematic
 ************************************************************************
 
-.SUBCKT vnpn_0p54x16 I1_default_B I1_default_C I1_default_E I1_default_S
+.SUBCKT npn_00p54x16p00 I1_default_B I1_default_C I1_default_E I1_default_S
 *.PININFO I1_default_B:I I1_default_C:I I1_default_E:I I1_default_S:I
-QI1_default I1_default_C I1_default_B I1_default_E I1_default_S vnpn_0p54x16 
+QI1_default I1_default_C I1_default_B I1_default_E I1_default_S npn_00p54x16p00 
 + m=1
 .ENDS
 
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vnpn_5x5.cdl b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/npn_05p00x05p00.cdl
similarity index 81%
rename from BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vnpn_5x5.cdl
rename to BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/npn_05p00x05p00.cdl
index d22f81b..2aaf2dc 100644
--- a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vnpn_5x5.cdl
+++ b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/npn_05p00x05p00.cdl
@@ -2,7 +2,7 @@
 * auCdl Netlist:
 * 
 * Library Name:  TCG_Library
-* Top Cell Name: vnpn_5x5
+* Top Cell Name: npn_05p00x05p00
 * View Name:     schematic
 * Netlisted on:  Nov 24 10:26:06 2021
 ************************************************************************
@@ -22,12 +22,12 @@
 
 ************************************************************************
 * Library Name: TCG_Library
-* Cell Name:    vnpn_5x5
+* Cell Name:    npn_05p00x05p00
 * View Name:    schematic
 ************************************************************************
 
-.SUBCKT vnpn_5x5 I1_default_B I1_default_C I1_default_E I1_default_S
+.SUBCKT npn_05p00x05p00 I1_default_B I1_default_C I1_default_E I1_default_S
 *.PININFO I1_default_B:I I1_default_C:I I1_default_E:I I1_default_S:I
-QI1_default I1_default_C I1_default_B I1_default_E I1_default_S vnpn_5x5 m=1
+QI1_default I1_default_C I1_default_B I1_default_E I1_default_S npn_05p00x05p00 m=1
 .ENDS
 
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_0p42x5.cdl b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_00p42x05p00_06v0.cdl
similarity index 74%
copy from BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_0p42x5.cdl
copy to BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_00p42x05p00_06v0.cdl
index 12736c4..eaab824 100644
--- a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_0p42x5.cdl
+++ b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_00p42x05p00_06v0.cdl
@@ -2,7 +2,7 @@
 * auCdl Netlist:
 * 
 * Library Name:  TCG_Library
-* Top Cell Name: vpnp_6p0_0p42x5
+* Top Cell Name: pnp_00p42x05p00_06v0
 * View Name:     schematic
 * Netlisted on:  Nov 24 10:34:45 2021
 ************************************************************************
@@ -22,12 +22,12 @@
 
 ************************************************************************
 * Library Name: TCG_Library
-* Cell Name:    vpnp_6p0_0p42x5
+* Cell Name:    pnp_00p42x05p00_06v0
 * View Name:    schematic
 ************************************************************************
 
-.SUBCKT vpnp_6p0_0p42x5 I1_default_B I1_default_C I1_default_E
+.SUBCKT pnp_00p42x05p00_06v0 I1_default_B I1_default_C I1_default_E
 *.PININFO I1_default_B:I I1_default_C:I I1_default_E:I
-QI1_default I1_default_C I1_default_B I1_default_E vpnp_6p0_0p42x5 m=1
+QI1_default I1_default_C I1_default_B I1_default_E pnp_00p42x05p00_06v0 m=1
 .ENDS
 
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_0p42x5.cdl b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_00p42x10p00_06v0.cdl
similarity index 74%
rename from BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_0p42x5.cdl
rename to BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_00p42x10p00_06v0.cdl
index 12736c4..27d28e5 100644
--- a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_0p42x5.cdl
+++ b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_00p42x10p00_06v0.cdl
@@ -2,7 +2,7 @@
 * auCdl Netlist:
 * 
 * Library Name:  TCG_Library
-* Top Cell Name: vpnp_6p0_0p42x5
+* Top Cell Name: pnp_00p42x10p00_06v0
 * View Name:     schematic
 * Netlisted on:  Nov 24 10:34:45 2021
 ************************************************************************
@@ -22,12 +22,12 @@
 
 ************************************************************************
 * Library Name: TCG_Library
-* Cell Name:    vpnp_6p0_0p42x5
+* Cell Name:    pnp_00p42x10p00_06v0
 * View Name:    schematic
 ************************************************************************
 
-.SUBCKT vpnp_6p0_0p42x5 I1_default_B I1_default_C I1_default_E
+.SUBCKT pnp_00p42x10p00_06v0 I1_default_B I1_default_C I1_default_E
 *.PININFO I1_default_B:I I1_default_C:I I1_default_E:I
-QI1_default I1_default_C I1_default_B I1_default_E vpnp_6p0_0p42x5 m=1
+QI1_default I1_default_C I1_default_B I1_default_E pnp_00p42x10p00_06v0 m=1
 .ENDS
 
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_0p42x5.cdl b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_00p42x20p00_06v0.cdl
similarity index 74%
copy from BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_0p42x5.cdl
copy to BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_00p42x20p00_06v0.cdl
index 12736c4..62f7ae5 100644
--- a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_0p42x5.cdl
+++ b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_00p42x20p00_06v0.cdl
@@ -2,7 +2,7 @@
 * auCdl Netlist:
 * 
 * Library Name:  TCG_Library
-* Top Cell Name: vpnp_6p0_0p42x5
+* Top Cell Name: pnp_00p42x20p00_06v0
 * View Name:     schematic
 * Netlisted on:  Nov 24 10:34:45 2021
 ************************************************************************
@@ -22,12 +22,12 @@
 
 ************************************************************************
 * Library Name: TCG_Library
-* Cell Name:    vpnp_6p0_0p42x5
+* Cell Name:    pnp_00p42x20p00_06v0
 * View Name:    schematic
 ************************************************************************
 
-.SUBCKT vpnp_6p0_0p42x5 I1_default_B I1_default_C I1_default_E
+.SUBCKT pnp_00p42x20p00_06v0 I1_default_B I1_default_C I1_default_E
 *.PININFO I1_default_B:I I1_default_C:I I1_default_E:I
-QI1_default I1_default_C I1_default_B I1_default_E vpnp_6p0_0p42x5 m=1
+QI1_default I1_default_C I1_default_B I1_default_E pnp_00p42x20p00_06v0 m=1
 .ENDS
 
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_0p42x5.cdl b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_05p00x05p00_06v0.cdl
similarity index 74%
copy from BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_0p42x5.cdl
copy to BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_05p00x05p00_06v0.cdl
index 12736c4..479079b 100644
--- a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_0p42x5.cdl
+++ b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_05p00x05p00_06v0.cdl
@@ -2,7 +2,7 @@
 * auCdl Netlist:
 * 
 * Library Name:  TCG_Library
-* Top Cell Name: vpnp_6p0_0p42x5
+* Top Cell Name: pnp_05p00x05p00_06v0
 * View Name:     schematic
 * Netlisted on:  Nov 24 10:34:45 2021
 ************************************************************************
@@ -22,12 +22,12 @@
 
 ************************************************************************
 * Library Name: TCG_Library
-* Cell Name:    vpnp_6p0_0p42x5
+* Cell Name:    pnp_05p00x05p00_06v0
 * View Name:    schematic
 ************************************************************************
 
-.SUBCKT vpnp_6p0_0p42x5 I1_default_B I1_default_C I1_default_E
+.SUBCKT pnp_05p00x05p00_06v0 I1_default_B I1_default_C I1_default_E
 *.PININFO I1_default_B:I I1_default_C:I I1_default_E:I
-QI1_default I1_default_C I1_default_B I1_default_E vpnp_6p0_0p42x5 m=1
+QI1_default I1_default_C I1_default_B I1_default_E pnp_05p00x05p00_06v0 m=1
 .ENDS
 
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_0p42x5.cdl b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_10p00x10p00_06v0.cdl
similarity index 74%
copy from BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_0p42x5.cdl
copy to BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_10p00x10p00_06v0.cdl
index 12736c4..ece20d3 100644
--- a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_0p42x5.cdl
+++ b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_10p00x10p00_06v0.cdl
@@ -2,7 +2,7 @@
 * auCdl Netlist:
 * 
 * Library Name:  TCG_Library
-* Top Cell Name: vpnp_6p0_0p42x5
+* Top Cell Name: pnp_10p00x10p00_06v0
 * View Name:     schematic
 * Netlisted on:  Nov 24 10:34:45 2021
 ************************************************************************
@@ -22,12 +22,12 @@
 
 ************************************************************************
 * Library Name: TCG_Library
-* Cell Name:    vpnp_6p0_0p42x5
+* Cell Name:    pnp_10p00x10p00_06v0
 * View Name:    schematic
 ************************************************************************
 
-.SUBCKT vpnp_6p0_0p42x5 I1_default_B I1_default_C I1_default_E
+.SUBCKT pnp_10p00x10p00_06v0 I1_default_B I1_default_C I1_default_E
 *.PININFO I1_default_B:I I1_default_C:I I1_default_E:I
-QI1_default I1_default_C I1_default_B I1_default_E vpnp_6p0_0p42x5 m=1
+QI1_default I1_default_C I1_default_B I1_default_E pnp_10p00x10p00_06v0 m=1
 .ENDS
 
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vnpn_0p54x2.cdl b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vnpn_0p54x2.cdl
deleted file mode 100644
index a2046bf..0000000
--- a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vnpn_0p54x2.cdl
+++ /dev/null
@@ -1,33 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: vnpn_0p54x2
-* View Name:     schematic
-* Netlisted on:  Nov 24 10:21:29 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    vnpn_0p54x2
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT vnpn_0p54x2 I1_default_B I1_default_C I1_default_E I1_default_S
-*.PININFO I1_default_B:I I1_default_C:I I1_default_E:I I1_default_S:I
-QI1_default I1_default_C I1_default_B I1_default_E I1_default_S vnpn_0p54x2 m=1
-.ENDS
-
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_0p42x10.cdl b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_0p42x10.cdl
deleted file mode 100644
index 2b6a54c..0000000
--- a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_0p42x10.cdl
+++ /dev/null
@@ -1,33 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: vpnp_6p0_0p42x10
-* View Name:     schematic
-* Netlisted on:  Nov 24 10:34:45 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    vpnp_6p0_0p42x10
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT vpnp_6p0_0p42x10 I1_default_B I1_default_C I1_default_E
-*.PININFO I1_default_B:I I1_default_C:I I1_default_E:I
-QI1_default I1_default_C I1_default_B I1_default_E vpnp_6p0_0p42x10 m=1
-.ENDS
-
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_0p42x20.cdl b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_0p42x20.cdl
deleted file mode 100644
index c50226a..0000000
--- a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_0p42x20.cdl
+++ /dev/null
@@ -1,33 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: vpnp_6p0_0p42x20
-* View Name:     schematic
-* Netlisted on:  Nov 24 10:34:45 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    vpnp_6p0_0p42x20
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT vpnp_6p0_0p42x20 I1_default_B I1_default_C I1_default_E
-*.PININFO I1_default_B:I I1_default_C:I I1_default_E:I
-QI1_default I1_default_C I1_default_B I1_default_E vpnp_6p0_0p42x20 m=1
-.ENDS
-
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_10x10.cdl b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_10x10.cdl
deleted file mode 100644
index 5eb6971..0000000
--- a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_10x10.cdl
+++ /dev/null
@@ -1,33 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: vpnp_6p0_10x10
-* View Name:     schematic
-* Netlisted on:  Nov 24 10:34:45 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    vpnp_6p0_10x10
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT vpnp_6p0_10x10 I1_default_B I1_default_C I1_default_E
-*.PININFO I1_default_B:I I1_default_C:I I1_default_E:I
-QI1_default I1_default_C I1_default_B I1_default_E vpnp_6p0_10x10 m=1
-.ENDS
-
diff --git a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_5x5.cdl b/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_5x5.cdl
deleted file mode 100644
index 22dcf35..0000000
--- a/BCDLite/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/vpnp_6p0_5x5.cdl
+++ /dev/null
@@ -1,33 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: vpnp_6p0_5x5
-* View Name:     schematic
-* Netlisted on:  Nov 24 10:34:45 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    vpnp_6p0_5x5
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT vpnp_6p0_5x5 I1_default_B I1_default_C I1_default_E
-*.PININFO I1_default_B:I I1_default_C:I I1_default_E:I
-QI1_default I1_default_C I1_default_B I1_default_E vpnp_6p0_5x5 m=1
-.ENDS
-
diff --git a/IC/klayout/lvs/rule_decks/bjt_connections.lvs b/IC/klayout/lvs/rule_decks/bjt_connections.lvs
index bf3f2c2..31a883b 100644
--- a/IC/klayout/lvs/rule_decks/bjt_connections.lvs
+++ b/IC/klayout/lvs/rule_decks/bjt_connections.lvs
@@ -47,22 +47,17 @@
 connect(pnp_05p00x05p00_b, contact)
 connect(pnp_05p00x05p00_c, contact)
 
-# pnp_05p00x00p42 nodes connections
-connect(pnp_05p00x00p42_e, contact)
-connect(pnp_05p00x00p42_b, contact)
-connect(pnp_05p00x00p42_c, contact)
+# pnp_01p20x02p50 nodes connections
+connect(pnp_01p20x02p50_e, contact)
+connect(pnp_01p20x02p50_b, contact)
+connect(pnp_01p20x02p50_c, contact)
 
-# pnp_1p2x2p5 nodes connections
-connect(pnp_1p2x2p5_e, contact)
-connect(pnp_1p2x2p5_b, contact)
-connect(pnp_1p2x2p5_c, contact)
-
-# pnp_00p46x1p2 nodes connections
-connect(pnp_00p46x1p2_e, contact)
-connect(pnp_00p46x1p2_b, contact)
-connect(pnp_00p46x1p2_c, contact)
+# pnp_00p46x01p20 nodes connections
+connect(pnp_00p46x01p20_e, contact)
+connect(pnp_00p46x01p20_b, contact)
+connect(pnp_00p46x01p20_c, contact)
 
 # pnp_00p46x00p46 nodes connections
 connect(pnp_00p46x00p46_e, contact)
 connect(pnp_00p46x00p46_b, contact)
-connect(pnp_00p46x00p46_c, contact)
\ No newline at end of file
+connect(pnp_00p46x00p46_c, contact)
diff --git a/IC/klayout/lvs/rule_decks/bjt_derivations.lvs b/IC/klayout/lvs/rule_decks/bjt_derivations.lvs
index 00df7ba..689b0e8 100644
--- a/IC/klayout/lvs/rule_decks/bjt_derivations.lvs
+++ b/IC/klayout/lvs/rule_decks/bjt_derivations.lvs
@@ -68,20 +68,15 @@
 pnp_00p46x00p46_b = vpnp_b.interacting(vpnp_b.extents.interacting(pnp_00p46x00p46_e))
 pnp_00p46x00p46_c = vpnp_c.interacting(vpnp_c.extents.interacting(pnp_00p46x00p46_e))
 
-# pnp_00p46x1p2 nodes DERIVATIONS
-pnp_00p46x1p2_e = vpnp_e.with_area(0.5.um, 0.6.um).interacting(vpnp_e.edges.with_length(1.um, 1.4.um))
-pnp_00p46x1p2_b = vpnp_b.interacting(vpnp_b.extents.interacting(pnp_00p46x1p2_e))
-pnp_00p46x1p2_c = vpnp_c.interacting(vpnp_c.extents.interacting(pnp_00p46x1p2_e))
+# pnp_00p46x01p20 nodes DERIVATIONS
+pnp_00p46x01p20_e = vpnp_e.with_area(0.5.um, 0.6.um).interacting(vpnp_e.edges.with_length(1.um, 1.4.um))
+pnp_00p46x01p20_b = vpnp_b.interacting(vpnp_b.extents.interacting(pnp_00p46x01p20_e))
+pnp_00p46x01p20_c = vpnp_c.interacting(vpnp_c.extents.interacting(pnp_00p46x01p20_e))
 
-# pnp_1p2x2p5 nodes DERIVATIONS
-pnp_1p2x2p5_e = vpnp_e.with_area(2.5.um, 3.5.um).interacting(vpnp_e.edges.with_length(2.3.um, 2.7.um))
-pnp_1p2x2p5_b = vpnp_b.interacting(vpnp_b.extents.interacting(pnp_1p2x2p5_e))
-pnp_1p2x2p5_c = vpnp_c.interacting(vpnp_c.extents.interacting(pnp_1p2x2p5_e))
-
-# pnp_05p00x00p42 nodes DERIVATIONS
-pnp_05p00x00p42_e = vpnp_e.with_area(2.um, 2.2.um).interacting(vpnp_e.edges.with_length(4.8.um, 5.2.um))
-pnp_05p00x00p42_b = vpnp_b.interacting(vpnp_b.extents.interacting(pnp_05p00x00p42_e))
-pnp_05p00x00p42_c = vpnp_c.interacting(vpnp_c.extents.interacting(pnp_05p00x00p42_e))
+# pnp_01p20x02p50 nodes DERIVATIONS
+pnp_01p20x02p50_e = vpnp_e.with_area(2.5.um, 3.5.um).interacting(vpnp_e.edges.with_length(2.3.um, 2.7.um))
+pnp_01p20x02p50_b = vpnp_b.interacting(vpnp_b.extents.interacting(pnp_01p20x02p50_e))
+pnp_01p20x02p50_c = vpnp_c.interacting(vpnp_c.extents.interacting(pnp_01p20x02p50_e))
 
 # pnp_10p00x10p00 nodes DERIVATIONS
 pnp_10p00x10p00_e = vpnp_e.with_area(99.5.um, 100.5.um).interacting(vpnp_e.edges.with_length(9.8.um, 10.2.um))
diff --git a/IC/klayout/lvs/rule_decks/bjt_extraction.lvs b/IC/klayout/lvs/rule_decks/bjt_extraction.lvs
index 6bdd5e7..ab97aac 100644
--- a/IC/klayout/lvs/rule_decks/bjt_extraction.lvs
+++ b/IC/klayout/lvs/rule_decks/bjt_extraction.lvs
@@ -85,34 +85,23 @@
                                            'tB' => pnp_00p46x00p46_b,
                                            'tE' => pnp_00p46x00p46_e })
 
-# pnp_05p00x00p42 BJT
-ignore_parameter('pnp_05p00x00p42', 'AE')
-logger.info('Extracting pnp_05p00x00p42 BJT')
-extract_devices(bjt3('pnp_05p00x00p42'), { 'C' => pnp_05p00x00p42_c.extents,
-                                           'B' => pnp_05p00x00p42_b.extents,
-                                           'E' => pnp_05p00x00p42_e,
-                                           'tC' => pnp_05p00x00p42_c,
-                                           'tB' => pnp_05p00x00p42_b,
-                                           'tE' => pnp_05p00x00p42_e })
+# pnp_00p46x01p20 BJT
+ignore_parameter('pnp_00p46x01p20', 'AE')
+logger.info('Extracting pnp_00p46x01p20 BJT')
+extract_devices(bjt3('pnp_00p46x01p20'), { 'C' => pnp_00p46x01p20_c.extents,
+                                           'B' => pnp_00p46x01p20_b.extents,
+                                           'E' => pnp_00p46x01p20_e,
+                                           'tC' => pnp_00p46x01p20_c,
+                                           'tB' => pnp_00p46x01p20_b,
+                                           'tE' => pnp_00p46x01p20_e })
 
-# pnp_00p46x1p2 BJT
-ignore_parameter('pnp_00p46x1p2', 'AE')
-logger.info('Extracting pnp_00p46x1p2 BJT')
-extract_devices(bjt3('pnp_00p46x1p2'), { 'C' => pnp_00p46x1p2_c.extents,
-                                           'B' => pnp_00p46x1p2_b.extents,
-                                           'E' => pnp_00p46x1p2_e,
-                                           'tC' => pnp_00p46x1p2_c,
-                                           'tB' => pnp_00p46x1p2_b,
-                                           'tE' => pnp_00p46x1p2_e })
-    
-
-# pnp_1p2x2p5 BJT
-ignore_parameter('pnp_1p2x2p5', 'AE')
-logger.info('Extracting pnp_1p2x2p5 BJT')
-extract_devices(bjt3('pnp_1p2x2p5'), { 'C' => pnp_1p2x2p5_c.extents,
-                                           'B' => pnp_1p2x2p5_b.extents,
-                                           'E' => pnp_1p2x2p5_e,
-                                           'tC' => pnp_1p2x2p5_c,
-                                           'tB' => pnp_1p2x2p5_b,
-                                           'tE' => pnp_1p2x2p5_e })
+# pnp_01p20x02p50 BJT
+ignore_parameter('pnp_01p20x02p50', 'AE')
+logger.info('Extracting pnp_01p20x02p50 BJT')
+extract_devices(bjt3('pnp_01p20x02p50'), { 'C' => pnp_01p20x02p50_c.extents,
+                                           'B' => pnp_01p20x02p50_b.extents,
+                                           'E' => pnp_01p20x02p50_e,
+                                           'tC' => pnp_01p20x02p50_c,
+                                           'tB' => pnp_01p20x02p50_b,
+                                           'tE' => pnp_01p20x02p50_e })
 
diff --git a/IC/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_00p46x01p20.gds b/IC/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_00p46x01p20.gds
new file mode 100644
index 0000000..d8e9fea
--- /dev/null
+++ b/IC/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_00p46x01p20.gds
Binary files differ
diff --git a/IC/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_00p46x1p2.gds b/IC/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_00p46x1p2.gds
deleted file mode 100644
index 9c494e9..0000000
--- a/IC/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_00p46x1p2.gds
+++ /dev/null
Binary files differ
diff --git a/IC/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_1p2x2p5.gds b/IC/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_01p20x02p50.gds
similarity index 66%
rename from IC/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_1p2x2p5.gds
rename to IC/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_01p20x02p50.gds
index 39e2f00..871a5de 100644
--- a/IC/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_1p2x2p5.gds
+++ b/IC/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_01p20x02p50.gds
Binary files differ
diff --git a/IC/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_05p00x00p42.gds b/IC/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_05p00x00p42.gds
deleted file mode 100644
index ce7f5a0..0000000
--- a/IC/klayout/lvs/testing/testcases/unit/bjt_devices/layout/pnp_05p00x00p42.gds
+++ /dev/null
Binary files differ
diff --git a/IC/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_00p46x1p2.cdl b/IC/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_00p46x01p20.cdl
similarity index 75%
rename from IC/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_00p46x1p2.cdl
rename to IC/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_00p46x01p20.cdl
index 0a21b22..f24d8b4 100644
--- a/IC/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_00p46x1p2.cdl
+++ b/IC/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_00p46x01p20.cdl
@@ -2,7 +2,7 @@
 * auCdl Netlist:
 * 
 * Library Name:  TCG_Library
-* Top Cell Name: pnp_00p46x1p2
+* Top Cell Name: pnp_00p46x01p20
 * View Name:     schematic
 * Netlisted on:  Nov 24 10:29:25 2021
 ************************************************************************
@@ -22,12 +22,12 @@
 
 ************************************************************************
 * Library Name: TCG_Library
-* Cell Name:    pnp_00p46x1p2
+* Cell Name:    pnp_00p46x01p20
 * View Name:    schematic
 ************************************************************************
 
-.SUBCKT pnp_00p46x1p2 I1_default_B I1_default_C I1_default_E
+.SUBCKT pnp_00p46x01p20 I1_default_B I1_default_C I1_default_E
 *.PININFO I1_default_B:I I1_default_C:I I1_default_E:I
-QI1_default I1_default_C I1_default_B I1_default_E pnp_00p46x1p2 m=1
+QI1_default I1_default_C I1_default_B I1_default_E pnp_00p46x01p20 m=1
 .ENDS
 
diff --git a/IC/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_00p46x1p2.cdl b/IC/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_01p20x02p50.cdl
similarity index 75%
copy from IC/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_00p46x1p2.cdl
copy to IC/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_01p20x02p50.cdl
index 0a21b22..3bf7511 100644
--- a/IC/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_00p46x1p2.cdl
+++ b/IC/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_01p20x02p50.cdl
@@ -2,7 +2,7 @@
 * auCdl Netlist:
 * 
 * Library Name:  TCG_Library
-* Top Cell Name: pnp_00p46x1p2
+* Top Cell Name: pnp_01p20x02p50
 * View Name:     schematic
 * Netlisted on:  Nov 24 10:29:25 2021
 ************************************************************************
@@ -22,12 +22,12 @@
 
 ************************************************************************
 * Library Name: TCG_Library
-* Cell Name:    pnp_00p46x1p2
+* Cell Name:    pnp_01p20x02p50
 * View Name:    schematic
 ************************************************************************
 
-.SUBCKT pnp_00p46x1p2 I1_default_B I1_default_C I1_default_E
+.SUBCKT pnp_01p20x02p50 I1_default_B I1_default_C I1_default_E
 *.PININFO I1_default_B:I I1_default_C:I I1_default_E:I
-QI1_default I1_default_C I1_default_B I1_default_E pnp_00p46x1p2 m=1
+QI1_default I1_default_C I1_default_B I1_default_E pnp_01p20x02p50 m=1
 .ENDS
 
diff --git a/IC/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_05p00x00p42.cdl b/IC/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_05p00x00p42.cdl
deleted file mode 100644
index 1693b2d..0000000
--- a/IC/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_05p00x00p42.cdl
+++ /dev/null
@@ -1,33 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: pnp_05p00x00p42
-* View Name:     schematic
-* Netlisted on:  Nov 24 10:29:25 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    pnp_05p00x00p42
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT pnp_05p00x00p42 I1_default_B I1_default_C I1_default_E
-*.PININFO I1_default_B:I I1_default_C:I I1_default_E:I
-QI1_default I1_default_C I1_default_B I1_default_E pnp_05p00x00p42 m=1
-.ENDS
-
diff --git a/IC/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_1p2x2p5.cdl b/IC/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_1p2x2p5.cdl
deleted file mode 100644
index 420a510..0000000
--- a/IC/klayout/lvs/testing/testcases/unit/bjt_devices/netlist/pnp_1p2x2p5.cdl
+++ /dev/null
@@ -1,33 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: pnp_1p2x2p5
-* View Name:     schematic
-* Netlisted on:  Nov 24 10:29:25 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    pnp_1p2x2p5
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT pnp_1p2x2p5 I1_default_B I1_default_C I1_default_E
-*.PININFO I1_default_B:I I1_default_C:I I1_default_E:I
-QI1_default I1_default_C I1_default_B I1_default_E pnp_1p2x2p5 m=1
-.ENDS
-
diff --git a/ULL/klayout/lvs/gf180ULL.lvs b/ULL/klayout/lvs/gf180ULL.lvs
index 6b85d97..4f6b68c 100644
--- a/ULL/klayout/lvs/gf180ULL.lvs
+++ b/ULL/klayout/lvs/gf180ULL.lvs
@@ -258,6 +258,7 @@
 # ------ DIODE DERIVATIONS --------
 #================================
 
+# %include 'rule_decks/diode_derivations.lvs'
 
 #================================
 # ------ MOSCAP DERIVATIONS -----
@@ -311,6 +312,7 @@
 # ------- Diode EXTRACTION ------
 #================================
 
+# %include 'rule_decks/diode_extraction.lvs'
 
 #================================
 # ------- MOSCAP EXTRACTION -----
diff --git a/ULL/klayout/lvs/rule_decks/devices_connections.lvs b/ULL/klayout/lvs/rule_decks/devices_connections.lvs
index 7758b14..643254b 100644
--- a/ULL/klayout/lvs/rule_decks/devices_connections.lvs
+++ b/ULL/klayout/lvs/rule_decks/devices_connections.lvs
@@ -36,6 +36,7 @@
 # ----- DIODE CONNECTIONS -------
 #================================
 
+# %include diode_connections.lvs
 
 #================================
 # ---- Varactor CONNECTIONS -----
diff --git a/ULL/klayout/lvs/rule_decks/diode_connections.lvs b/ULL/klayout/lvs/rule_decks/diode_connections.lvs
index 6b1aabc..e5b640d 100644
--- a/ULL/klayout/lvs/rule_decks/diode_connections.lvs
+++ b/ULL/klayout/lvs/rule_decks/diode_connections.lvs
@@ -36,40 +36,30 @@
 # diode_pn_1p8_dw
 connect(diode_pn_1p8_dw_terminal_p, contact)
 
-#================================
-# ---- MV DIODE DERIVATIONS ----
-#================================
-
 # diode_np_3p3
 connect(diode_np_3p3_terminal_n, contact)
 
-# diode_pn_3p3
-connect(diode_pn_3p3_terminal_p, contact)
-
 # diode_np_3p3_dw
 connect(diode_np_3p3_dw_terminal_n, contact)
 
+# diode_pn_3p3
+connect(diode_pn_3p3_terminal_p, contact)
+
 # diode_pn_3p3_dw
 connect(diode_pn_3p3_dw_terminal_p, contact)
 
+#================================
+# ---- MV DIODE DERIVATIONS ----
+#================================
+
 # diode_np_6p0
 connect(diode_np_6p0_terminal_n, contact)
 
-# diode_pn_6p0
-connect(diode_pn_6p0_terminal_p, contact)
-
 # diode_np_6p0_dw
 connect(diode_np_6p0_dw_terminal_n, contact)
 
+# diode_pn_6p0
+connect(diode_pn_6p0_terminal_p, contact)
+
 # diode_pn_6p0_dw
 connect(diode_pn_6p0_dw_terminal_p, contact)
-
-# diode_nwp_6p0
-connect(diode_nwp_6p0_terminal_n, nwell)
-connect(diode_nwp_6p0_terminal_p, contact)
-
-# diode_dnwpw
-connect(diode_dnwpw_terminal_p, contact)
-
-# diode_dnwps
-connect(diode_dnwps_terminal_p, contact)
\ No newline at end of file
diff --git a/ULL/klayout/lvs/rule_decks/diode_derivations.lvs b/ULL/klayout/lvs/rule_decks/diode_derivations.lvs
index 5ed24bc..c6f0c46 100644
--- a/ULL/klayout/lvs/rule_decks/diode_derivations.lvs
+++ b/ULL/klayout/lvs/rule_decks/diode_derivations.lvs
@@ -20,83 +20,60 @@
 
 logger.info('Starting DIODE DERIVATIONS')
 
+#========================
+# ---- DIODE EXCLUDE ----
+#========================
+
+diode_exclude = lvs_bjt.join(drc_bjt).join(sab).join(esd).join(resistor).join(fusetop).join(polyfuse)
+.join(cap_mk).join(nat).join(fhres).join(fusewindow_d)
+.join(piscap).join(mos_cap_mk).join(mim_l_mk).join(res_mk)
+
+d_ncomp_lv = ncomp.not(nwell).not(v5_xtor).and(diode_mk).not(dv2)
+d_pcomp_lv = pcomp.and(nwell).not(v5_xtor).and(diode_mk).not(dv2)
+
+d_ncomp_mv = ncomp.not(nwell).not(v5_xtor).and(diode_mk).not(dualgate).and(dv2)
+d_pcomp_mv = pcomp.and(nwell).not(v5_xtor).and(diode_mk).not(dualgate).and(dv2)
+
 #================================
 # ---- LV DIODE DERIVATIONS ----
 #================================
 
 # diode_np_1p8 (Model for 1.8V N+/Pwell diode outside DNWell)
-diode_np_1p8_terminal_n = ncomp.outside(dnwell).outside(nwell).not(v5_xtor).not(dualgate).interacting(diode_mk).not(dv2)
-                                .not(lvs_bjt).not(drc_bjt).not(sab).not(esd).not(resistor).not(fusetop).not(polyfuse)
-                                .not_interacting(cap_mk).not(nat).outside(fhres).not(fusewindow_d)
-                                .not(piscap).not_interacting(mos_cap_mk).not_interacting(mim_l_mk).not(res_mk)
+diode_np_1p8_terminal_n = d_ncomp_lv.not(dnwell).not(dualgate)
 
 # diode_np_1p8_dw (Model for 1.8V N+/Pwell diode inside DNWell)
-diode_np_1p8_dw_terminal_n = ncomp.inside(dnwell).outside(nwell).not(v5_xtor).not(dualgate).interacting(diode_mk).not(dv2)
-                                .not(lvs_bjt).not(drc_bjt).not(sab).not(esd).not(resistor).not(fusetop).not(polyfuse)
-                                .not_interacting(cap_mk).not(nat).outside(fhres).not(fusewindow_d)
-                                .not(piscap).not_interacting(mos_cap_mk).not_interacting(mim_l_mk).not(res_mk)
+diode_np_1p8_dw_terminal_n = d_ncomp_lv.and(dnwell).not(dualgate)
 
 # diode_pn_1p8 (Model for 1.8V P+/Nwell diode outside DNWell)
-diode_pn_1p8_terminal_p = pcomp.outside(dnwell).inside(nwell).not(v5_xtor).not(dualgate).interacting(diode_mk).not(dv2)
-                                .not(lvs_bjt).not(drc_bjt).not(sab).not(esd).not(resistor).not(fusetop).not(polyfuse)
-                                .not_interacting(cap_mk).not(nat).outside(fhres).not(fusewindow_d)
-                                .not(piscap).not_interacting(mos_cap_mk).not_interacting(mim_l_mk).not(res_mk)
+diode_pn_1p8_terminal_p = d_pcomp_lv.not(dnwell).not(dualgate)
 
 # diode_pn_1p8_dw (Model for 1.8V P+/Nwell diode inside DNWell)
-diode_pn_1p8_dw_terminal_p = pcomp.inside(dnwell).inside(nwell).not(v5_xtor).not(dualgate).interacting(diode_mk).not(dv2)
-                                .not(lvs_bjt).not(drc_bjt).not(sab).not(esd).not(resistor).not(fusetop).not(polyfuse)
-                                .not_interacting(cap_mk).not(nat).outside(fhres).not(fusewindow_d)
-                                .not(piscap).not_interacting(mos_cap_mk).not_interacting(mim_l_mk).not(res_mk)
+diode_pn_1p8_dw_terminal_p = d_pcomp_lv.and(dnwell).not(dualgate)
 
+# diode_np_3p3 (Model for 3.3V N+/Pwell diode outside DNwell)
+diode_np_3p3_terminal_n = d_ncomp_lv.not(dnwell).and(dualgate)
 
+# diode_np_3p3_dw (Model for 3.3V N+/Pwell diode inside DNwell)
+diode_np_3p3_dw_terminal_n = d_ncomp_lv.and(dnwell).and(dualgate)
+
+# diode_pn_3p3 (Model for 3.3V P+/Nwell diode outside DNwell)
+diode_pn_3p3_terminal_p = d_pcomp_lv.not(dnwell).and(dualgate)
+
+# diode_pn_3p3_dw (Model for 3.3V P+/Nwell diode inside DNwell)
+diode_pn_3p3_dw_terminal_p = d_pcomp_lv.and(dnwell).and(dualgate)
+          
 #================================
 # ---- MV DIODE DERIVATIONS ----
 #================================
 
-# diode_np_3p3 (Model for 3.3V N+/Pwell diode outside DNwell)
-diode_np_3p3_terminal_n = ncomp.outside(dnwell).outside(nwell).not(v5_xtor).inside(dualgate).interacting(diode_mk).not(dv2)
-                                .not(lvs_bjt).not(drc_bjt).not(sab).not(esd).not(resistor).not(fusetop).not(polyfuse)
-                                .not_interacting(cap_mk).not(nat).outside(fhres).not(fusewindow_d)
-                                .not(piscap).not_interacting(mos_cap_mk).not_interacting(mim_l_mk).not(res_mk)
-
-# diode_pn_3p3 (Model for 3.3V P+/Nwell diode outside DNwell)
-diode_pn_3p3_terminal_p = pcomp.outside(dnwell).inside(nwell).not(v5_xtor).inside(dualgate).interacting(diode_mk).not(dv2)
-                                .not(lvs_bjt).not(drc_bjt).not(sab).not(esd).not(resistor).not(fusetop).not(polyfuse)
-                                .not_interacting(cap_mk).not(nat).outside(fhres).not(fusewindow_d)
-                                .not(piscap).not_interacting(mos_cap_mk).not_interacting(mim_l_mk).not(res_mk)
-
-# diode_np_3p3_dw (Model for 3.3V N+/Pwell diode inside DNwell)
-diode_np_3p3_dw_terminal_n = ncomp.inside(dnwell).outside(nwell).not(v5_xtor).inside(dualgate).interacting(diode_mk).not(dv2)
-                                .not(lvs_bjt).not(drc_bjt).not(sab).not(esd).not(resistor).not(fusetop).not(polyfuse)
-                                .not_interacting(cap_mk).not(nat).outside(fhres).not(fusewindow_d)
-                                .not(piscap).not_interacting(mos_cap_mk).not_interacting(mim_l_mk).not(res_mk)
-
-# diode_pn_3p3_dw (Model for 3.3V P+/Nwell diode inside DNwell)
-diode_pn_3p3_dw_terminal_p = pcomp.inside(dnwell).inside(nwell).not(v5_xtor).inside(dualgate).interacting(diode_mk).not(dv2)
-                                .not(lvs_bjt).not(drc_bjt).not(sab).not(esd).not(resistor).not(fusetop).not(polyfuse)
-                                .not_interacting(cap_mk).not(nat).outside(fhres).not(fusewindow_d)
-                                .not(piscap).not_interacting(mos_cap_mk).not_interacting(mim_l_mk).not(res_mk)
-                                
 # diode_np_6p0 (Model for 6V N+/Pwell diode outside Dnwell)
-diode_np_6p0_terminal_n = ncomp.outside(dnwell).outside(nwell).not(v5_xtor).not(dualgate).interacting(diode_mk).inside(dv2)
-                                .not(lvs_bjt).not(drc_bjt).not(sab).not(esd).not(resistor).not(fusetop).not(polyfuse)
-                                .not_interacting(cap_mk).not(nat).outside(fhres).not(fusewindow_d)
-                                .not(piscap).not_interacting(mos_cap_mk).not_interacting(mim_l_mk).not(res_mk)
-
-# diode_pn_6p0 (Model for 6V P+/Nwell diode outside DNwell)
-diode_pn_6p0_terminal_p = pcomp.outside(dnwell).inside(nwell).not(v5_xtor).not(dualgate).interacting(diode_mk).inside(dv2)
-                                .not(lvs_bjt).not(drc_bjt).not(sab).not(esd).not(resistor).not(fusetop).not(polyfuse)
-                                .not_interacting(cap_mk).not(nat).outside(fhres).not(fusewindow_d)
-                                .not(piscap).not_interacting(mos_cap_mk).not_interacting(mim_l_mk).not(res_mk)
+diode_np_6p0_terminal_n = d_ncomp_mv.not(dnwell)
 
 # diode_np_6p0_dw (Model for 6V N+/Pwell diode inside DNwell)
-diode_np_6p0_dw_terminal_n = ncomp.inside(dnwell).outside(nwell).not(v5_xtor).not(dualgate).interacting(diode_mk).inside(dv2)
-                                .not(lvs_bjt).not(drc_bjt).not(sab).not(esd).not(resistor).not(fusetop).not(polyfuse)
-                                .not_interacting(cap_mk).not(nat).outside(fhres).not(fusewindow_d)
-                                .not(piscap).not_interacting(mos_cap_mk).not_interacting(mim_l_mk).not(res_mk)
+diode_np_6p0_dw_terminal_n = d_ncomp_mv.and(dnwell)
+
+# diode_pn_6p0 (Model for 6V P+/Nwell diode outside DNwell)
+diode_pn_6p0_terminal_p = d_pcomp_mv.not(dnwell)
 
 # diode_pn_6p0_dw (Model for 6V P+/Nwell diode inside DNwell)
-diode_pn_6p0_dw_terminal_p = pcomp.inside(dnwell).inside(nwell).not(v5_xtor).not(dualgate).interacting(diode_mk).inside(dv2)
-                                .not(lvs_bjt).not(drc_bjt).not(sab).not(esd).not(resistor).not(fusetop).not(polyfuse)
-                                .not_interacting(cap_mk).not(nat).outside(fhres).not(fusewindow_d)
-                                .not(piscap).not_interacting(mos_cap_mk).not_interacting(mim_l_mk).not(res_mk)
+diode_pn_6p0_dw_terminal_p = d_pcomp_mv.and(dnwell)
diff --git a/ULL/klayout/lvs/rule_decks/diode_extraction.lvs b/ULL/klayout/lvs/rule_decks/diode_extraction.lvs
index 3b131a2..b567417 100644
--- a/ULL/klayout/lvs/rule_decks/diode_extraction.lvs
+++ b/ULL/klayout/lvs/rule_decks/diode_extraction.lvs
@@ -24,55 +24,54 @@
 # ---- LV DIODE DERIVATIONS ----
 #================================
 
-# diode_np_1p8 (Model for 1.8V N+/Pwell diode outside DNWell)
-logger.info('Extracting diode_np_1p8')
-extract_devices(diode('diode_np_1p8'), { 'N' => diode_np_1p8_terminal_n, 'P' => lvpwell_con })
+# diode_nd2ps_01v8: Model for 1.8V N+/Pwell diode outside DNWell [diode_np_1p8]
+logger.info('Extracting diode_nd2ps_01v8')
+extract_devices(diode('diode_nd2ps_01v8'), { 'N' => diode_np_1p8_terminal_n, 'P' => lvpwell_con })
 
-# diode_np_1p8_dw (Model for 1.8V N+/Pwell diode inside DNWell)
-logger.info('Extracting diode_np_1p8_dw')
-extract_devices(diode('diode_np_1p8_dw'), { 'N' => diode_np_1p8_dw_terminal_n, 'P' => lvpwell_con })
+# diode_nd2ps_01v8_dn: Model for 1.8V N+/Pwell diode inside DNWell [diode_np_1p8_dw]
+logger.info('Extracting diode_nd2ps_01v8_dn')
+extract_devices(diode('diode_nd2ps_01v8_dn'), { 'N' => diode_np_1p8_dw_terminal_n, 'P' => lvpwell_con })
 
-# diode_pn_1p8 (Model for 1.8V P+/Nwell diode outside DNWell)
-logger.info('Extracting diode_pn_1p8')
-extract_devices(diode('diode_pn_1p8'), { 'N' => nwell_con, 'P' => diode_pn_1p8_terminal_p })
+# diode_pd2nw_01v8: Model for 1.8V P+/Nwell diode outside DNWell [diode_pn_1p8]
+logger.info('Extracting diode_pd2nw_01v8')
+extract_devices(diode('diode_pd2nw_01v8'), { 'N' => nwell_con, 'P' => diode_pn_1p8_terminal_p })
 
-# diode_pn_1p8_dw (Model for 1.8V P+/Nwell diode inside DNWell)
-logger.info('Extracting diode_pn_1p8_dw')
-extract_devices(diode('diode_pn_1p8_dw'), { 'N' => nwell_con, 'P' => diode_pn_1p8_dw_terminal_p })
+# diode_pd2nw_01v8_dn: Model for 1.8V P+/Nwell diode inside DNWell [diode_pn_1p8_dw]
+logger.info('Extracting diode_pd2nw_01v8_dn')
+extract_devices(diode('diode_pd2nw_01v8_dn'), { 'N' => nwell_con, 'P' => diode_pn_1p8_dw_terminal_p })
 
+# diode_nd2ps_03v3: Model for 3.3V N+/Pwell diode outside DNwell [diode_np_3p3]
+logger.info('Extracting diode_nd2ps_03v3')
+extract_devices(diode('diode_nd2ps_03v3'), { 'N' => diode_np_3p3_terminal_n, 'P' => lvpwell_con })
+
+# diode_nd2ps_03v3_dn: Model for 3.3V N+/Pwell diode inside DNwell [diode_np_3p3_dw]
+logger.info('Extracting diode_nd2ps_03v3_dn')
+extract_devices(diode('diode_nd2ps_03v3_dn'), { 'N' => diode_np_3p3_dw_terminal_n, 'P' => lvpwell_con })
+
+# diode_pd2nw_03v3: Model for 3.3V P+/Nwell diode outside DNwell [diode_pn_3p3]
+logger.info('Extracting diode_pd2nw_03v3')
+extract_devices(diode('diode_pd2nw_03v3'), { 'N' => nwell_con, 'P' => diode_pn_3p3_terminal_p })
+
+# diode_pd2nw_03v3_dn: Model for 3.3V P+/Nwell diode inside DNwell [diode_pn_3p3_dw]
+logger.info('Extracting diode_pd2nw_03v3_dn')
+extract_devices(diode('diode_pd2nw_03v3_dn'), { 'N' => nwell_con, 'P' => diode_pn_3p3_dw_terminal_p })
 
 #================================
 # ---- MV DIODE DERIVATIONS ----
 #================================
 
-# diode_np_3p3 (Model for 3.3V N+/Pwell diode outside DNwell)
-logger.info('Extracting diode_np_3p3')
-extract_devices(diode('diode_np_3p3'), { 'N' => diode_np_3p3_terminal_n, 'P' => lvpwell_con })
+# diode_nd2ps_06v0: Model for 6V N+/Pwell diode outside Dnwell [diode_np_6p0]
+logger.info('Extracting diode_nd2ps_06v0')
+extract_devices(diode('diode_nd2ps_06v0'), { 'N' => diode_np_6p0_terminal_n, 'P' => lvpwell_con })
 
-# diode_pn_3p3 (Model for 3.3V P+/Nwell diode outside DNwell)
-logger.info('Extracting diode_pn_3p3')
-extract_devices(diode('diode_pn_3p3'), { 'N' => nwell_con, 'P' => diode_pn_3p3_terminal_p })
+# diode_nd2ps_06v0_dn: Model for 6V N+/Pwell diode inside DNwell [diode_np_6p0_dw]
+logger.info('Extracting diode_nd2ps_06v0_dn')
+extract_devices(diode('diode_nd2ps_06v0_dn'), { 'N' => diode_np_6p0_dw_terminal_n, 'P' => lvpwell_con })
 
-# diode_np_3p3_dw (Model for 3.3V N+/Pwell diode inside DNwell)
-logger.info('Extracting diode_np_3p3_dw')
-extract_devices(diode('diode_np_3p3_dw'), { 'N' => diode_np_3p3_dw_terminal_n, 'P' => lvpwell_con })
+# diode_pd2nw_06v0: Model for 6V P+/Nwell diode outside DNwell [diode_pn_6p0]
+logger.info('Extracting diode_pd2nw_06v0')
+extract_devices(diode('diode_pd2nw_06v0'), { 'N' => nwell_con, 'P' => diode_pn_6p0_terminal_p })
 
-# diode_pn_3p3_dw (Model for 3.3V P+/Nwell diode inside DNwell)
-logger.info('Extracting diode_pn_3p3_dw')
-extract_devices(diode('diode_pn_3p3_dw'), { 'N' => nwell_con, 'P' => diode_pn_3p3_dw_terminal_p })
-
-# diode_np_6p0 (Model for 6V N+/Pwell diode outside Dnwell)
-logger.info('Extracting diode_np_6p0')
-extract_devices(diode('diode_np_6p0'), { 'N' => diode_np_6p0_terminal_n, 'P' => lvpwell_con })
-
-# diode_pn_6p0 (Model for 6V P+/Nwell diode outside DNwell)
-logger.info('Extracting diode_pn_6p0')
-extract_devices(diode('diode_pn_6p0'), { 'N' => nwell_con, 'P' => diode_pn_6p0_terminal_p })
-
-# diode_np_6p0_dw (Model for 6V N+/Pwell diode inside DNwell)
-logger.info('Extracting diode_np_6p0_dw')
-extract_devices(diode('diode_np_6p0_dw'), { 'N' => diode_np_6p0_dw_terminal_n, 'P' => lvpwell_con })
-
-# diode_pn_6p0_dw (Model for 6V P+/Nwell diode inside DNwell)
-logger.info('Extracting diode_pn_6p0_dw')
-extract_devices(diode('diode_pn_6p0_dw'), { 'N' => nwell_con, 'P' => diode_pn_6p0_dw_terminal_p })
+# diode_pd2nw_06v0_dn: Model for 6V P+/Nwell diode inside DNwell [diode_pn_6p0_dw]
+logger.info('Extracting diode_pd2nw_06v0_dn')
+extract_devices(diode('diode_pd2nw_06v0_dn'), { 'N' => nwell_con, 'P' => diode_pn_6p0_dw_terminal_p })
diff --git a/ULL/klayout/lvs/rule_decks/general_derivations.lvs b/ULL/klayout/lvs/rule_decks/general_derivations.lvs
index 6e4bc50..3c8912c 100644
--- a/ULL/klayout/lvs/rule_decks/general_derivations.lvs
+++ b/ULL/klayout/lvs/rule_decks/general_derivations.lvs
@@ -34,12 +34,12 @@
 ngate           = nactive.and(tgate)
 ngate_pw        = nactive_pw.and(tgate)
 nsd             = nactive.interacting(ngate).not(ngate).not(res_mk)
-ptap            = pcomp.not(all_nwell).not(res_mk)
+ptap            = pcomp.not(all_nwell_pw).not(res_mk)
 
 pactive         = pcomp.and(all_nwell)
 pgate           = pactive.and(tgate)
 psd             = pactive.interacting(pgate).not(pgate).not(res_mk)
-ntap            = ncomp.and(all_nwell).not(res_mk)
+ntap            = ncomp.and(all_nwell_pw).not(res_mk)
 
 ngate_dn        = ngate.and(dnwell_p)
 ptap_dn         = ptap.and(dnwell_p)
diff --git a/ULL/klayout/lvs/rule_decks/mimcap_derivations.lvs b/ULL/klayout/lvs/rule_decks/mimcap_derivations.lvs
index b276fd3..34e9cee 100644
--- a/ULL/klayout/lvs/rule_decks/mimcap_derivations.lvs
+++ b/ULL/klayout/lvs/rule_decks/mimcap_derivations.lvs
@@ -20,18 +20,19 @@
 
 logger.info('Starting MIMCAP DERIVATIONS')
 
-# mim option A
-mim_virtual = fusetop.sized(1.06.um).and(metal2.interacting(fusetop)).not(lvs_rf)
+#==================
+# --- MIM-A CAP ---
+#==================
+
+mim_a_exclude = drc_bjt.join(lvs_rf)
+
+mim_virtual = fusetop.sized(1.06.um).and(metal2.interacting(fusetop)).not(mim_a_exclude)
 metal2_ncap = metal2.not(mim_virtual)
-fuse_cap    = fusetop.interacting(cap_mk).interacting(mim_l_mk).not(lvs_rf)
+fuse_cap    = fusetop.interacting(cap_mk).interacting(mim_l_mk).not(mim_a_exclude)
 
-# mim_option B
-mimtm_virtual   = fusetop.sized(1.06.um).and(topmin1_metal.interacting(fusetop)).not(lvs_rf)
+#==================
+# --- MIM-B CAP ---
+#==================
 
-if METAL_LEVEL != '2LM'
-  metal3_ncap     = metal3.not(mimtm_virtual)
-  if METAL_LEVEL != '3LM'
-    metal4_ncap     = metal4.not(mimtm_virtual)
-    metal5_ncap     = metal5.not(mimtm_virtual) if METAL_LEVEL != '4LM'
-  end
-end
\ No newline at end of file
+mim_b_exclude = mim_a_exclude.join(fusewindow_d).join(polyfuse)
+mimtm_virtual = fusetop.sized(1.06.um).and(topmin1_metal.interacting(fusetop)).not(mim_b_exclude)
diff --git a/ULL/klayout/lvs/rule_decks/mimcap_extraction.lvs b/ULL/klayout/lvs/rule_decks/mimcap_extraction.lvs
index 5718a4a..3b3d5f4 100644
--- a/ULL/klayout/lvs/rule_decks/mimcap_extraction.lvs
+++ b/ULL/klayout/lvs/rule_decks/mimcap_extraction.lvs
@@ -25,32 +25,32 @@
 
   case MIM_CAP
   when '0.85'
-    # mim_0p85fF capacitor
-    logger.info('Extracting mim_0p85fF device')
-    extract_devices(capacitor('mim_0p85fF_m2m3_noshield', 0.85e-15, MIMCap),
+    # cap_mim_0f85 capacitor
+    logger.info('Extracting cap_mim_0f85 device')
+    extract_devices(capacitor('cap_mim_0f85_m2m3_noshield', 0.85e-15, MIMCap),
                      { 'P1' => mim_virtual, 'P2' => fuse_cap })
-    tolerance('mim_0p85fF_m2m3_noshield', 'C', relative: 0.25)
+    tolerance('cap_mim_0f85_m2m3_noshield', 'C', relative: 0.25)
 
   when '1'
-    # mim_1p0fF capacitor
-    logger.info('Extracting mim_1p0fF device')
-    extract_devices(capacitor('mim_1p0fF_m2m3_noshield', 1.0e-15, MIMCap),
+    # cap_mim_1f0 capacitor
+    logger.info('Extracting cap_mim_1f0 device')
+    extract_devices(capacitor('cap_mim_1f0_m2m3_noshield', 1.0e-15, MIMCap),
                      { 'P1' => mim_virtual, 'P2' => fuse_cap })
-    tolerance('mim_1p0fF_m2m3_noshield', 'C', relative: 0.25)
+    tolerance('cap_mim_1f0_m2m3_noshield', 'C', relative: 0.25)
 
   when '1.5'
-    # mim_1p5fF capacitor
-    logger.info('Extracting mim_1p5fF device')
-    extract_devices(capacitor('mim_1p5fF_m2m3_noshield', 1.5e-15, MIMCap), 
+    # cap_mim_1f5 capacitor
+    logger.info('Extracting cap_mim_1f5 device')
+    extract_devices(capacitor('cap_mim_1f5_m2m3_noshield', 1.5e-15, MIMCap), 
                      { 'P1' => mim_virtual, 'P2' => fuse_cap })
-    tolerance('mim_1p5fF_m2m3_noshield', 'C', relative: 0.25)
+    tolerance('cap_mim_1f5_m2m3_noshield', 'C', relative: 0.25)
 
   when '2'
-    # mim_2p0fF capacitor
-    logger.info('Extracting mim_2p0fF device')
-    extract_devices(capacitor('mim_2p0fF_m2m3_noshield', 2.0e-15, MIMCap),
+    # cap_mim_2f0 capacitor
+    logger.info('Extracting cap_mim_2f0 device')
+    extract_devices(capacitor('cap_mim_2f0_m2m3_noshield', 2.0e-15, MIMCap),
                      { 'P1' => mim_virtual, 'P2' => fuse_cap })
-    tolerance('mim_2p0fF_m2m3_noshield', 'C', relative: 0.25)
+    tolerance('cap_mim_2f0_m2m3_noshield', 'C', relative: 0.25)
   
   end
 
@@ -60,94 +60,94 @@
 
     case MIM_CAP
     when '0.85'
-      # mim_0p85fF_tm capacitor
-      logger.info('Extracting mim_0p85fF_tm device')
-      extract_devices(capacitor('mim_0p85fF_tm_m5m6_noshield', 0.85e-15, MIMCap),
+      # cap_mim_0f85 capacitor
+      logger.info('Extracting cap_mim_0f85 device')
+      extract_devices(capacitor('cap_mim_0f85_m5m6_noshield', 0.85e-15, MIMCap),
                        { 'P1' => mimtm_virtual, 'P2' => fuse_cap })
-      tolerance('mim_0p85fF_tm_m5m6_noshield', 'C', relative: 0.25)
+      tolerance('cap_mim_0f85_m5m6_noshield', 'C', relative: 0.25)
 
     when '1'
-      # mim_1p0fF_tm capacitor
-      logger.info('Extracting mim_1p0fF_tm device')
-      extract_devices(capacitor('mim_1p0fF_tm_m5m6_noshield', 1.0e-15, MIMCap),
+      # cap_mim_1f0 capacitor
+      logger.info('Extracting cap_mim_1f0 device')
+      extract_devices(capacitor('cap_mim_1f0_m5m6_noshield', 1.0e-15, MIMCap),
                        { 'P1' => mimtm_virtual, 'P2' => fuse_cap })
-      tolerance('mim_1p0fF_tm_m5m6_noshield', 'C', relative: 0.25)
+      tolerance('cap_mim_1f0_m5m6_noshield', 'C', relative: 0.25)
 
     when '1.5'
-      # mim_1p5fF_tm capacitor
-      logger.info('Extracting mim_1p5fF_tm device')
-      extract_devices(capacitor('mim_1p5fF_tm_m5m6_noshield', 1.5e-15, MIMCap),
+      # cap_mim_1f5 capacitor
+      logger.info('Extracting cap_mim_1f5 device')
+      extract_devices(capacitor('cap_mim_1f5_m5m6_noshield', 1.5e-15, MIMCap),
                        { 'P1' => mimtm_virtual, 'P2' => fuse_cap })
-      tolerance('mim_1p5fF_tm_m5m6_noshield', 'C', relative: 0.25)
+      tolerance('cap_mim_1f5_m5m6_noshield', 'C', relative: 0.25)
 
     when '2'
-        # mim_2p0fF_tm capacitor
-        logger.info('Extracting mim_2p0fF_tm device')
-        extract_devices(capacitor('mim_2p0fF_tm_m5m6_noshield', 2.0e-15, MIMCap),
+        # cap_mim_2f0 capacitor
+        logger.info('Extracting cap_mim_2f0 device')
+        extract_devices(capacitor('cap_mim_2f0_m5m6_noshield', 2.0e-15, MIMCap),
                        { 'P1' => mimtm_virtual, 'P2' => fuse_cap })
-        tolerance('mim_2p0fF_tm_m5m6_noshield', 'C', relative: 0.25)
+        tolerance('cap_mim_2f0_m5m6_noshield', 'C', relative: 0.25)
     end
 
   when '5LM'
     case MIM_CAP
     when '0.85'
-      # mim_0p85fF_tm capacitor
-      logger.info('Extracting mim_0p85fF_tm device')
-      extract_devices(capacitor('mim_0p85fF_tm_m4m5_noshield', 0.85e-15, MIMCap),
+      # cap_mim_0f85 capacitor
+      logger.info('Extracting cap_mim_0f85 device')
+      extract_devices(capacitor('cap_mim_0f85_m4m5_noshield', 0.85e-15, MIMCap),
                        { 'P1' => mimtm_virtual, 'P2' => fuse_cap })
-      tolerance('mim_0p85fF_tm_m4m5_noshield', 'C', relative: 0.25)
+      tolerance('cap_mim_0f85_m4m5_noshield', 'C', relative: 0.25)
 
     when '1'
-      # mim_1p0fF_tm capacitor
-      logger.info('Extracting mim_1p0fF_tm device')
-      extract_devices(capacitor('mim_1p0fF_tm_m4m5_noshield', 1.0e-15, MIMCap),
+      # cap_mim_1f0 capacitor
+      logger.info('Extracting cap_mim_1f0 device')
+      extract_devices(capacitor('cap_mim_1f0_m4m5_noshield', 1.0e-15, MIMCap),
                        { 'P1' => mimtm_virtual, 'P2' => fuse_cap })
-      tolerance('mim_1p0fF_tm_m4m5_noshield', 'C', relative: 0.25)
+      tolerance('cap_mim_1f0_m4m5_noshield', 'C', relative: 0.25)
 
     when '1.5'
-      # mim_1p5fF_tm capacitor
-      logger.info('Extracting mim_1p5fF_tm device')
-      extract_devices(capacitor('mim_1p5fF_tm_m4m5_noshield', 1.5e-15, MIMCap),
+      # cap_mim_1f5 capacitor
+      logger.info('Extracting cap_mim_1f5 device')
+      extract_devices(capacitor('cap_mim_1f5_m4m5_noshield', 1.5e-15, MIMCap),
                        { 'P1' => mimtm_virtual, 'P2' => fuse_cap })
-      tolerance('mim_1p5fF_tm_m4m5_noshield', 'C', relative: 0.25)
+      tolerance('cap_mim_1f5_m4m5_noshield', 'C', relative: 0.25)
 
     when '2'
-        # mim_2p0fF_tm capacitor
-        logger.info('Extracting mim_2p0fF_tm device')
-        extract_devices(capacitor('mim_2p0fF_tm_m4m5_noshield', 2.0e-15, MIMCap),
+        # cap_mim_2f0 capacitor
+        logger.info('Extracting cap_mim_2f0 device')
+        extract_devices(capacitor('cap_mim_2f0_m4m5_noshield', 2.0e-15, MIMCap),
                        { 'P1' => mimtm_virtual, 'P2' => fuse_cap })
-        tolerance('mim_2p0fF_tm_m4m5_noshield', 'C', relative: 0.25)
+        tolerance('cap_mim_2f0_m4m5_noshield', 'C', relative: 0.25)
     end
 
   when '4LM'
     case MIM_CAP
     when '0.85'
-      # mim_0p85fF_tm capacitor
-      logger.info('Extracting mim_0p85fF_tm device')
-      extract_devices(capacitor('mim_0p85fF_tm_m3m4_noshield', 0.85e-15, MIMCap),
+      # cap_mim_0f85 capacitor
+      logger.info('Extracting cap_mim_0f85 device')
+      extract_devices(capacitor('cap_mim_0f85_m3m4_noshield', 0.85e-15, MIMCap),
                        { 'P1' => mimtm_virtual, 'P2' => fuse_cap })
-      tolerance('mim_0p85fF_tm_m3m4_noshield', 'C', relative: 0.25)
+      tolerance('cap_mim_0f85_m3m4_noshield', 'C', relative: 0.25)
 
     when '1'
-      # mim_1p0fF_tm capacitor
-      logger.info('Extracting mim_1p0fF_tm device')
-      extract_devices(capacitor('mim_1p0fF_tm_m3m4_noshield', 1.0e-15, MIMCap),
+      # cap_mim_1f0 capacitor
+      logger.info('Extracting cap_mim_1f0 device')
+      extract_devices(capacitor('cap_mim_1f0_m3m4_noshield', 1.0e-15, MIMCap),
                        { 'P1' => mimtm_virtual, 'P2' => fuse_cap })
-      tolerance('mim_1p0fF_tm_m3m4_noshield', 'C', relative: 0.25)
+      tolerance('cap_mim_1f0_m3m4_noshield', 'C', relative: 0.25)
 
     when '1.5'
-      # mim_1p5fF_tm capacitor
-      logger.info('Extracting mim_1p5fF_tm device')
-      extract_devices(capacitor('mim_1p5fF_tm_m3m4_noshield', 1.5e-15, MIMCap),
+      # cap_mim_1f5 capacitor
+      logger.info('Extracting cap_mim_1f5 device')
+      extract_devices(capacitor('cap_mim_1f5_m3m4_noshield', 1.5e-15, MIMCap),
                        { 'P1' => mimtm_virtual, 'P2' => fuse_cap })
-      tolerance('mim_1p5fF_tm_m3m4_noshield', 'C', relative: 0.25)
+      tolerance('cap_mim_1f5_m3m4_noshield', 'C', relative: 0.25)
 
     when '2'
-        # mim_2p0fF_tm capacitor
-        logger.info('Extracting mim_2p0fF_tm device')
-        extract_devices(capacitor('mim_2p0fF_tm_m3m4_noshield', 2.0e-15, MIMCap),
+        # cap_mim_2f0 capacitor
+        logger.info('Extracting cap_mim_2f0 device')
+        extract_devices(capacitor('cap_mim_2f0_m3m4_noshield', 2.0e-15, MIMCap),
                        { 'P1' => mimtm_virtual, 'P2' => fuse_cap })
-        tolerance('mim_2p0fF_tm_m3m4_noshield', 'C', relative: 0.25)
+        tolerance('cap_mim_2f0_m3m4_noshield', 'C', relative: 0.25)
     end
   end
 end
\ No newline at end of file
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_dnwps.gds b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_dnwps.gds
deleted file mode 100644
index 84df785..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_dnwps.gds
+++ /dev/null
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diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_dnwpw.gds b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_dnwpw.gds
deleted file mode 100644
index 9d5b37f..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_dnwpw.gds
+++ /dev/null
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diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_np_1p8.gds b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_nd2ps_01v8.gds
similarity index 99%
rename from ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_np_1p8.gds
rename to ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_nd2ps_01v8.gds
index 637b381..21e4122 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_np_1p8.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_nd2ps_01v8.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_np_6p0_dw.gds b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_nd2ps_01v8_dn.gds
similarity index 99%
rename from ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_np_6p0_dw.gds
rename to ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_nd2ps_01v8_dn.gds
index 73c214a..e01631d 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_np_6p0_dw.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_nd2ps_01v8_dn.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_nd2ps_03v3.gds b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_nd2ps_03v3.gds
new file mode 100644
index 0000000..9c9f415
--- /dev/null
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diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_np_6p0_dw.gds b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_nd2ps_03v3_dn.gds
similarity index 99%
copy from ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_np_6p0_dw.gds
copy to ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_nd2ps_03v3_dn.gds
index 73c214a..5bf4c51 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_np_6p0_dw.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_nd2ps_03v3_dn.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_np_6p0.gds b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_nd2ps_06v0.gds
similarity index 99%
rename from ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_np_6p0.gds
rename to ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_nd2ps_06v0.gds
index bd82e28..ec8c153 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_np_6p0.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_nd2ps_06v0.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_np_6p0_dw.gds b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_nd2ps_06v0_dn.gds
similarity index 99%
copy from ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_np_6p0_dw.gds
copy to ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_nd2ps_06v0_dn.gds
index 73c214a..f8020dd 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_np_6p0_dw.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_nd2ps_06v0_dn.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_np_1p8_dw.gds b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_np_1p8_dw.gds
deleted file mode 100644
index e1aebd0..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_np_1p8_dw.gds
+++ /dev/null
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diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_np_3p3.gds b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_np_3p3.gds
deleted file mode 100644
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--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_np_3p3.gds
+++ /dev/null
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diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_np_3p3_dw.gds b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_np_3p3_dw.gds
deleted file mode 100644
index aa60938..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_np_3p3_dw.gds
+++ /dev/null
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diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_nwp_6p0.gds b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_nwp_6p0.gds
deleted file mode 100644
index eb2312d..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_nwp_6p0.gds
+++ /dev/null
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diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_1p8.gds b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pd2nw_01v8.gds
similarity index 99%
copy from ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_1p8.gds
copy to ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pd2nw_01v8.gds
index 9903014..d3e0f45 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_1p8.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pd2nw_01v8.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_3p3_dw.gds b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pd2nw_01v8_dn.gds
similarity index 99%
copy from ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_3p3_dw.gds
copy to ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pd2nw_01v8_dn.gds
index f75c075..66cf87b 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_3p3_dw.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pd2nw_01v8_dn.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pd2nw_03v3.gds b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pd2nw_03v3.gds
new file mode 100644
index 0000000..869e498
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pd2nw_03v3.gds
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diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_3p3_dw.gds b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pd2nw_03v3_dn.gds
similarity index 99%
copy from ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_3p3_dw.gds
copy to ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pd2nw_03v3_dn.gds
index f75c075..2c502c4 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_3p3_dw.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pd2nw_03v3_dn.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_1p8.gds b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pd2nw_06v0.gds
similarity index 99%
rename from ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_1p8.gds
rename to ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pd2nw_06v0.gds
index 9903014..efca807 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_1p8.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pd2nw_06v0.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_3p3_dw.gds b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pd2nw_06v0_dn.gds
similarity index 99%
rename from ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_3p3_dw.gds
rename to ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pd2nw_06v0_dn.gds
index f75c075..c7d4fc5 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_3p3_dw.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pd2nw_06v0_dn.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_1p8_dw.gds b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_1p8_dw.gds
deleted file mode 100644
index 4816efe..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_1p8_dw.gds
+++ /dev/null
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diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_3p3.gds b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_3p3.gds
deleted file mode 100644
index c873c41..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_3p3.gds
+++ /dev/null
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diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_6p0.gds b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_6p0.gds
deleted file mode 100644
index 4e47819..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_6p0.gds
+++ /dev/null
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diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_6p0_dw.gds b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_6p0_dw.gds
deleted file mode 100644
index b406a80..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/layout/diode_pn_6p0_dw.gds
+++ /dev/null
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_dnwps.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_dnwps.cdl
deleted file mode 100644
index 4654fe7..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_dnwps.cdl
+++ /dev/null
@@ -1,49 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: diode_dnwps
-* View Name:     schematic
-* Netlisted on:  Nov 24 09:04:18 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-*.GLOBAL gnd!
-
-*.PIN gnd!
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    diode_dnwps
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT diode_dnwps I1_0_0_0_0_R0_NEG I1_0_1_0_0_R0_NEG I1_0_2_0_0_R0_NEG 
-+ I1_1_0_0_0_R0_NEG I1_1_1_0_0_R0_NEG I1_1_2_0_0_R0_NEG I1_2_0_0_0_R0_NEG 
-+ I1_2_1_0_0_R0_NEG I1_2_2_0_0_R0_NEG I1_default_NEG gnd!
-*.PININFO I1_0_0_0_0_R0_NEG:I I1_0_1_0_0_R0_NEG:I I1_0_2_0_0_R0_NEG:I 
-*.PININFO I1_1_0_0_0_R0_NEG:I I1_1_1_0_0_R0_NEG:I I1_1_2_0_0_R0_NEG:I 
-*.PININFO I1_2_0_0_0_R0_NEG:I I1_2_1_0_0_R0_NEG:I I1_2_2_0_0_R0_NEG:I 
-*.PININFO I1_default_NEG:I gnd!:I
-DI1_2_2_0_0_R0 gnd! I1_2_2_0_0_R0_NEG diode_dnwps AREA=10n PJ=400e-6 m=1
-DI1_2_1_0_0_R0 gnd! I1_2_1_0_0_R0_NEG diode_dnwps AREA=1.034n PJ=220.68e-6 m=1
-DI1_2_0_0_0_R0 gnd! I1_2_0_0_0_R0_NEG diode_dnwps AREA=170p PJ=203.4e-6 m=1
-DI1_1_2_0_0_R0 gnd! I1_1_2_0_0_R0_NEG diode_dnwps AREA=1.034n PJ=220.68e-6 m=1
-DI1_1_1_0_0_R0 gnd! I1_1_1_0_0_R0_NEG diode_dnwps AREA=106.916p PJ=41.36e-6 m=1
-DI1_1_0_0_0_R0 gnd! I1_1_0_0_0_R0_NEG diode_dnwps AREA=17.578p PJ=24.08e-6 m=1
-DI1_0_2_0_0_R0 gnd! I1_0_2_0_0_R0_NEG diode_dnwps AREA=170p PJ=203.4e-6 m=1
-DI1_0_1_0_0_R0 gnd! I1_0_1_0_0_R0_NEG diode_dnwps AREA=17.578p PJ=24.08e-6 m=1
-DI1_0_0_0_0_R0 gnd! I1_0_0_0_0_R0_NEG diode_dnwps AREA=3.1535p PJ=7.11e-6 m=1
-DI1_default gnd! I1_default_NEG diode_dnwps AREA=100e-12 PJ=40e-6 m=1
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_dnwpw.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_dnwpw.cdl
deleted file mode 100644
index 4f085b6..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_dnwpw.cdl
+++ /dev/null
@@ -1,50 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: diode_dnwpw
-* View Name:     schematic
-* Netlisted on:  Nov 24 09:06:01 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-*.GLOBAL vdd!
-
-*.PIN vdd!
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    diode_dnwpw
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT diode_dnwpw I1_0_0_0_0_0_R0_POS I1_0_1_0_0_0_R0_POS I1_0_2_0_0_0_R0_POS 
-+ I1_1_0_0_0_0_R0_POS I1_1_1_0_0_0_R0_POS I1_1_2_0_0_0_R0_POS 
-+ I1_2_0_0_0_0_R0_POS I1_2_1_0_0_0_R0_POS I1_2_2_0_0_0_R0_POS I1_default_POS 
-+ vdd!
-*.PININFO I1_0_0_0_0_0_R0_POS:I I1_0_1_0_0_0_R0_POS:I I1_0_2_0_0_0_R0_POS:I 
-*.PININFO I1_1_0_0_0_0_R0_POS:I I1_1_1_0_0_0_R0_POS:I I1_1_2_0_0_0_R0_POS:I 
-*.PININFO I1_2_0_0_0_0_R0_POS:I I1_2_1_0_0_0_R0_POS:I I1_2_2_0_0_0_R0_POS:I 
-*.PININFO I1_default_POS:I vdd!:I
-DI1_2_2_0_0_0_R0 I1_2_2_0_0_0_R0_POS vdd! diode_dnwpw AREA=10n      PJ=400e-6    m=1
-DI1_2_1_0_0_0_R0 I1_2_1_0_0_0_R0_POS vdd! diode_dnwpw AREA=1.023n   PJ=220.46e-6 m=1
-DI1_2_0_0_0_0_R0 I1_2_0_0_0_0_R0_POS vdd! diode_dnwpw AREA=60p      PJ=201.2e-6  m=1
-DI1_1_2_0_0_0_R0 I1_1_2_0_0_0_R0_POS vdd! diode_dnwpw AREA=1.023n   PJ=220.46e-6 m=1
-DI1_1_1_0_0_0_R0 I1_1_1_0_0_0_R0_POS vdd! diode_dnwpw AREA=104.653p PJ=40.92e-6  m=1
-DI1_1_0_0_0_0_R0 I1_1_0_0_0_0_R0_POS vdd! diode_dnwpw AREA=6.138p   PJ=21.66e-6  m=1
-DI1_0_2_0_0_0_R0 I1_0_2_0_0_0_R0_POS vdd! diode_dnwpw AREA=60p      PJ=201.2e-6  m=1
-DI1_0_1_0_0_0_R0 I1_0_1_0_0_0_R0_POS vdd! diode_dnwpw AREA=6.138p   PJ=21.66e-6  m=1
-DI1_0_0_0_0_0_R0 I1_0_0_0_0_0_R0_POS vdd! diode_dnwpw AREA=627f     PJ=3.29e-6   m=1
-DI1_default I1_default_POS vdd! diode_dnwpw AREA=100e-12 PJ=40e-6 m=1
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_nd2ps_01v8.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_nd2ps_01v8.cdl
new file mode 100644
index 0000000..0f81e63
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_nd2ps_01v8.cdl
@@ -0,0 +1,61 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: diode_nd2ps_01v8
+* View Name:     schematic
+* Netlisted on:  Nov 24 09:16:13 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+*.GLOBAL vdd!
+
+*.PIN vdd!
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    diode_nd2ps_01v8
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT diode_nd2ps_01v8 I1_0_0_0_0_R0_MINUS I1_0_1_0_0_R0_MINUS I1_0_2_0_0_R0_MINUS 
++ I1_0_3_0_0_R0_MINUS I1_1_0_0_0_R0_MINUS I1_1_1_0_0_R0_MINUS 
++ I1_1_2_0_0_R0_MINUS I1_1_3_0_0_R0_MINUS I1_2_0_0_0_R0_MINUS 
++ I1_2_1_0_0_R0_MINUS I1_2_2_0_0_R0_MINUS I1_2_3_0_0_R0_MINUS 
++ I1_3_0_0_0_R0_MINUS I1_3_1_0_0_R0_MINUS I1_3_2_0_0_R0_MINUS 
++ I1_3_3_0_0_R0_MINUS I1_default_MINUS vdd!
+*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_1_0_0_R0_MINUS:I I1_0_2_0_0_R0_MINUS:I 
+*.PININFO I1_0_3_0_0_R0_MINUS:I I1_1_0_0_0_R0_MINUS:I I1_1_1_0_0_R0_MINUS:I 
+*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_3_0_0_R0_MINUS:I I1_2_0_0_0_R0_MINUS:I 
+*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_2_0_0_R0_MINUS:I I1_2_3_0_0_R0_MINUS:I 
+*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_1_0_0_R0_MINUS:I I1_3_2_0_0_R0_MINUS:I 
+*.PININFO I1_3_3_0_0_R0_MINUS:I I1_default_MINUS:I vdd!:I
+DI1_3_3_0_0_R0 vdd! I1_3_3_0_0_R0_MINUS diode_nd2ps_01v8 m=1 AREA=10n PJ=400u
+DI1_3_2_0_0_R0 vdd! I1_3_2_0_0_R0_MINUS diode_nd2ps_01v8 m=1 AREA=1.32n PJ=226.4u
+DI1_3_1_0_0_R0 vdd! I1_3_1_0_0_R0_MINUS diode_nd2ps_01v8 m=1 AREA=110p PJ=202.2u
+DI1_3_0_0_0_R0 vdd! I1_3_0_0_0_R0_MINUS diode_nd2ps_01v8 m=1 AREA=36p PJ=200.72u
+DI1_2_3_0_0_R0 vdd! I1_2_3_0_0_R0_MINUS diode_nd2ps_01v8 m=1 AREA=1.32n PJ=226.4u
+DI1_2_2_0_0_R0 vdd! I1_2_2_0_0_R0_MINUS diode_nd2ps_01v8 m=1 AREA=174.24p PJ=52.8u
+DI1_2_1_0_0_R0 vdd! I1_2_1_0_0_R0_MINUS diode_nd2ps_01v8 m=1 AREA=14.52p PJ=28.6u
+DI1_2_0_0_0_R0 vdd! I1_2_0_0_0_R0_MINUS diode_nd2ps_01v8 m=1 AREA=4.752p PJ=27.12u
+DI1_1_3_0_0_R0 vdd! I1_1_3_0_0_R0_MINUS diode_nd2ps_01v8 m=1 AREA=110p PJ=202.2u
+DI1_1_2_0_0_R0 vdd! I1_1_2_0_0_R0_MINUS diode_nd2ps_01v8 m=1 AREA=14.52p PJ=28.6u
+DI1_1_1_0_0_R0 vdd! I1_1_1_0_0_R0_MINUS diode_nd2ps_01v8 m=1 AREA=1.21p PJ=4.4u
+DI1_1_0_0_0_R0 vdd! I1_1_0_0_0_R0_MINUS diode_nd2ps_01v8 m=1 AREA=396f PJ=2.92u
+DI1_0_3_0_0_R0 vdd! I1_0_3_0_0_R0_MINUS diode_nd2ps_01v8 m=1 AREA=36p PJ=200.72u
+DI1_0_2_0_0_R0 vdd! I1_0_2_0_0_R0_MINUS diode_nd2ps_01v8 m=1 AREA=4.752p PJ=27.12u
+DI1_0_1_0_0_R0 vdd! I1_0_1_0_0_R0_MINUS diode_nd2ps_01v8 m=1 AREA=396f PJ=2.92u
+DI1_0_0_0_0_R0 vdd! I1_0_0_0_0_R0_MINUS diode_nd2ps_01v8 m=1 AREA=203.4f PJ=1.85u
+DI1_default vdd! I1_default_MINUS diode_nd2ps_01v8 m=1 AREA=1p PJ=4u
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_nd2ps_01v8_dn.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_nd2ps_01v8_dn.cdl
new file mode 100644
index 0000000..9fa6328
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_nd2ps_01v8_dn.cdl
@@ -0,0 +1,86 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: diode_nd2ps_01v8_dn
+* View Name:     schematic
+* Netlisted on:  Nov 24 09:17:22 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    diode_nd2ps_01v8_dn
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT diode_nd2ps_01v8_dn I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS 
++ I1_0_1_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS I1_0_2_0_0_R0_PLUS 
++ I1_0_3_0_0_R0_MINUS I1_0_3_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS 
++ I1_1_0_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS I1_1_1_0_0_R0_PLUS 
++ I1_1_2_0_0_R0_MINUS I1_1_2_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS 
++ I1_1_3_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS I1_2_0_0_0_R0_PLUS 
++ I1_2_1_0_0_R0_MINUS I1_2_1_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS 
++ I1_2_2_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS I1_2_3_0_0_R0_PLUS 
++ I1_3_0_0_0_R0_MINUS I1_3_0_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS 
++ I1_3_1_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS I1_3_2_0_0_R0_PLUS 
++ I1_3_3_0_0_R0_MINUS I1_3_3_0_0_R0_PLUS I1_default_MINUS I1_default_PLUS
+*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_0_0_0_R0_PLUS:I I1_0_1_0_0_R0_MINUS:I 
+*.PININFO I1_0_1_0_0_R0_PLUS:I I1_0_2_0_0_R0_MINUS:I I1_0_2_0_0_R0_PLUS:I 
+*.PININFO I1_0_3_0_0_R0_MINUS:I I1_0_3_0_0_R0_PLUS:I I1_1_0_0_0_R0_MINUS:I 
+*.PININFO I1_1_0_0_0_R0_PLUS:I I1_1_1_0_0_R0_MINUS:I I1_1_1_0_0_R0_PLUS:I 
+*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_2_0_0_R0_PLUS:I I1_1_3_0_0_R0_MINUS:I 
+*.PININFO I1_1_3_0_0_R0_PLUS:I I1_2_0_0_0_R0_MINUS:I I1_2_0_0_0_R0_PLUS:I 
+*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_1_0_0_R0_PLUS:I I1_2_2_0_0_R0_MINUS:I 
+*.PININFO I1_2_2_0_0_R0_PLUS:I I1_2_3_0_0_R0_MINUS:I I1_2_3_0_0_R0_PLUS:I 
+*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_0_0_0_R0_PLUS:I I1_3_1_0_0_R0_MINUS:I 
+*.PININFO I1_3_1_0_0_R0_PLUS:I I1_3_2_0_0_R0_MINUS:I I1_3_2_0_0_R0_PLUS:I 
+*.PININFO I1_3_3_0_0_R0_MINUS:I I1_3_3_0_0_R0_PLUS:I I1_default_MINUS:I 
+*.PININFO I1_default_PLUS:I
+DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS diode_nd2ps_01v8_dn m=1 AREA=10n 
++ PJ=400u
+DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS diode_nd2ps_01v8_dn m=1 AREA=1.32n 
++ PJ=226.4u
+DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS diode_nd2ps_01v8_dn m=1 AREA=110p 
++ PJ=202.2u
+DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS diode_nd2ps_01v8_dn m=1 AREA=56.5p 
++ PJ=201.13u
+DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS diode_nd2ps_01v8_dn m=1 AREA=1.32n 
++ PJ=226.4u
+DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS diode_nd2ps_01v8_dn m=1 
++ AREA=174.24p PJ=52.8u
+DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS diode_nd2ps_01v8_dn m=1 
++ AREA=14.52p PJ=28.6u
+DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS diode_nd2ps_01v8_dn m=1 
++ AREA=7.458p PJ=27.53u
+DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS diode_nd2ps_01v8_dn m=1 AREA=110p 
++ PJ=202.2u
+DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS diode_nd2ps_01v8_dn m=1 
++ AREA=14.52p PJ=28.6u
+DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS diode_nd2ps_01v8_dn m=1 AREA=1.21p 
++ PJ=4.4u
+DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS diode_nd2ps_01v8_dn m=1 
++ AREA=621.5f PJ=3.33u
+DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS diode_nd2ps_01v8_dn m=1 AREA=56.5p 
++ PJ=201.13u
+DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS diode_nd2ps_01v8_dn m=1 
++ AREA=7.458p PJ=27.53u
+DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS diode_nd2ps_01v8_dn m=1 
++ AREA=621.5f PJ=3.33u
+DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS diode_nd2ps_01v8_dn m=1 
++ AREA=319.225f PJ=2.26u
+DI1_default I1_default_PLUS I1_default_MINUS diode_nd2ps_01v8_dn m=1 AREA=1p PJ=4u
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_nd2ps_03v3.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_nd2ps_03v3.cdl
new file mode 100644
index 0000000..b611e4a
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_nd2ps_03v3.cdl
@@ -0,0 +1,61 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: diode_nd2ps_03v3
+* View Name:     schematic
+* Netlisted on:  Nov 24 09:16:13 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+*.GLOBAL vdd!
+
+*.PIN vdd!
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    diode_nd2ps_03v3
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT diode_nd2ps_03v3 I1_0_0_0_0_R0_MINUS I1_0_1_0_0_R0_MINUS I1_0_2_0_0_R0_MINUS 
++ I1_0_3_0_0_R0_MINUS I1_1_0_0_0_R0_MINUS I1_1_1_0_0_R0_MINUS 
++ I1_1_2_0_0_R0_MINUS I1_1_3_0_0_R0_MINUS I1_2_0_0_0_R0_MINUS 
++ I1_2_1_0_0_R0_MINUS I1_2_2_0_0_R0_MINUS I1_2_3_0_0_R0_MINUS 
++ I1_3_0_0_0_R0_MINUS I1_3_1_0_0_R0_MINUS I1_3_2_0_0_R0_MINUS 
++ I1_3_3_0_0_R0_MINUS I1_default_MINUS vdd!
+*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_1_0_0_R0_MINUS:I I1_0_2_0_0_R0_MINUS:I 
+*.PININFO I1_0_3_0_0_R0_MINUS:I I1_1_0_0_0_R0_MINUS:I I1_1_1_0_0_R0_MINUS:I 
+*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_3_0_0_R0_MINUS:I I1_2_0_0_0_R0_MINUS:I 
+*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_2_0_0_R0_MINUS:I I1_2_3_0_0_R0_MINUS:I 
+*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_1_0_0_R0_MINUS:I I1_3_2_0_0_R0_MINUS:I 
+*.PININFO I1_3_3_0_0_R0_MINUS:I I1_default_MINUS:I vdd!:I
+DI1_3_3_0_0_R0 vdd! I1_3_3_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=10n PJ=400u
+DI1_3_2_0_0_R0 vdd! I1_3_2_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=1.32n PJ=226.4u
+DI1_3_1_0_0_R0 vdd! I1_3_1_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=110p PJ=202.2u
+DI1_3_0_0_0_R0 vdd! I1_3_0_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=36p PJ=200.72u
+DI1_2_3_0_0_R0 vdd! I1_2_3_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=1.32n PJ=226.4u
+DI1_2_2_0_0_R0 vdd! I1_2_2_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=174.24p PJ=52.8u
+DI1_2_1_0_0_R0 vdd! I1_2_1_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=14.52p PJ=28.6u
+DI1_2_0_0_0_R0 vdd! I1_2_0_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=4.752p PJ=27.12u
+DI1_1_3_0_0_R0 vdd! I1_1_3_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=110p PJ=202.2u
+DI1_1_2_0_0_R0 vdd! I1_1_2_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=14.52p PJ=28.6u
+DI1_1_1_0_0_R0 vdd! I1_1_1_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=1.21p PJ=4.4u
+DI1_1_0_0_0_R0 vdd! I1_1_0_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=396f PJ=2.92u
+DI1_0_3_0_0_R0 vdd! I1_0_3_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=36p PJ=200.72u
+DI1_0_2_0_0_R0 vdd! I1_0_2_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=4.752p PJ=27.12u
+DI1_0_1_0_0_R0 vdd! I1_0_1_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=396f PJ=2.92u
+DI1_0_0_0_0_R0 vdd! I1_0_0_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=203.4f PJ=1.85u
+DI1_default vdd! I1_default_MINUS diode_nd2ps_03v3 m=1 AREA=1p PJ=4u
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_nd2ps_03v3_dn.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_nd2ps_03v3_dn.cdl
new file mode 100644
index 0000000..eef0915
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_nd2ps_03v3_dn.cdl
@@ -0,0 +1,86 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: diode_nd2ps_03v3_dn
+* View Name:     schematic
+* Netlisted on:  Nov 24 09:17:22 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    diode_nd2ps_03v3_dn
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT diode_nd2ps_03v3_dn I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS 
++ I1_0_1_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS I1_0_2_0_0_R0_PLUS 
++ I1_0_3_0_0_R0_MINUS I1_0_3_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS 
++ I1_1_0_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS I1_1_1_0_0_R0_PLUS 
++ I1_1_2_0_0_R0_MINUS I1_1_2_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS 
++ I1_1_3_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS I1_2_0_0_0_R0_PLUS 
++ I1_2_1_0_0_R0_MINUS I1_2_1_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS 
++ I1_2_2_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS I1_2_3_0_0_R0_PLUS 
++ I1_3_0_0_0_R0_MINUS I1_3_0_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS 
++ I1_3_1_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS I1_3_2_0_0_R0_PLUS 
++ I1_3_3_0_0_R0_MINUS I1_3_3_0_0_R0_PLUS I1_default_MINUS I1_default_PLUS
+*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_0_0_0_R0_PLUS:I I1_0_1_0_0_R0_MINUS:I 
+*.PININFO I1_0_1_0_0_R0_PLUS:I I1_0_2_0_0_R0_MINUS:I I1_0_2_0_0_R0_PLUS:I 
+*.PININFO I1_0_3_0_0_R0_MINUS:I I1_0_3_0_0_R0_PLUS:I I1_1_0_0_0_R0_MINUS:I 
+*.PININFO I1_1_0_0_0_R0_PLUS:I I1_1_1_0_0_R0_MINUS:I I1_1_1_0_0_R0_PLUS:I 
+*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_2_0_0_R0_PLUS:I I1_1_3_0_0_R0_MINUS:I 
+*.PININFO I1_1_3_0_0_R0_PLUS:I I1_2_0_0_0_R0_MINUS:I I1_2_0_0_0_R0_PLUS:I 
+*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_1_0_0_R0_PLUS:I I1_2_2_0_0_R0_MINUS:I 
+*.PININFO I1_2_2_0_0_R0_PLUS:I I1_2_3_0_0_R0_MINUS:I I1_2_3_0_0_R0_PLUS:I 
+*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_0_0_0_R0_PLUS:I I1_3_1_0_0_R0_MINUS:I 
+*.PININFO I1_3_1_0_0_R0_PLUS:I I1_3_2_0_0_R0_MINUS:I I1_3_2_0_0_R0_PLUS:I 
+*.PININFO I1_3_3_0_0_R0_MINUS:I I1_3_3_0_0_R0_PLUS:I I1_default_MINUS:I 
+*.PININFO I1_default_PLUS:I
+DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 AREA=10n 
++ PJ=400u
+DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 AREA=1.32n 
++ PJ=226.4u
+DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 AREA=110p 
++ PJ=202.2u
+DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 AREA=56.5p 
++ PJ=201.13u
+DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 AREA=1.32n 
++ PJ=226.4u
+DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 
++ AREA=174.24p PJ=52.8u
+DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 
++ AREA=14.52p PJ=28.6u
+DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 
++ AREA=7.458p PJ=27.53u
+DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 AREA=110p 
++ PJ=202.2u
+DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 
++ AREA=14.52p PJ=28.6u
+DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 AREA=1.21p 
++ PJ=4.4u
+DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 
++ AREA=621.5f PJ=3.33u
+DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 AREA=56.5p 
++ PJ=201.13u
+DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 
++ AREA=7.458p PJ=27.53u
+DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 
++ AREA=621.5f PJ=3.33u
+DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 
++ AREA=319.225f PJ=2.26u
+DI1_default I1_default_PLUS I1_default_MINUS diode_nd2ps_03v3_dn m=1 AREA=1p PJ=4u
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_nd2ps_06v0.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_nd2ps_06v0.cdl
new file mode 100644
index 0000000..b82a44b
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_nd2ps_06v0.cdl
@@ -0,0 +1,61 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: diode_nd2ps_06v0
+* View Name:     schematic
+* Netlisted on:  Nov 24 09:16:13 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+*.GLOBAL vdd!
+
+*.PIN vdd!
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    diode_nd2ps_06v0
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT diode_nd2ps_06v0 I1_0_0_0_0_R0_MINUS I1_0_1_0_0_R0_MINUS I1_0_2_0_0_R0_MINUS 
++ I1_0_3_0_0_R0_MINUS I1_1_0_0_0_R0_MINUS I1_1_1_0_0_R0_MINUS 
++ I1_1_2_0_0_R0_MINUS I1_1_3_0_0_R0_MINUS I1_2_0_0_0_R0_MINUS 
++ I1_2_1_0_0_R0_MINUS I1_2_2_0_0_R0_MINUS I1_2_3_0_0_R0_MINUS 
++ I1_3_0_0_0_R0_MINUS I1_3_1_0_0_R0_MINUS I1_3_2_0_0_R0_MINUS 
++ I1_3_3_0_0_R0_MINUS I1_default_MINUS vdd!
+*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_1_0_0_R0_MINUS:I I1_0_2_0_0_R0_MINUS:I 
+*.PININFO I1_0_3_0_0_R0_MINUS:I I1_1_0_0_0_R0_MINUS:I I1_1_1_0_0_R0_MINUS:I 
+*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_3_0_0_R0_MINUS:I I1_2_0_0_0_R0_MINUS:I 
+*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_2_0_0_R0_MINUS:I I1_2_3_0_0_R0_MINUS:I 
+*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_1_0_0_R0_MINUS:I I1_3_2_0_0_R0_MINUS:I 
+*.PININFO I1_3_3_0_0_R0_MINUS:I I1_default_MINUS:I vdd!:I
+DI1_3_3_0_0_R0 vdd! I1_3_3_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=10n PJ=400u
+DI1_3_2_0_0_R0 vdd! I1_3_2_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=1.32n PJ=226.4u
+DI1_3_1_0_0_R0 vdd! I1_3_1_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=110p PJ=202.2u
+DI1_3_0_0_0_R0 vdd! I1_3_0_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=36p PJ=200.72u
+DI1_2_3_0_0_R0 vdd! I1_2_3_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=1.32n PJ=226.4u
+DI1_2_2_0_0_R0 vdd! I1_2_2_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=174.24p PJ=52.8u
+DI1_2_1_0_0_R0 vdd! I1_2_1_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=14.52p PJ=28.6u
+DI1_2_0_0_0_R0 vdd! I1_2_0_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=4.752p PJ=27.12u
+DI1_1_3_0_0_R0 vdd! I1_1_3_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=110p PJ=202.2u
+DI1_1_2_0_0_R0 vdd! I1_1_2_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=14.52p PJ=28.6u
+DI1_1_1_0_0_R0 vdd! I1_1_1_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=1.21p PJ=4.4u
+DI1_1_0_0_0_R0 vdd! I1_1_0_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=396f PJ=2.92u
+DI1_0_3_0_0_R0 vdd! I1_0_3_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=36p PJ=200.72u
+DI1_0_2_0_0_R0 vdd! I1_0_2_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=4.752p PJ=27.12u
+DI1_0_1_0_0_R0 vdd! I1_0_1_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=396f PJ=2.92u
+DI1_0_0_0_0_R0 vdd! I1_0_0_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=203.4f PJ=1.85u
+DI1_default vdd! I1_default_MINUS diode_nd2ps_06v0 m=1 AREA=1p PJ=4u
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_nd2ps_06v0_dn.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_nd2ps_06v0_dn.cdl
new file mode 100644
index 0000000..0f4d567
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_nd2ps_06v0_dn.cdl
@@ -0,0 +1,86 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: diode_nd2ps_06v0_dn
+* View Name:     schematic
+* Netlisted on:  Nov 24 09:17:22 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    diode_nd2ps_06v0_dn
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT diode_nd2ps_06v0_dn I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS 
++ I1_0_1_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS I1_0_2_0_0_R0_PLUS 
++ I1_0_3_0_0_R0_MINUS I1_0_3_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS 
++ I1_1_0_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS I1_1_1_0_0_R0_PLUS 
++ I1_1_2_0_0_R0_MINUS I1_1_2_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS 
++ I1_1_3_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS I1_2_0_0_0_R0_PLUS 
++ I1_2_1_0_0_R0_MINUS I1_2_1_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS 
++ I1_2_2_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS I1_2_3_0_0_R0_PLUS 
++ I1_3_0_0_0_R0_MINUS I1_3_0_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS 
++ I1_3_1_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS I1_3_2_0_0_R0_PLUS 
++ I1_3_3_0_0_R0_MINUS I1_3_3_0_0_R0_PLUS I1_default_MINUS I1_default_PLUS
+*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_0_0_0_R0_PLUS:I I1_0_1_0_0_R0_MINUS:I 
+*.PININFO I1_0_1_0_0_R0_PLUS:I I1_0_2_0_0_R0_MINUS:I I1_0_2_0_0_R0_PLUS:I 
+*.PININFO I1_0_3_0_0_R0_MINUS:I I1_0_3_0_0_R0_PLUS:I I1_1_0_0_0_R0_MINUS:I 
+*.PININFO I1_1_0_0_0_R0_PLUS:I I1_1_1_0_0_R0_MINUS:I I1_1_1_0_0_R0_PLUS:I 
+*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_2_0_0_R0_PLUS:I I1_1_3_0_0_R0_MINUS:I 
+*.PININFO I1_1_3_0_0_R0_PLUS:I I1_2_0_0_0_R0_MINUS:I I1_2_0_0_0_R0_PLUS:I 
+*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_1_0_0_R0_PLUS:I I1_2_2_0_0_R0_MINUS:I 
+*.PININFO I1_2_2_0_0_R0_PLUS:I I1_2_3_0_0_R0_MINUS:I I1_2_3_0_0_R0_PLUS:I 
+*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_0_0_0_R0_PLUS:I I1_3_1_0_0_R0_MINUS:I 
+*.PININFO I1_3_1_0_0_R0_PLUS:I I1_3_2_0_0_R0_MINUS:I I1_3_2_0_0_R0_PLUS:I 
+*.PININFO I1_3_3_0_0_R0_MINUS:I I1_3_3_0_0_R0_PLUS:I I1_default_MINUS:I 
+*.PININFO I1_default_PLUS:I
+DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS diode_nd2ps_06v0_dn m=1 AREA=10n 
++ PJ=400u
+DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS diode_nd2ps_06v0_dn m=1 AREA=1.32n 
++ PJ=226.4u
+DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS diode_nd2ps_06v0_dn m=1 AREA=110p 
++ PJ=202.2u
+DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS diode_nd2ps_06v0_dn m=1 AREA=56.5p 
++ PJ=201.13u
+DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS diode_nd2ps_06v0_dn m=1 AREA=1.32n 
++ PJ=226.4u
+DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS diode_nd2ps_06v0_dn m=1 
++ AREA=174.24p PJ=52.8u
+DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS diode_nd2ps_06v0_dn m=1 
++ AREA=14.52p PJ=28.6u
+DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS diode_nd2ps_06v0_dn m=1 
++ AREA=7.458p PJ=27.53u
+DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS diode_nd2ps_06v0_dn m=1 AREA=110p 
++ PJ=202.2u
+DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS diode_nd2ps_06v0_dn m=1 
++ AREA=14.52p PJ=28.6u
+DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS diode_nd2ps_06v0_dn m=1 AREA=1.21p 
++ PJ=4.4u
+DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS diode_nd2ps_06v0_dn m=1 
++ AREA=621.5f PJ=3.33u
+DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS diode_nd2ps_06v0_dn m=1 AREA=56.5p 
++ PJ=201.13u
+DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS diode_nd2ps_06v0_dn m=1 
++ AREA=7.458p PJ=27.53u
+DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS diode_nd2ps_06v0_dn m=1 
++ AREA=621.5f PJ=3.33u
+DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS diode_nd2ps_06v0_dn m=1 
++ AREA=319.225f PJ=2.26u
+DI1_default I1_default_PLUS I1_default_MINUS diode_nd2ps_06v0_dn m=1 AREA=1p PJ=4u
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_np_1p8.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_np_1p8.cdl
deleted file mode 100644
index 4d94bbb..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_np_1p8.cdl
+++ /dev/null
@@ -1,61 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: diode_np_1p8
-* View Name:     schematic
-* Netlisted on:  Nov 24 09:16:13 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-*.GLOBAL vdd!
-
-*.PIN vdd!
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    diode_np_1p8
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT diode_np_1p8 I1_0_0_0_0_R0_MINUS I1_0_1_0_0_R0_MINUS I1_0_2_0_0_R0_MINUS 
-+ I1_0_3_0_0_R0_MINUS I1_1_0_0_0_R0_MINUS I1_1_1_0_0_R0_MINUS 
-+ I1_1_2_0_0_R0_MINUS I1_1_3_0_0_R0_MINUS I1_2_0_0_0_R0_MINUS 
-+ I1_2_1_0_0_R0_MINUS I1_2_2_0_0_R0_MINUS I1_2_3_0_0_R0_MINUS 
-+ I1_3_0_0_0_R0_MINUS I1_3_1_0_0_R0_MINUS I1_3_2_0_0_R0_MINUS 
-+ I1_3_3_0_0_R0_MINUS I1_default_MINUS vdd!
-*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_1_0_0_R0_MINUS:I I1_0_2_0_0_R0_MINUS:I 
-*.PININFO I1_0_3_0_0_R0_MINUS:I I1_1_0_0_0_R0_MINUS:I I1_1_1_0_0_R0_MINUS:I 
-*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_3_0_0_R0_MINUS:I I1_2_0_0_0_R0_MINUS:I 
-*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_2_0_0_R0_MINUS:I I1_2_3_0_0_R0_MINUS:I 
-*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_1_0_0_R0_MINUS:I I1_3_2_0_0_R0_MINUS:I 
-*.PININFO I1_3_3_0_0_R0_MINUS:I I1_default_MINUS:I vdd!:I
-DI1_3_3_0_0_R0 vdd! I1_3_3_0_0_R0_MINUS diode_np_1p8 m=1 AREA=10n PJ=400u
-DI1_3_2_0_0_R0 vdd! I1_3_2_0_0_R0_MINUS diode_np_1p8 m=1 AREA=1.32n PJ=226.4u
-DI1_3_1_0_0_R0 vdd! I1_3_1_0_0_R0_MINUS diode_np_1p8 m=1 AREA=110p PJ=202.2u
-DI1_3_0_0_0_R0 vdd! I1_3_0_0_0_R0_MINUS diode_np_1p8 m=1 AREA=36p PJ=200.72u
-DI1_2_3_0_0_R0 vdd! I1_2_3_0_0_R0_MINUS diode_np_1p8 m=1 AREA=1.32n PJ=226.4u
-DI1_2_2_0_0_R0 vdd! I1_2_2_0_0_R0_MINUS diode_np_1p8 m=1 AREA=174.24p PJ=52.8u
-DI1_2_1_0_0_R0 vdd! I1_2_1_0_0_R0_MINUS diode_np_1p8 m=1 AREA=14.52p PJ=28.6u
-DI1_2_0_0_0_R0 vdd! I1_2_0_0_0_R0_MINUS diode_np_1p8 m=1 AREA=4.752p PJ=27.12u
-DI1_1_3_0_0_R0 vdd! I1_1_3_0_0_R0_MINUS diode_np_1p8 m=1 AREA=110p PJ=202.2u
-DI1_1_2_0_0_R0 vdd! I1_1_2_0_0_R0_MINUS diode_np_1p8 m=1 AREA=14.52p PJ=28.6u
-DI1_1_1_0_0_R0 vdd! I1_1_1_0_0_R0_MINUS diode_np_1p8 m=1 AREA=1.21p PJ=4.4u
-DI1_1_0_0_0_R0 vdd! I1_1_0_0_0_R0_MINUS diode_np_1p8 m=1 AREA=396f PJ=2.92u
-DI1_0_3_0_0_R0 vdd! I1_0_3_0_0_R0_MINUS diode_np_1p8 m=1 AREA=36p PJ=200.72u
-DI1_0_2_0_0_R0 vdd! I1_0_2_0_0_R0_MINUS diode_np_1p8 m=1 AREA=4.752p PJ=27.12u
-DI1_0_1_0_0_R0 vdd! I1_0_1_0_0_R0_MINUS diode_np_1p8 m=1 AREA=396f PJ=2.92u
-DI1_0_0_0_0_R0 vdd! I1_0_0_0_0_R0_MINUS diode_np_1p8 m=1 AREA=203.4f PJ=1.85u
-DI1_default vdd! I1_default_MINUS diode_np_1p8 m=1 AREA=1p PJ=4u
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_np_1p8_dw.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_np_1p8_dw.cdl
deleted file mode 100644
index 1c9cb7e..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_np_1p8_dw.cdl
+++ /dev/null
@@ -1,86 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: diode_np_1p8_dw
-* View Name:     schematic
-* Netlisted on:  Nov 24 09:17:22 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    diode_np_1p8_dw
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT diode_np_1p8_dw I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS 
-+ I1_0_1_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS I1_0_2_0_0_R0_PLUS 
-+ I1_0_3_0_0_R0_MINUS I1_0_3_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS 
-+ I1_1_0_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS I1_1_1_0_0_R0_PLUS 
-+ I1_1_2_0_0_R0_MINUS I1_1_2_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS 
-+ I1_1_3_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS I1_2_0_0_0_R0_PLUS 
-+ I1_2_1_0_0_R0_MINUS I1_2_1_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS 
-+ I1_2_2_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS I1_2_3_0_0_R0_PLUS 
-+ I1_3_0_0_0_R0_MINUS I1_3_0_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS 
-+ I1_3_1_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS I1_3_2_0_0_R0_PLUS 
-+ I1_3_3_0_0_R0_MINUS I1_3_3_0_0_R0_PLUS I1_default_MINUS I1_default_PLUS
-*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_0_0_0_R0_PLUS:I I1_0_1_0_0_R0_MINUS:I 
-*.PININFO I1_0_1_0_0_R0_PLUS:I I1_0_2_0_0_R0_MINUS:I I1_0_2_0_0_R0_PLUS:I 
-*.PININFO I1_0_3_0_0_R0_MINUS:I I1_0_3_0_0_R0_PLUS:I I1_1_0_0_0_R0_MINUS:I 
-*.PININFO I1_1_0_0_0_R0_PLUS:I I1_1_1_0_0_R0_MINUS:I I1_1_1_0_0_R0_PLUS:I 
-*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_2_0_0_R0_PLUS:I I1_1_3_0_0_R0_MINUS:I 
-*.PININFO I1_1_3_0_0_R0_PLUS:I I1_2_0_0_0_R0_MINUS:I I1_2_0_0_0_R0_PLUS:I 
-*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_1_0_0_R0_PLUS:I I1_2_2_0_0_R0_MINUS:I 
-*.PININFO I1_2_2_0_0_R0_PLUS:I I1_2_3_0_0_R0_MINUS:I I1_2_3_0_0_R0_PLUS:I 
-*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_0_0_0_R0_PLUS:I I1_3_1_0_0_R0_MINUS:I 
-*.PININFO I1_3_1_0_0_R0_PLUS:I I1_3_2_0_0_R0_MINUS:I I1_3_2_0_0_R0_PLUS:I 
-*.PININFO I1_3_3_0_0_R0_MINUS:I I1_3_3_0_0_R0_PLUS:I I1_default_MINUS:I 
-*.PININFO I1_default_PLUS:I
-DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS diode_np_1p8_dw m=1 AREA=10n 
-+ PJ=400u
-DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS diode_np_1p8_dw m=1 AREA=1.32n 
-+ PJ=226.4u
-DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS diode_np_1p8_dw m=1 AREA=110p 
-+ PJ=202.2u
-DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS diode_np_1p8_dw m=1 AREA=56.5p 
-+ PJ=201.13u
-DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS diode_np_1p8_dw m=1 AREA=1.32n 
-+ PJ=226.4u
-DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS diode_np_1p8_dw m=1 
-+ AREA=174.24p PJ=52.8u
-DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS diode_np_1p8_dw m=1 
-+ AREA=14.52p PJ=28.6u
-DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS diode_np_1p8_dw m=1 
-+ AREA=7.458p PJ=27.53u
-DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS diode_np_1p8_dw m=1 AREA=110p 
-+ PJ=202.2u
-DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS diode_np_1p8_dw m=1 
-+ AREA=14.52p PJ=28.6u
-DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS diode_np_1p8_dw m=1 AREA=1.21p 
-+ PJ=4.4u
-DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS diode_np_1p8_dw m=1 
-+ AREA=621.5f PJ=3.33u
-DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS diode_np_1p8_dw m=1 AREA=56.5p 
-+ PJ=201.13u
-DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS diode_np_1p8_dw m=1 
-+ AREA=7.458p PJ=27.53u
-DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS diode_np_1p8_dw m=1 
-+ AREA=621.5f PJ=3.33u
-DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS diode_np_1p8_dw m=1 
-+ AREA=319.225f PJ=2.26u
-DI1_default I1_default_PLUS I1_default_MINUS diode_np_1p8_dw m=1 AREA=1p PJ=4u
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_np_3p3.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_np_3p3.cdl
deleted file mode 100644
index 29240ea..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_np_3p3.cdl
+++ /dev/null
@@ -1,61 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: diode_np_3p3
-* View Name:     schematic
-* Netlisted on:  Nov 24 09:16:13 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-*.GLOBAL vdd!
-
-*.PIN vdd!
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    diode_np_3p3
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT diode_np_3p3 I1_0_0_0_0_R0_MINUS I1_0_1_0_0_R0_MINUS I1_0_2_0_0_R0_MINUS 
-+ I1_0_3_0_0_R0_MINUS I1_1_0_0_0_R0_MINUS I1_1_1_0_0_R0_MINUS 
-+ I1_1_2_0_0_R0_MINUS I1_1_3_0_0_R0_MINUS I1_2_0_0_0_R0_MINUS 
-+ I1_2_1_0_0_R0_MINUS I1_2_2_0_0_R0_MINUS I1_2_3_0_0_R0_MINUS 
-+ I1_3_0_0_0_R0_MINUS I1_3_1_0_0_R0_MINUS I1_3_2_0_0_R0_MINUS 
-+ I1_3_3_0_0_R0_MINUS I1_default_MINUS vdd!
-*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_1_0_0_R0_MINUS:I I1_0_2_0_0_R0_MINUS:I 
-*.PININFO I1_0_3_0_0_R0_MINUS:I I1_1_0_0_0_R0_MINUS:I I1_1_1_0_0_R0_MINUS:I 
-*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_3_0_0_R0_MINUS:I I1_2_0_0_0_R0_MINUS:I 
-*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_2_0_0_R0_MINUS:I I1_2_3_0_0_R0_MINUS:I 
-*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_1_0_0_R0_MINUS:I I1_3_2_0_0_R0_MINUS:I 
-*.PININFO I1_3_3_0_0_R0_MINUS:I I1_default_MINUS:I vdd!:I
-DI1_3_3_0_0_R0 vdd! I1_3_3_0_0_R0_MINUS diode_np_3p3 m=1 AREA=10n PJ=400u
-DI1_3_2_0_0_R0 vdd! I1_3_2_0_0_R0_MINUS diode_np_3p3 m=1 AREA=1.32n PJ=226.4u
-DI1_3_1_0_0_R0 vdd! I1_3_1_0_0_R0_MINUS diode_np_3p3 m=1 AREA=110p PJ=202.2u
-DI1_3_0_0_0_R0 vdd! I1_3_0_0_0_R0_MINUS diode_np_3p3 m=1 AREA=36p PJ=200.72u
-DI1_2_3_0_0_R0 vdd! I1_2_3_0_0_R0_MINUS diode_np_3p3 m=1 AREA=1.32n PJ=226.4u
-DI1_2_2_0_0_R0 vdd! I1_2_2_0_0_R0_MINUS diode_np_3p3 m=1 AREA=174.24p PJ=52.8u
-DI1_2_1_0_0_R0 vdd! I1_2_1_0_0_R0_MINUS diode_np_3p3 m=1 AREA=14.52p PJ=28.6u
-DI1_2_0_0_0_R0 vdd! I1_2_0_0_0_R0_MINUS diode_np_3p3 m=1 AREA=4.752p PJ=27.12u
-DI1_1_3_0_0_R0 vdd! I1_1_3_0_0_R0_MINUS diode_np_3p3 m=1 AREA=110p PJ=202.2u
-DI1_1_2_0_0_R0 vdd! I1_1_2_0_0_R0_MINUS diode_np_3p3 m=1 AREA=14.52p PJ=28.6u
-DI1_1_1_0_0_R0 vdd! I1_1_1_0_0_R0_MINUS diode_np_3p3 m=1 AREA=1.21p PJ=4.4u
-DI1_1_0_0_0_R0 vdd! I1_1_0_0_0_R0_MINUS diode_np_3p3 m=1 AREA=396f PJ=2.92u
-DI1_0_3_0_0_R0 vdd! I1_0_3_0_0_R0_MINUS diode_np_3p3 m=1 AREA=36p PJ=200.72u
-DI1_0_2_0_0_R0 vdd! I1_0_2_0_0_R0_MINUS diode_np_3p3 m=1 AREA=4.752p PJ=27.12u
-DI1_0_1_0_0_R0 vdd! I1_0_1_0_0_R0_MINUS diode_np_3p3 m=1 AREA=396f PJ=2.92u
-DI1_0_0_0_0_R0 vdd! I1_0_0_0_0_R0_MINUS diode_np_3p3 m=1 AREA=203.4f PJ=1.85u
-DI1_default vdd! I1_default_MINUS diode_np_3p3 m=1 AREA=1p PJ=4u
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_np_3p3_dw.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_np_3p3_dw.cdl
deleted file mode 100644
index c305c9c..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_np_3p3_dw.cdl
+++ /dev/null
@@ -1,86 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: diode_np_3p3_dw
-* View Name:     schematic
-* Netlisted on:  Nov 24 09:17:22 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    diode_np_3p3_dw
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT diode_np_3p3_dw I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS 
-+ I1_0_1_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS I1_0_2_0_0_R0_PLUS 
-+ I1_0_3_0_0_R0_MINUS I1_0_3_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS 
-+ I1_1_0_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS I1_1_1_0_0_R0_PLUS 
-+ I1_1_2_0_0_R0_MINUS I1_1_2_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS 
-+ I1_1_3_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS I1_2_0_0_0_R0_PLUS 
-+ I1_2_1_0_0_R0_MINUS I1_2_1_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS 
-+ I1_2_2_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS I1_2_3_0_0_R0_PLUS 
-+ I1_3_0_0_0_R0_MINUS I1_3_0_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS 
-+ I1_3_1_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS I1_3_2_0_0_R0_PLUS 
-+ I1_3_3_0_0_R0_MINUS I1_3_3_0_0_R0_PLUS I1_default_MINUS I1_default_PLUS
-*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_0_0_0_R0_PLUS:I I1_0_1_0_0_R0_MINUS:I 
-*.PININFO I1_0_1_0_0_R0_PLUS:I I1_0_2_0_0_R0_MINUS:I I1_0_2_0_0_R0_PLUS:I 
-*.PININFO I1_0_3_0_0_R0_MINUS:I I1_0_3_0_0_R0_PLUS:I I1_1_0_0_0_R0_MINUS:I 
-*.PININFO I1_1_0_0_0_R0_PLUS:I I1_1_1_0_0_R0_MINUS:I I1_1_1_0_0_R0_PLUS:I 
-*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_2_0_0_R0_PLUS:I I1_1_3_0_0_R0_MINUS:I 
-*.PININFO I1_1_3_0_0_R0_PLUS:I I1_2_0_0_0_R0_MINUS:I I1_2_0_0_0_R0_PLUS:I 
-*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_1_0_0_R0_PLUS:I I1_2_2_0_0_R0_MINUS:I 
-*.PININFO I1_2_2_0_0_R0_PLUS:I I1_2_3_0_0_R0_MINUS:I I1_2_3_0_0_R0_PLUS:I 
-*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_0_0_0_R0_PLUS:I I1_3_1_0_0_R0_MINUS:I 
-*.PININFO I1_3_1_0_0_R0_PLUS:I I1_3_2_0_0_R0_MINUS:I I1_3_2_0_0_R0_PLUS:I 
-*.PININFO I1_3_3_0_0_R0_MINUS:I I1_3_3_0_0_R0_PLUS:I I1_default_MINUS:I 
-*.PININFO I1_default_PLUS:I
-DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS diode_np_3p3_dw m=1 AREA=10n 
-+ PJ=400u
-DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS diode_np_3p3_dw m=1 AREA=1.32n 
-+ PJ=226.4u
-DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS diode_np_3p3_dw m=1 AREA=110p 
-+ PJ=202.2u
-DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS diode_np_3p3_dw m=1 AREA=56.5p 
-+ PJ=201.13u
-DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS diode_np_3p3_dw m=1 AREA=1.32n 
-+ PJ=226.4u
-DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS diode_np_3p3_dw m=1 
-+ AREA=174.24p PJ=52.8u
-DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS diode_np_3p3_dw m=1 
-+ AREA=14.52p PJ=28.6u
-DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS diode_np_3p3_dw m=1 
-+ AREA=7.458p PJ=27.53u
-DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS diode_np_3p3_dw m=1 AREA=110p 
-+ PJ=202.2u
-DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS diode_np_3p3_dw m=1 
-+ AREA=14.52p PJ=28.6u
-DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS diode_np_3p3_dw m=1 AREA=1.21p 
-+ PJ=4.4u
-DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS diode_np_3p3_dw m=1 
-+ AREA=621.5f PJ=3.33u
-DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS diode_np_3p3_dw m=1 AREA=56.5p 
-+ PJ=201.13u
-DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS diode_np_3p3_dw m=1 
-+ AREA=7.458p PJ=27.53u
-DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS diode_np_3p3_dw m=1 
-+ AREA=621.5f PJ=3.33u
-DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS diode_np_3p3_dw m=1 
-+ AREA=319.225f PJ=2.26u
-DI1_default I1_default_PLUS I1_default_MINUS diode_np_3p3_dw m=1 AREA=1p PJ=4u
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_np_6p0.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_np_6p0.cdl
deleted file mode 100644
index 4c9112e..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_np_6p0.cdl
+++ /dev/null
@@ -1,61 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: diode_np_6p0_dw
-* View Name:     schematic
-* Netlisted on:  Nov 24 09:18:14 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-*.GLOBAL vdd!
-
-*.PIN vdd!
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    diode_np_6p0_dw
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT diode_np_6p0_dw I1_0_0_0_0_R0_MINUS I1_0_1_0_0_R0_MINUS I1_0_2_0_0_R0_MINUS 
-+ I1_0_3_0_0_R0_MINUS I1_1_0_0_0_R0_MINUS I1_1_1_0_0_R0_MINUS 
-+ I1_1_2_0_0_R0_MINUS I1_1_3_0_0_R0_MINUS I1_2_0_0_0_R0_MINUS 
-+ I1_2_1_0_0_R0_MINUS I1_2_2_0_0_R0_MINUS I1_2_3_0_0_R0_MINUS 
-+ I1_3_0_0_0_R0_MINUS I1_3_1_0_0_R0_MINUS I1_3_2_0_0_R0_MINUS 
-+ I1_3_3_0_0_R0_MINUS I1_default_MINUS vdd!
-*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_1_0_0_R0_MINUS:I I1_0_2_0_0_R0_MINUS:I 
-*.PININFO I1_0_3_0_0_R0_MINUS:I I1_1_0_0_0_R0_MINUS:I I1_1_1_0_0_R0_MINUS:I 
-*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_3_0_0_R0_MINUS:I I1_2_0_0_0_R0_MINUS:I 
-*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_2_0_0_R0_MINUS:I I1_2_3_0_0_R0_MINUS:I 
-*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_1_0_0_R0_MINUS:I I1_3_2_0_0_R0_MINUS:I 
-*.PININFO I1_3_3_0_0_R0_MINUS:I I1_default_MINUS:I vdd!:I
-DI1_3_3_0_0_R0 vdd! I1_3_3_0_0_R0_MINUS diode_np_6p0_dw m=1 AREA=10n PJ=400u
-DI1_3_2_0_0_R0 vdd! I1_3_2_0_0_R0_MINUS diode_np_6p0_dw m=1 AREA=1.32n PJ=226.4u
-DI1_3_1_0_0_R0 vdd! I1_3_1_0_0_R0_MINUS diode_np_6p0_dw m=1 AREA=110p PJ=202.2u
-DI1_3_0_0_0_R0 vdd! I1_3_0_0_0_R0_MINUS diode_np_6p0_dw m=1 AREA=36p PJ=200.72u
-DI1_2_3_0_0_R0 vdd! I1_2_3_0_0_R0_MINUS diode_np_6p0_dw m=1 AREA=1.32n PJ=226.4u
-DI1_2_2_0_0_R0 vdd! I1_2_2_0_0_R0_MINUS diode_np_6p0_dw m=1 AREA=174.24p PJ=52.8u
-DI1_2_1_0_0_R0 vdd! I1_2_1_0_0_R0_MINUS diode_np_6p0_dw m=1 AREA=14.52p PJ=28.6u
-DI1_2_0_0_0_R0 vdd! I1_2_0_0_0_R0_MINUS diode_np_6p0_dw m=1 AREA=4.752p PJ=27.12u
-DI1_1_3_0_0_R0 vdd! I1_1_3_0_0_R0_MINUS diode_np_6p0_dw m=1 AREA=110p PJ=202.2u
-DI1_1_2_0_0_R0 vdd! I1_1_2_0_0_R0_MINUS diode_np_6p0_dw m=1 AREA=14.52p PJ=28.6u
-DI1_1_1_0_0_R0 vdd! I1_1_1_0_0_R0_MINUS diode_np_6p0_dw m=1 AREA=1.21p PJ=4.4u
-DI1_1_0_0_0_R0 vdd! I1_1_0_0_0_R0_MINUS diode_np_6p0_dw m=1 AREA=396f PJ=2.92u
-DI1_0_3_0_0_R0 vdd! I1_0_3_0_0_R0_MINUS diode_np_6p0_dw m=1 AREA=36p PJ=200.72u
-DI1_0_2_0_0_R0 vdd! I1_0_2_0_0_R0_MINUS diode_np_6p0_dw m=1 AREA=4.752p PJ=27.12u
-DI1_0_1_0_0_R0 vdd! I1_0_1_0_0_R0_MINUS diode_np_6p0_dw m=1 AREA=396f PJ=2.92u
-DI1_0_0_0_0_R0 vdd! I1_0_0_0_0_R0_MINUS diode_np_6p0_dw m=1 AREA=203.4f PJ=1.85u
-DI1_default vdd! I1_default_MINUS diode_np_6p0_dw m=1 AREA=1p PJ=4u
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_np_6p0_dw.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_np_6p0_dw.cdl
deleted file mode 100644
index d787047..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_np_6p0_dw.cdl
+++ /dev/null
@@ -1,86 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: diode_np_6p0_dw
-* View Name:     schematic
-* Netlisted on:  Nov 24 09:18:59 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    diode_np_6p0_dw
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT diode_np_6p0_dw I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS 
-+ I1_0_1_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS I1_0_2_0_0_R0_PLUS 
-+ I1_0_3_0_0_R0_MINUS I1_0_3_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS 
-+ I1_1_0_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS I1_1_1_0_0_R0_PLUS 
-+ I1_1_2_0_0_R0_MINUS I1_1_2_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS 
-+ I1_1_3_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS I1_2_0_0_0_R0_PLUS 
-+ I1_2_1_0_0_R0_MINUS I1_2_1_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS 
-+ I1_2_2_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS I1_2_3_0_0_R0_PLUS 
-+ I1_3_0_0_0_R0_MINUS I1_3_0_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS 
-+ I1_3_1_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS I1_3_2_0_0_R0_PLUS 
-+ I1_3_3_0_0_R0_MINUS I1_3_3_0_0_R0_PLUS I1_default_MINUS I1_default_PLUS
-*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_0_0_0_R0_PLUS:I I1_0_1_0_0_R0_MINUS:I 
-*.PININFO I1_0_1_0_0_R0_PLUS:I I1_0_2_0_0_R0_MINUS:I I1_0_2_0_0_R0_PLUS:I 
-*.PININFO I1_0_3_0_0_R0_MINUS:I I1_0_3_0_0_R0_PLUS:I I1_1_0_0_0_R0_MINUS:I 
-*.PININFO I1_1_0_0_0_R0_PLUS:I I1_1_1_0_0_R0_MINUS:I I1_1_1_0_0_R0_PLUS:I 
-*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_2_0_0_R0_PLUS:I I1_1_3_0_0_R0_MINUS:I 
-*.PININFO I1_1_3_0_0_R0_PLUS:I I1_2_0_0_0_R0_MINUS:I I1_2_0_0_0_R0_PLUS:I 
-*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_1_0_0_R0_PLUS:I I1_2_2_0_0_R0_MINUS:I 
-*.PININFO I1_2_2_0_0_R0_PLUS:I I1_2_3_0_0_R0_MINUS:I I1_2_3_0_0_R0_PLUS:I 
-*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_0_0_0_R0_PLUS:I I1_3_1_0_0_R0_MINUS:I 
-*.PININFO I1_3_1_0_0_R0_PLUS:I I1_3_2_0_0_R0_MINUS:I I1_3_2_0_0_R0_PLUS:I 
-*.PININFO I1_3_3_0_0_R0_MINUS:I I1_3_3_0_0_R0_PLUS:I I1_default_MINUS:I 
-*.PININFO I1_default_PLUS:I
-DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS diode_np_6p0_dw m=1 AREA=10n 
-+ PJ=400u
-DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS diode_np_6p0_dw m=1 AREA=1.32n 
-+ PJ=226.4u
-DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS diode_np_6p0_dw m=1 AREA=110p 
-+ PJ=202.2u
-DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS diode_np_6p0_dw m=1 AREA=56.5p 
-+ PJ=201.13u
-DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS diode_np_6p0_dw m=1 AREA=1.32n 
-+ PJ=226.4u
-DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS diode_np_6p0_dw m=1 
-+ AREA=174.24p PJ=52.8u
-DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS diode_np_6p0_dw m=1 
-+ AREA=14.52p PJ=28.6u
-DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS diode_np_6p0_dw m=1 
-+ AREA=7.458p PJ=27.53u
-DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS diode_np_6p0_dw m=1 AREA=110p 
-+ PJ=202.2u
-DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS diode_np_6p0_dw m=1 
-+ AREA=14.52p PJ=28.6u
-DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS diode_np_6p0_dw m=1 AREA=1.21p 
-+ PJ=4.4u
-DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS diode_np_6p0_dw m=1 
-+ AREA=621.5f PJ=3.33u
-DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS diode_np_6p0_dw m=1 AREA=56.5p 
-+ PJ=201.13u
-DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS diode_np_6p0_dw m=1 
-+ AREA=7.458p PJ=27.53u
-DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS diode_np_6p0_dw m=1 
-+ AREA=621.5f PJ=3.33u
-DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS diode_np_6p0_dw m=1 
-+ AREA=319.225f PJ=2.26u
-DI1_default I1_default_PLUS I1_default_MINUS diode_np_6p0_dw m=1 AREA=1p PJ=4u
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_nwp_6p0.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_nwp_6p0.cdl
deleted file mode 100644
index b07171d..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_nwp_6p0.cdl
+++ /dev/null
@@ -1,61 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: diode_nwp_6p0
-* View Name:     schematic
-* Netlisted on:  Nov 24 09:43:35 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-*.GLOBAL vdd!
-
-*.PIN vdd!
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    diode_nwp_6p0
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT diode_nwp_6p0 I1_0_0_0_0_R0_MINUS I1_0_1_0_0_R0_MINUS I1_0_2_0_0_R0_MINUS 
-+ I1_0_3_0_0_R0_MINUS I1_1_0_0_0_R0_MINUS I1_1_1_0_0_R0_MINUS 
-+ I1_1_2_0_0_R0_MINUS I1_1_3_0_0_R0_MINUS I1_2_0_0_0_R0_MINUS 
-+ I1_2_1_0_0_R0_MINUS I1_2_2_0_0_R0_MINUS I1_2_3_0_0_R0_MINUS 
-+ I1_3_0_0_0_R0_MINUS I1_3_1_0_0_R0_MINUS I1_3_2_0_0_R0_MINUS 
-+ I1_3_3_0_0_R0_MINUS I1_default_MINUS vdd!
-*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_1_0_0_R0_MINUS:I I1_0_2_0_0_R0_MINUS:I 
-*.PININFO I1_0_3_0_0_R0_MINUS:I I1_1_0_0_0_R0_MINUS:I I1_1_1_0_0_R0_MINUS:I 
-*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_3_0_0_R0_MINUS:I I1_2_0_0_0_R0_MINUS:I 
-*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_2_0_0_R0_MINUS:I I1_2_3_0_0_R0_MINUS:I 
-*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_1_0_0_R0_MINUS:I I1_3_2_0_0_R0_MINUS:I 
-*.PININFO I1_3_3_0_0_R0_MINUS:I I1_default_MINUS:I vdd!:I
-DI1_3_3_0_0_R0 vdd! I1_3_3_0_0_R0_MINUS diode_nwp_6p0 m=1 AREA=10n PJ=400u
-DI1_3_2_0_0_R0 vdd! I1_3_2_0_0_R0_MINUS diode_nwp_6p0 m=1 AREA=1.21n PJ=224.2u
-DI1_3_1_0_0_R0 vdd! I1_3_1_0_0_R0_MINUS diode_nwp_6p0 m=1 AREA=123p PJ=202.46u
-DI1_3_0_0_0_R0 vdd! I1_3_0_0_0_R0_MINUS diode_nwp_6p0 m=1 AREA=86p PJ=201.72u
-DI1_2_3_0_0_R0 vdd! I1_2_3_0_0_R0_MINUS diode_nwp_6p0 m=1 AREA=1.21n PJ=224.2u
-DI1_2_2_0_0_R0 vdd! I1_2_2_0_0_R0_MINUS diode_nwp_6p0 m=1 AREA=146.41p PJ=48.4u
-DI1_2_1_0_0_R0 vdd! I1_2_1_0_0_R0_MINUS diode_nwp_6p0 m=1 AREA=14.883p PJ=26.66u
-DI1_2_0_0_0_R0 vdd! I1_2_0_0_0_R0_MINUS diode_nwp_6p0 m=1 AREA=10.406p PJ=25.92u
-DI1_1_3_0_0_R0 vdd! I1_1_3_0_0_R0_MINUS diode_nwp_6p0 m=1 AREA=123p PJ=202.46u
-DI1_1_2_0_0_R0 vdd! I1_1_2_0_0_R0_MINUS diode_nwp_6p0 m=1 AREA=14.883p PJ=26.66u
-DI1_1_1_0_0_R0 vdd! I1_1_1_0_0_R0_MINUS diode_nwp_6p0 m=1 AREA=1.5129p PJ=4.92u
-DI1_1_0_0_0_R0 vdd! I1_1_0_0_0_R0_MINUS diode_nwp_6p0 m=1 AREA=1.0578p PJ=4.18u
-DI1_0_3_0_0_R0 vdd! I1_0_3_0_0_R0_MINUS diode_nwp_6p0 m=1 AREA=86p PJ=201.72u
-DI1_0_2_0_0_R0 vdd! I1_0_2_0_0_R0_MINUS diode_nwp_6p0 m=1 AREA=10.406p PJ=25.92u
-DI1_0_1_0_0_R0 vdd! I1_0_1_0_0_R0_MINUS diode_nwp_6p0 m=1 AREA=1.0578p PJ=4.18u
-DI1_0_0_0_0_R0 vdd! I1_0_0_0_0_R0_MINUS diode_nwp_6p0 m=1 AREA=739.6f PJ=3.44u
-DI1_default vdd! I1_default_MINUS diode_nwp_6p0 m=1 AREA=1p PJ=4u
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pd2nw_01v8.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pd2nw_01v8.cdl
new file mode 100644
index 0000000..8f87022
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pd2nw_01v8.cdl
@@ -0,0 +1,86 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: diode_pd2nw_01v8
+* View Name:     schematic
+* Netlisted on:  Nov 24 09:49:28 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    diode_pd2nw_01v8
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT diode_pd2nw_01v8 I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS 
++ I1_0_1_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS I1_0_2_0_0_R0_PLUS 
++ I1_0_3_0_0_R0_MINUS I1_0_3_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS 
++ I1_1_0_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS I1_1_1_0_0_R0_PLUS 
++ I1_1_2_0_0_R0_MINUS I1_1_2_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS 
++ I1_1_3_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS I1_2_0_0_0_R0_PLUS 
++ I1_2_1_0_0_R0_MINUS I1_2_1_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS 
++ I1_2_2_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS I1_2_3_0_0_R0_PLUS 
++ I1_3_0_0_0_R0_MINUS I1_3_0_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS 
++ I1_3_1_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS I1_3_2_0_0_R0_PLUS 
++ I1_3_3_0_0_R0_MINUS I1_3_3_0_0_R0_PLUS I1_default_MINUS I1_default_PLUS
+*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_0_0_0_R0_PLUS:I I1_0_1_0_0_R0_MINUS:I 
+*.PININFO I1_0_1_0_0_R0_PLUS:I I1_0_2_0_0_R0_MINUS:I I1_0_2_0_0_R0_PLUS:I 
+*.PININFO I1_0_3_0_0_R0_MINUS:I I1_0_3_0_0_R0_PLUS:I I1_1_0_0_0_R0_MINUS:I 
+*.PININFO I1_1_0_0_0_R0_PLUS:I I1_1_1_0_0_R0_MINUS:I I1_1_1_0_0_R0_PLUS:I 
+*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_2_0_0_R0_PLUS:I I1_1_3_0_0_R0_MINUS:I 
+*.PININFO I1_1_3_0_0_R0_PLUS:I I1_2_0_0_0_R0_MINUS:I I1_2_0_0_0_R0_PLUS:I 
+*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_1_0_0_R0_PLUS:I I1_2_2_0_0_R0_MINUS:I 
+*.PININFO I1_2_2_0_0_R0_PLUS:I I1_2_3_0_0_R0_MINUS:I I1_2_3_0_0_R0_PLUS:I 
+*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_0_0_0_R0_PLUS:I I1_3_1_0_0_R0_MINUS:I 
+*.PININFO I1_3_1_0_0_R0_PLUS:I I1_3_2_0_0_R0_MINUS:I I1_3_2_0_0_R0_PLUS:I 
+*.PININFO I1_3_3_0_0_R0_MINUS:I I1_3_3_0_0_R0_PLUS:I I1_default_MINUS:I 
+*.PININFO I1_default_PLUS:I
+DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS diode_pd2nw_01v8 m=1 AREA=10n 
++ PJ=400u
+DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS diode_pd2nw_01v8 m=1 AREA=1.32n 
++ PJ=226.4u
+DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS diode_pd2nw_01v8 m=1 AREA=110p 
++ PJ=202.2u
+DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS diode_pd2nw_01v8 m=1 AREA=36p 
++ PJ=200.72u
+DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS diode_pd2nw_01v8 m=1 AREA=1.32n 
++ PJ=226.4u
+DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS diode_pd2nw_01v8 m=1 AREA=174.24p 
++ PJ=52.8u
+DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS diode_pd2nw_01v8 m=1 AREA=14.52p 
++ PJ=28.6u
+DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS diode_pd2nw_01v8 m=1 AREA=4.752p 
++ PJ=27.12u
+DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS diode_pd2nw_01v8 m=1 AREA=110p 
++ PJ=202.2u
+DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS diode_pd2nw_01v8 m=1 AREA=14.52p 
++ PJ=28.6u
+DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS diode_pd2nw_01v8 m=1 AREA=1.21p 
++ PJ=4.4u
+DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS diode_pd2nw_01v8 m=1 AREA=396f 
++ PJ=2.92u
+DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS diode_pd2nw_01v8 m=1 AREA=36p 
++ PJ=200.72u
+DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS diode_pd2nw_01v8 m=1 AREA=4.752p 
++ PJ=27.12u
+DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS diode_pd2nw_01v8 m=1 AREA=396f 
++ PJ=2.92u
+DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS diode_pd2nw_01v8 m=1 AREA=203.4f 
++ PJ=1.85u
+DI1_default I1_default_PLUS I1_default_MINUS diode_pd2nw_01v8 m=1 AREA=1p PJ=4u
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pd2nw_01v8_dn.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pd2nw_01v8_dn.cdl
new file mode 100644
index 0000000..472e9a9
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pd2nw_01v8_dn.cdl
@@ -0,0 +1,86 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: diode_pd2nw_01v8_dn
+* View Name:     schematic
+* Netlisted on:  Nov 24 09:50:00 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    diode_pd2nw_01v8_dn
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT diode_pd2nw_01v8_dn I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS 
++ I1_0_1_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS I1_0_2_0_0_R0_PLUS 
++ I1_0_3_0_0_R0_MINUS I1_0_3_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS 
++ I1_1_0_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS I1_1_1_0_0_R0_PLUS 
++ I1_1_2_0_0_R0_MINUS I1_1_2_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS 
++ I1_1_3_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS I1_2_0_0_0_R0_PLUS 
++ I1_2_1_0_0_R0_MINUS I1_2_1_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS 
++ I1_2_2_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS I1_2_3_0_0_R0_PLUS 
++ I1_3_0_0_0_R0_MINUS I1_3_0_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS 
++ I1_3_1_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS I1_3_2_0_0_R0_PLUS 
++ I1_3_3_0_0_R0_MINUS I1_3_3_0_0_R0_PLUS I1_default_MINUS I1_default_PLUS
+*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_0_0_0_R0_PLUS:I I1_0_1_0_0_R0_MINUS:I 
+*.PININFO I1_0_1_0_0_R0_PLUS:I I1_0_2_0_0_R0_MINUS:I I1_0_2_0_0_R0_PLUS:I 
+*.PININFO I1_0_3_0_0_R0_MINUS:I I1_0_3_0_0_R0_PLUS:I I1_1_0_0_0_R0_MINUS:I 
+*.PININFO I1_1_0_0_0_R0_PLUS:I I1_1_1_0_0_R0_MINUS:I I1_1_1_0_0_R0_PLUS:I 
+*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_2_0_0_R0_PLUS:I I1_1_3_0_0_R0_MINUS:I 
+*.PININFO I1_1_3_0_0_R0_PLUS:I I1_2_0_0_0_R0_MINUS:I I1_2_0_0_0_R0_PLUS:I 
+*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_1_0_0_R0_PLUS:I I1_2_2_0_0_R0_MINUS:I 
+*.PININFO I1_2_2_0_0_R0_PLUS:I I1_2_3_0_0_R0_MINUS:I I1_2_3_0_0_R0_PLUS:I 
+*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_0_0_0_R0_PLUS:I I1_3_1_0_0_R0_MINUS:I 
+*.PININFO I1_3_1_0_0_R0_PLUS:I I1_3_2_0_0_R0_MINUS:I I1_3_2_0_0_R0_PLUS:I 
+*.PININFO I1_3_3_0_0_R0_MINUS:I I1_3_3_0_0_R0_PLUS:I I1_default_MINUS:I 
+*.PININFO I1_default_PLUS:I
+DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS diode_pd2nw_01v8_dn m=1 AREA=10n 
++ PJ=400u
+DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS diode_pd2nw_01v8_dn m=1 AREA=1.32n 
++ PJ=226.4u
+DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS diode_pd2nw_01v8_dn m=1 AREA=110p 
++ PJ=202.2u
+DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS diode_pd2nw_01v8_dn m=1 AREA=56.5p 
++ PJ=201.13u
+DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS diode_pd2nw_01v8_dn m=1 AREA=1.32n 
++ PJ=226.4u
+DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS diode_pd2nw_01v8_dn m=1 
++ AREA=174.24p PJ=52.8u
+DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS diode_pd2nw_01v8_dn m=1 
++ AREA=14.52p PJ=28.6u
+DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS diode_pd2nw_01v8_dn m=1 
++ AREA=7.458p PJ=27.53u
+DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS diode_pd2nw_01v8_dn m=1 AREA=110p 
++ PJ=202.2u
+DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS diode_pd2nw_01v8_dn m=1 
++ AREA=14.52p PJ=28.6u
+DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS diode_pd2nw_01v8_dn m=1 AREA=1.21p 
++ PJ=4.4u
+DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS diode_pd2nw_01v8_dn m=1 
++ AREA=621.5f PJ=3.33u
+DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS diode_pd2nw_01v8_dn m=1 AREA=56.5p 
++ PJ=201.13u
+DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS diode_pd2nw_01v8_dn m=1 
++ AREA=7.458p PJ=27.53u
+DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS diode_pd2nw_01v8_dn m=1 
++ AREA=621.5f PJ=3.33u
+DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS diode_pd2nw_01v8_dn m=1 
++ AREA=319.225f PJ=2.26u
+DI1_default I1_default_PLUS I1_default_MINUS diode_pd2nw_01v8_dn m=1 AREA=1p PJ=4u
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pd2nw_03v3.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pd2nw_03v3.cdl
new file mode 100644
index 0000000..db76654
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pd2nw_03v3.cdl
@@ -0,0 +1,86 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: diode_pd2nw_03v3
+* View Name:     schematic
+* Netlisted on:  Nov 24 09:49:28 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    diode_pd2nw_03v3
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT diode_pd2nw_03v3 I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS 
++ I1_0_1_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS I1_0_2_0_0_R0_PLUS 
++ I1_0_3_0_0_R0_MINUS I1_0_3_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS 
++ I1_1_0_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS I1_1_1_0_0_R0_PLUS 
++ I1_1_2_0_0_R0_MINUS I1_1_2_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS 
++ I1_1_3_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS I1_2_0_0_0_R0_PLUS 
++ I1_2_1_0_0_R0_MINUS I1_2_1_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS 
++ I1_2_2_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS I1_2_3_0_0_R0_PLUS 
++ I1_3_0_0_0_R0_MINUS I1_3_0_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS 
++ I1_3_1_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS I1_3_2_0_0_R0_PLUS 
++ I1_3_3_0_0_R0_MINUS I1_3_3_0_0_R0_PLUS I1_default_MINUS I1_default_PLUS
+*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_0_0_0_R0_PLUS:I I1_0_1_0_0_R0_MINUS:I 
+*.PININFO I1_0_1_0_0_R0_PLUS:I I1_0_2_0_0_R0_MINUS:I I1_0_2_0_0_R0_PLUS:I 
+*.PININFO I1_0_3_0_0_R0_MINUS:I I1_0_3_0_0_R0_PLUS:I I1_1_0_0_0_R0_MINUS:I 
+*.PININFO I1_1_0_0_0_R0_PLUS:I I1_1_1_0_0_R0_MINUS:I I1_1_1_0_0_R0_PLUS:I 
+*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_2_0_0_R0_PLUS:I I1_1_3_0_0_R0_MINUS:I 
+*.PININFO I1_1_3_0_0_R0_PLUS:I I1_2_0_0_0_R0_MINUS:I I1_2_0_0_0_R0_PLUS:I 
+*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_1_0_0_R0_PLUS:I I1_2_2_0_0_R0_MINUS:I 
+*.PININFO I1_2_2_0_0_R0_PLUS:I I1_2_3_0_0_R0_MINUS:I I1_2_3_0_0_R0_PLUS:I 
+*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_0_0_0_R0_PLUS:I I1_3_1_0_0_R0_MINUS:I 
+*.PININFO I1_3_1_0_0_R0_PLUS:I I1_3_2_0_0_R0_MINUS:I I1_3_2_0_0_R0_PLUS:I 
+*.PININFO I1_3_3_0_0_R0_MINUS:I I1_3_3_0_0_R0_PLUS:I I1_default_MINUS:I 
+*.PININFO I1_default_PLUS:I
+DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=10n 
++ PJ=400u
+DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=1.32n 
++ PJ=226.4u
+DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=110p 
++ PJ=202.2u
+DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=36p 
++ PJ=200.72u
+DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=1.32n 
++ PJ=226.4u
+DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=174.24p 
++ PJ=52.8u
+DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=14.52p 
++ PJ=28.6u
+DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=4.752p 
++ PJ=27.12u
+DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=110p 
++ PJ=202.2u
+DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=14.52p 
++ PJ=28.6u
+DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=1.21p 
++ PJ=4.4u
+DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=396f 
++ PJ=2.92u
+DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=36p 
++ PJ=200.72u
+DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=4.752p 
++ PJ=27.12u
+DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=396f 
++ PJ=2.92u
+DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=203.4f 
++ PJ=1.85u
+DI1_default I1_default_PLUS I1_default_MINUS diode_pd2nw_03v3 m=1 AREA=1p PJ=4u
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pd2nw_03v3_dn.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pd2nw_03v3_dn.cdl
new file mode 100644
index 0000000..eef2026
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pd2nw_03v3_dn.cdl
@@ -0,0 +1,86 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: diode_pd2nw_03v3_dn
+* View Name:     schematic
+* Netlisted on:  Nov 24 09:50:00 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    diode_pd2nw_03v3_dn
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT diode_pd2nw_03v3_dn I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS 
++ I1_0_1_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS I1_0_2_0_0_R0_PLUS 
++ I1_0_3_0_0_R0_MINUS I1_0_3_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS 
++ I1_1_0_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS I1_1_1_0_0_R0_PLUS 
++ I1_1_2_0_0_R0_MINUS I1_1_2_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS 
++ I1_1_3_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS I1_2_0_0_0_R0_PLUS 
++ I1_2_1_0_0_R0_MINUS I1_2_1_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS 
++ I1_2_2_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS I1_2_3_0_0_R0_PLUS 
++ I1_3_0_0_0_R0_MINUS I1_3_0_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS 
++ I1_3_1_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS I1_3_2_0_0_R0_PLUS 
++ I1_3_3_0_0_R0_MINUS I1_3_3_0_0_R0_PLUS I1_default_MINUS I1_default_PLUS
+*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_0_0_0_R0_PLUS:I I1_0_1_0_0_R0_MINUS:I 
+*.PININFO I1_0_1_0_0_R0_PLUS:I I1_0_2_0_0_R0_MINUS:I I1_0_2_0_0_R0_PLUS:I 
+*.PININFO I1_0_3_0_0_R0_MINUS:I I1_0_3_0_0_R0_PLUS:I I1_1_0_0_0_R0_MINUS:I 
+*.PININFO I1_1_0_0_0_R0_PLUS:I I1_1_1_0_0_R0_MINUS:I I1_1_1_0_0_R0_PLUS:I 
+*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_2_0_0_R0_PLUS:I I1_1_3_0_0_R0_MINUS:I 
+*.PININFO I1_1_3_0_0_R0_PLUS:I I1_2_0_0_0_R0_MINUS:I I1_2_0_0_0_R0_PLUS:I 
+*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_1_0_0_R0_PLUS:I I1_2_2_0_0_R0_MINUS:I 
+*.PININFO I1_2_2_0_0_R0_PLUS:I I1_2_3_0_0_R0_MINUS:I I1_2_3_0_0_R0_PLUS:I 
+*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_0_0_0_R0_PLUS:I I1_3_1_0_0_R0_MINUS:I 
+*.PININFO I1_3_1_0_0_R0_PLUS:I I1_3_2_0_0_R0_MINUS:I I1_3_2_0_0_R0_PLUS:I 
+*.PININFO I1_3_3_0_0_R0_MINUS:I I1_3_3_0_0_R0_PLUS:I I1_default_MINUS:I 
+*.PININFO I1_default_PLUS:I
+DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 AREA=10n 
++ PJ=400u
+DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 AREA=1.32n 
++ PJ=226.4u
+DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 AREA=110p 
++ PJ=202.2u
+DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 AREA=56.5p 
++ PJ=201.13u
+DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 AREA=1.32n 
++ PJ=226.4u
+DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 
++ AREA=174.24p PJ=52.8u
+DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 
++ AREA=14.52p PJ=28.6u
+DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 
++ AREA=7.458p PJ=27.53u
+DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 AREA=110p 
++ PJ=202.2u
+DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 
++ AREA=14.52p PJ=28.6u
+DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 AREA=1.21p 
++ PJ=4.4u
+DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 
++ AREA=621.5f PJ=3.33u
+DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 AREA=56.5p 
++ PJ=201.13u
+DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 
++ AREA=7.458p PJ=27.53u
+DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 
++ AREA=621.5f PJ=3.33u
+DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 
++ AREA=319.225f PJ=2.26u
+DI1_default I1_default_PLUS I1_default_MINUS diode_pd2nw_03v3_dn m=1 AREA=1p PJ=4u
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pd2nw_06v0.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pd2nw_06v0.cdl
new file mode 100644
index 0000000..60c1eb1
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pd2nw_06v0.cdl
@@ -0,0 +1,86 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: diode_pd2nw_06v0
+* View Name:     schematic
+* Netlisted on:  Nov 24 09:50:38 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    diode_pd2nw_06v0
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT diode_pd2nw_06v0 I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS 
++ I1_0_1_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS I1_0_2_0_0_R0_PLUS 
++ I1_0_3_0_0_R0_MINUS I1_0_3_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS 
++ I1_1_0_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS I1_1_1_0_0_R0_PLUS 
++ I1_1_2_0_0_R0_MINUS I1_1_2_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS 
++ I1_1_3_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS I1_2_0_0_0_R0_PLUS 
++ I1_2_1_0_0_R0_MINUS I1_2_1_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS 
++ I1_2_2_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS I1_2_3_0_0_R0_PLUS 
++ I1_3_0_0_0_R0_MINUS I1_3_0_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS 
++ I1_3_1_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS I1_3_2_0_0_R0_PLUS 
++ I1_3_3_0_0_R0_MINUS I1_3_3_0_0_R0_PLUS I1_default_MINUS I1_default_PLUS
+*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_0_0_0_R0_PLUS:I I1_0_1_0_0_R0_MINUS:I 
+*.PININFO I1_0_1_0_0_R0_PLUS:I I1_0_2_0_0_R0_MINUS:I I1_0_2_0_0_R0_PLUS:I 
+*.PININFO I1_0_3_0_0_R0_MINUS:I I1_0_3_0_0_R0_PLUS:I I1_1_0_0_0_R0_MINUS:I 
+*.PININFO I1_1_0_0_0_R0_PLUS:I I1_1_1_0_0_R0_MINUS:I I1_1_1_0_0_R0_PLUS:I 
+*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_2_0_0_R0_PLUS:I I1_1_3_0_0_R0_MINUS:I 
+*.PININFO I1_1_3_0_0_R0_PLUS:I I1_2_0_0_0_R0_MINUS:I I1_2_0_0_0_R0_PLUS:I 
+*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_1_0_0_R0_PLUS:I I1_2_2_0_0_R0_MINUS:I 
+*.PININFO I1_2_2_0_0_R0_PLUS:I I1_2_3_0_0_R0_MINUS:I I1_2_3_0_0_R0_PLUS:I 
+*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_0_0_0_R0_PLUS:I I1_3_1_0_0_R0_MINUS:I 
+*.PININFO I1_3_1_0_0_R0_PLUS:I I1_3_2_0_0_R0_MINUS:I I1_3_2_0_0_R0_PLUS:I 
+*.PININFO I1_3_3_0_0_R0_MINUS:I I1_3_3_0_0_R0_PLUS:I I1_default_MINUS:I 
+*.PININFO I1_default_PLUS:I
+DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=10n 
++ PJ=400u
+DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=1.32n 
++ PJ=226.4u
+DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=110p 
++ PJ=202.2u
+DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=36p 
++ PJ=200.72u
+DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=1.32n 
++ PJ=226.4u
+DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=174.24p 
++ PJ=52.8u
+DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=14.52p 
++ PJ=28.6u
+DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=4.752p 
++ PJ=27.12u
+DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=110p 
++ PJ=202.2u
+DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=14.52p 
++ PJ=28.6u
+DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=1.21p 
++ PJ=4.4u
+DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=396f 
++ PJ=2.92u
+DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=36p 
++ PJ=200.72u
+DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=4.752p 
++ PJ=27.12u
+DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=396f 
++ PJ=2.92u
+DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=203.4f 
++ PJ=1.85u
+DI1_default I1_default_PLUS I1_default_MINUS diode_pd2nw_06v0 m=1 AREA=1p PJ=4u
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pd2nw_06v0_dn.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pd2nw_06v0_dn.cdl
new file mode 100644
index 0000000..8b38902
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pd2nw_06v0_dn.cdl
@@ -0,0 +1,86 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: diode_pd2nw_06v0_dn
+* View Name:     schematic
+* Netlisted on:  Nov 24 09:51:10 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    diode_pd2nw_06v0_dn
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT diode_pd2nw_06v0_dn I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS 
++ I1_0_1_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS I1_0_2_0_0_R0_PLUS 
++ I1_0_3_0_0_R0_MINUS I1_0_3_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS 
++ I1_1_0_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS I1_1_1_0_0_R0_PLUS 
++ I1_1_2_0_0_R0_MINUS I1_1_2_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS 
++ I1_1_3_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS I1_2_0_0_0_R0_PLUS 
++ I1_2_1_0_0_R0_MINUS I1_2_1_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS 
++ I1_2_2_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS I1_2_3_0_0_R0_PLUS 
++ I1_3_0_0_0_R0_MINUS I1_3_0_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS 
++ I1_3_1_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS I1_3_2_0_0_R0_PLUS 
++ I1_3_3_0_0_R0_MINUS I1_3_3_0_0_R0_PLUS I1_default_MINUS I1_default_PLUS
+*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_0_0_0_R0_PLUS:I I1_0_1_0_0_R0_MINUS:I 
+*.PININFO I1_0_1_0_0_R0_PLUS:I I1_0_2_0_0_R0_MINUS:I I1_0_2_0_0_R0_PLUS:I 
+*.PININFO I1_0_3_0_0_R0_MINUS:I I1_0_3_0_0_R0_PLUS:I I1_1_0_0_0_R0_MINUS:I 
+*.PININFO I1_1_0_0_0_R0_PLUS:I I1_1_1_0_0_R0_MINUS:I I1_1_1_0_0_R0_PLUS:I 
+*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_2_0_0_R0_PLUS:I I1_1_3_0_0_R0_MINUS:I 
+*.PININFO I1_1_3_0_0_R0_PLUS:I I1_2_0_0_0_R0_MINUS:I I1_2_0_0_0_R0_PLUS:I 
+*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_1_0_0_R0_PLUS:I I1_2_2_0_0_R0_MINUS:I 
+*.PININFO I1_2_2_0_0_R0_PLUS:I I1_2_3_0_0_R0_MINUS:I I1_2_3_0_0_R0_PLUS:I 
+*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_0_0_0_R0_PLUS:I I1_3_1_0_0_R0_MINUS:I 
+*.PININFO I1_3_1_0_0_R0_PLUS:I I1_3_2_0_0_R0_MINUS:I I1_3_2_0_0_R0_PLUS:I 
+*.PININFO I1_3_3_0_0_R0_MINUS:I I1_3_3_0_0_R0_PLUS:I I1_default_MINUS:I 
+*.PININFO I1_default_PLUS:I
+DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 AREA=10n 
++ PJ=400u
+DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 AREA=1.32n 
++ PJ=226.4u
+DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 AREA=110p 
++ PJ=202.2u
+DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 AREA=56.5p 
++ PJ=201.13u
+DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 AREA=1.32n 
++ PJ=226.4u
+DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 
++ AREA=174.24p PJ=52.8u
+DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 
++ AREA=14.52p PJ=28.6u
+DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 
++ AREA=7.458p PJ=27.53u
+DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 AREA=110p 
++ PJ=202.2u
+DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 
++ AREA=14.52p PJ=28.6u
+DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 AREA=1.21p 
++ PJ=4.4u
+DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 
++ AREA=621.5f PJ=3.33u
+DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 AREA=56.5p 
++ PJ=201.13u
+DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 
++ AREA=7.458p PJ=27.53u
+DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 
++ AREA=621.5f PJ=3.33u
+DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 
++ AREA=319.225f PJ=2.26u
+DI1_default I1_default_PLUS I1_default_MINUS diode_pd2nw_06v0_dn m=1 AREA=1p PJ=4u
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pn_1p8.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pn_1p8.cdl
deleted file mode 100644
index f5087d7..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pn_1p8.cdl
+++ /dev/null
@@ -1,86 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: diode_pn_1p8
-* View Name:     schematic
-* Netlisted on:  Nov 24 09:49:28 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    diode_pn_1p8
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT diode_pn_1p8 I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS 
-+ I1_0_1_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS I1_0_2_0_0_R0_PLUS 
-+ I1_0_3_0_0_R0_MINUS I1_0_3_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS 
-+ I1_1_0_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS I1_1_1_0_0_R0_PLUS 
-+ I1_1_2_0_0_R0_MINUS I1_1_2_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS 
-+ I1_1_3_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS I1_2_0_0_0_R0_PLUS 
-+ I1_2_1_0_0_R0_MINUS I1_2_1_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS 
-+ I1_2_2_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS I1_2_3_0_0_R0_PLUS 
-+ I1_3_0_0_0_R0_MINUS I1_3_0_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS 
-+ I1_3_1_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS I1_3_2_0_0_R0_PLUS 
-+ I1_3_3_0_0_R0_MINUS I1_3_3_0_0_R0_PLUS I1_default_MINUS I1_default_PLUS
-*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_0_0_0_R0_PLUS:I I1_0_1_0_0_R0_MINUS:I 
-*.PININFO I1_0_1_0_0_R0_PLUS:I I1_0_2_0_0_R0_MINUS:I I1_0_2_0_0_R0_PLUS:I 
-*.PININFO I1_0_3_0_0_R0_MINUS:I I1_0_3_0_0_R0_PLUS:I I1_1_0_0_0_R0_MINUS:I 
-*.PININFO I1_1_0_0_0_R0_PLUS:I I1_1_1_0_0_R0_MINUS:I I1_1_1_0_0_R0_PLUS:I 
-*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_2_0_0_R0_PLUS:I I1_1_3_0_0_R0_MINUS:I 
-*.PININFO I1_1_3_0_0_R0_PLUS:I I1_2_0_0_0_R0_MINUS:I I1_2_0_0_0_R0_PLUS:I 
-*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_1_0_0_R0_PLUS:I I1_2_2_0_0_R0_MINUS:I 
-*.PININFO I1_2_2_0_0_R0_PLUS:I I1_2_3_0_0_R0_MINUS:I I1_2_3_0_0_R0_PLUS:I 
-*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_0_0_0_R0_PLUS:I I1_3_1_0_0_R0_MINUS:I 
-*.PININFO I1_3_1_0_0_R0_PLUS:I I1_3_2_0_0_R0_MINUS:I I1_3_2_0_0_R0_PLUS:I 
-*.PININFO I1_3_3_0_0_R0_MINUS:I I1_3_3_0_0_R0_PLUS:I I1_default_MINUS:I 
-*.PININFO I1_default_PLUS:I
-DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS diode_pn_1p8 m=1 AREA=10n 
-+ PJ=400u
-DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS diode_pn_1p8 m=1 AREA=1.32n 
-+ PJ=226.4u
-DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS diode_pn_1p8 m=1 AREA=110p 
-+ PJ=202.2u
-DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS diode_pn_1p8 m=1 AREA=36p 
-+ PJ=200.72u
-DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS diode_pn_1p8 m=1 AREA=1.32n 
-+ PJ=226.4u
-DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS diode_pn_1p8 m=1 AREA=174.24p 
-+ PJ=52.8u
-DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS diode_pn_1p8 m=1 AREA=14.52p 
-+ PJ=28.6u
-DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS diode_pn_1p8 m=1 AREA=4.752p 
-+ PJ=27.12u
-DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS diode_pn_1p8 m=1 AREA=110p 
-+ PJ=202.2u
-DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS diode_pn_1p8 m=1 AREA=14.52p 
-+ PJ=28.6u
-DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS diode_pn_1p8 m=1 AREA=1.21p 
-+ PJ=4.4u
-DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS diode_pn_1p8 m=1 AREA=396f 
-+ PJ=2.92u
-DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS diode_pn_1p8 m=1 AREA=36p 
-+ PJ=200.72u
-DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS diode_pn_1p8 m=1 AREA=4.752p 
-+ PJ=27.12u
-DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS diode_pn_1p8 m=1 AREA=396f 
-+ PJ=2.92u
-DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS diode_pn_1p8 m=1 AREA=203.4f 
-+ PJ=1.85u
-DI1_default I1_default_PLUS I1_default_MINUS diode_pn_1p8 m=1 AREA=1p PJ=4u
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pn_1p8_dw.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pn_1p8_dw.cdl
deleted file mode 100644
index f3859d2..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pn_1p8_dw.cdl
+++ /dev/null
@@ -1,86 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: diode_pn_1p8_dw
-* View Name:     schematic
-* Netlisted on:  Nov 24 09:50:00 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    diode_pn_1p8_dw
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT diode_pn_1p8_dw I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS 
-+ I1_0_1_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS I1_0_2_0_0_R0_PLUS 
-+ I1_0_3_0_0_R0_MINUS I1_0_3_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS 
-+ I1_1_0_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS I1_1_1_0_0_R0_PLUS 
-+ I1_1_2_0_0_R0_MINUS I1_1_2_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS 
-+ I1_1_3_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS I1_2_0_0_0_R0_PLUS 
-+ I1_2_1_0_0_R0_MINUS I1_2_1_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS 
-+ I1_2_2_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS I1_2_3_0_0_R0_PLUS 
-+ I1_3_0_0_0_R0_MINUS I1_3_0_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS 
-+ I1_3_1_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS I1_3_2_0_0_R0_PLUS 
-+ I1_3_3_0_0_R0_MINUS I1_3_3_0_0_R0_PLUS I1_default_MINUS I1_default_PLUS
-*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_0_0_0_R0_PLUS:I I1_0_1_0_0_R0_MINUS:I 
-*.PININFO I1_0_1_0_0_R0_PLUS:I I1_0_2_0_0_R0_MINUS:I I1_0_2_0_0_R0_PLUS:I 
-*.PININFO I1_0_3_0_0_R0_MINUS:I I1_0_3_0_0_R0_PLUS:I I1_1_0_0_0_R0_MINUS:I 
-*.PININFO I1_1_0_0_0_R0_PLUS:I I1_1_1_0_0_R0_MINUS:I I1_1_1_0_0_R0_PLUS:I 
-*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_2_0_0_R0_PLUS:I I1_1_3_0_0_R0_MINUS:I 
-*.PININFO I1_1_3_0_0_R0_PLUS:I I1_2_0_0_0_R0_MINUS:I I1_2_0_0_0_R0_PLUS:I 
-*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_1_0_0_R0_PLUS:I I1_2_2_0_0_R0_MINUS:I 
-*.PININFO I1_2_2_0_0_R0_PLUS:I I1_2_3_0_0_R0_MINUS:I I1_2_3_0_0_R0_PLUS:I 
-*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_0_0_0_R0_PLUS:I I1_3_1_0_0_R0_MINUS:I 
-*.PININFO I1_3_1_0_0_R0_PLUS:I I1_3_2_0_0_R0_MINUS:I I1_3_2_0_0_R0_PLUS:I 
-*.PININFO I1_3_3_0_0_R0_MINUS:I I1_3_3_0_0_R0_PLUS:I I1_default_MINUS:I 
-*.PININFO I1_default_PLUS:I
-DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS diode_pn_1p8_dw m=1 AREA=10n 
-+ PJ=400u
-DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS diode_pn_1p8_dw m=1 AREA=1.32n 
-+ PJ=226.4u
-DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS diode_pn_1p8_dw m=1 AREA=110p 
-+ PJ=202.2u
-DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS diode_pn_1p8_dw m=1 AREA=56.5p 
-+ PJ=201.13u
-DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS diode_pn_1p8_dw m=1 AREA=1.32n 
-+ PJ=226.4u
-DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS diode_pn_1p8_dw m=1 
-+ AREA=174.24p PJ=52.8u
-DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS diode_pn_1p8_dw m=1 
-+ AREA=14.52p PJ=28.6u
-DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS diode_pn_1p8_dw m=1 
-+ AREA=7.458p PJ=27.53u
-DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS diode_pn_1p8_dw m=1 AREA=110p 
-+ PJ=202.2u
-DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS diode_pn_1p8_dw m=1 
-+ AREA=14.52p PJ=28.6u
-DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS diode_pn_1p8_dw m=1 AREA=1.21p 
-+ PJ=4.4u
-DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS diode_pn_1p8_dw m=1 
-+ AREA=621.5f PJ=3.33u
-DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS diode_pn_1p8_dw m=1 AREA=56.5p 
-+ PJ=201.13u
-DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS diode_pn_1p8_dw m=1 
-+ AREA=7.458p PJ=27.53u
-DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS diode_pn_1p8_dw m=1 
-+ AREA=621.5f PJ=3.33u
-DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS diode_pn_1p8_dw m=1 
-+ AREA=319.225f PJ=2.26u
-DI1_default I1_default_PLUS I1_default_MINUS diode_pn_1p8_dw m=1 AREA=1p PJ=4u
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pn_3p3.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pn_3p3.cdl
deleted file mode 100644
index 0bb69ae..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pn_3p3.cdl
+++ /dev/null
@@ -1,86 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: diode_pn_3p3
-* View Name:     schematic
-* Netlisted on:  Nov 24 09:49:28 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    diode_pn_3p3
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT diode_pn_3p3 I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS 
-+ I1_0_1_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS I1_0_2_0_0_R0_PLUS 
-+ I1_0_3_0_0_R0_MINUS I1_0_3_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS 
-+ I1_1_0_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS I1_1_1_0_0_R0_PLUS 
-+ I1_1_2_0_0_R0_MINUS I1_1_2_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS 
-+ I1_1_3_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS I1_2_0_0_0_R0_PLUS 
-+ I1_2_1_0_0_R0_MINUS I1_2_1_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS 
-+ I1_2_2_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS I1_2_3_0_0_R0_PLUS 
-+ I1_3_0_0_0_R0_MINUS I1_3_0_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS 
-+ I1_3_1_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS I1_3_2_0_0_R0_PLUS 
-+ I1_3_3_0_0_R0_MINUS I1_3_3_0_0_R0_PLUS I1_default_MINUS I1_default_PLUS
-*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_0_0_0_R0_PLUS:I I1_0_1_0_0_R0_MINUS:I 
-*.PININFO I1_0_1_0_0_R0_PLUS:I I1_0_2_0_0_R0_MINUS:I I1_0_2_0_0_R0_PLUS:I 
-*.PININFO I1_0_3_0_0_R0_MINUS:I I1_0_3_0_0_R0_PLUS:I I1_1_0_0_0_R0_MINUS:I 
-*.PININFO I1_1_0_0_0_R0_PLUS:I I1_1_1_0_0_R0_MINUS:I I1_1_1_0_0_R0_PLUS:I 
-*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_2_0_0_R0_PLUS:I I1_1_3_0_0_R0_MINUS:I 
-*.PININFO I1_1_3_0_0_R0_PLUS:I I1_2_0_0_0_R0_MINUS:I I1_2_0_0_0_R0_PLUS:I 
-*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_1_0_0_R0_PLUS:I I1_2_2_0_0_R0_MINUS:I 
-*.PININFO I1_2_2_0_0_R0_PLUS:I I1_2_3_0_0_R0_MINUS:I I1_2_3_0_0_R0_PLUS:I 
-*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_0_0_0_R0_PLUS:I I1_3_1_0_0_R0_MINUS:I 
-*.PININFO I1_3_1_0_0_R0_PLUS:I I1_3_2_0_0_R0_MINUS:I I1_3_2_0_0_R0_PLUS:I 
-*.PININFO I1_3_3_0_0_R0_MINUS:I I1_3_3_0_0_R0_PLUS:I I1_default_MINUS:I 
-*.PININFO I1_default_PLUS:I
-DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS diode_pn_3p3 m=1 AREA=10n 
-+ PJ=400u
-DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS diode_pn_3p3 m=1 AREA=1.32n 
-+ PJ=226.4u
-DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS diode_pn_3p3 m=1 AREA=110p 
-+ PJ=202.2u
-DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS diode_pn_3p3 m=1 AREA=36p 
-+ PJ=200.72u
-DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS diode_pn_3p3 m=1 AREA=1.32n 
-+ PJ=226.4u
-DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS diode_pn_3p3 m=1 AREA=174.24p 
-+ PJ=52.8u
-DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS diode_pn_3p3 m=1 AREA=14.52p 
-+ PJ=28.6u
-DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS diode_pn_3p3 m=1 AREA=4.752p 
-+ PJ=27.12u
-DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS diode_pn_3p3 m=1 AREA=110p 
-+ PJ=202.2u
-DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS diode_pn_3p3 m=1 AREA=14.52p 
-+ PJ=28.6u
-DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS diode_pn_3p3 m=1 AREA=1.21p 
-+ PJ=4.4u
-DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS diode_pn_3p3 m=1 AREA=396f 
-+ PJ=2.92u
-DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS diode_pn_3p3 m=1 AREA=36p 
-+ PJ=200.72u
-DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS diode_pn_3p3 m=1 AREA=4.752p 
-+ PJ=27.12u
-DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS diode_pn_3p3 m=1 AREA=396f 
-+ PJ=2.92u
-DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS diode_pn_3p3 m=1 AREA=203.4f 
-+ PJ=1.85u
-DI1_default I1_default_PLUS I1_default_MINUS diode_pn_3p3 m=1 AREA=1p PJ=4u
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pn_3p3_dw.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pn_3p3_dw.cdl
deleted file mode 100644
index e658351..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pn_3p3_dw.cdl
+++ /dev/null
@@ -1,86 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: diode_pn_3p3_dw
-* View Name:     schematic
-* Netlisted on:  Nov 24 09:50:00 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    diode_pn_3p3_dw
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT diode_pn_3p3_dw I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS 
-+ I1_0_1_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS I1_0_2_0_0_R0_PLUS 
-+ I1_0_3_0_0_R0_MINUS I1_0_3_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS 
-+ I1_1_0_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS I1_1_1_0_0_R0_PLUS 
-+ I1_1_2_0_0_R0_MINUS I1_1_2_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS 
-+ I1_1_3_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS I1_2_0_0_0_R0_PLUS 
-+ I1_2_1_0_0_R0_MINUS I1_2_1_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS 
-+ I1_2_2_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS I1_2_3_0_0_R0_PLUS 
-+ I1_3_0_0_0_R0_MINUS I1_3_0_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS 
-+ I1_3_1_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS I1_3_2_0_0_R0_PLUS 
-+ I1_3_3_0_0_R0_MINUS I1_3_3_0_0_R0_PLUS I1_default_MINUS I1_default_PLUS
-*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_0_0_0_R0_PLUS:I I1_0_1_0_0_R0_MINUS:I 
-*.PININFO I1_0_1_0_0_R0_PLUS:I I1_0_2_0_0_R0_MINUS:I I1_0_2_0_0_R0_PLUS:I 
-*.PININFO I1_0_3_0_0_R0_MINUS:I I1_0_3_0_0_R0_PLUS:I I1_1_0_0_0_R0_MINUS:I 
-*.PININFO I1_1_0_0_0_R0_PLUS:I I1_1_1_0_0_R0_MINUS:I I1_1_1_0_0_R0_PLUS:I 
-*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_2_0_0_R0_PLUS:I I1_1_3_0_0_R0_MINUS:I 
-*.PININFO I1_1_3_0_0_R0_PLUS:I I1_2_0_0_0_R0_MINUS:I I1_2_0_0_0_R0_PLUS:I 
-*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_1_0_0_R0_PLUS:I I1_2_2_0_0_R0_MINUS:I 
-*.PININFO I1_2_2_0_0_R0_PLUS:I I1_2_3_0_0_R0_MINUS:I I1_2_3_0_0_R0_PLUS:I 
-*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_0_0_0_R0_PLUS:I I1_3_1_0_0_R0_MINUS:I 
-*.PININFO I1_3_1_0_0_R0_PLUS:I I1_3_2_0_0_R0_MINUS:I I1_3_2_0_0_R0_PLUS:I 
-*.PININFO I1_3_3_0_0_R0_MINUS:I I1_3_3_0_0_R0_PLUS:I I1_default_MINUS:I 
-*.PININFO I1_default_PLUS:I
-DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS diode_pn_3p3_dw m=1 AREA=10n 
-+ PJ=400u
-DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS diode_pn_3p3_dw m=1 AREA=1.32n 
-+ PJ=226.4u
-DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS diode_pn_3p3_dw m=1 AREA=110p 
-+ PJ=202.2u
-DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS diode_pn_3p3_dw m=1 AREA=56.5p 
-+ PJ=201.13u
-DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS diode_pn_3p3_dw m=1 AREA=1.32n 
-+ PJ=226.4u
-DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS diode_pn_3p3_dw m=1 
-+ AREA=174.24p PJ=52.8u
-DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS diode_pn_3p3_dw m=1 
-+ AREA=14.52p PJ=28.6u
-DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS diode_pn_3p3_dw m=1 
-+ AREA=7.458p PJ=27.53u
-DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS diode_pn_3p3_dw m=1 AREA=110p 
-+ PJ=202.2u
-DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS diode_pn_3p3_dw m=1 
-+ AREA=14.52p PJ=28.6u
-DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS diode_pn_3p3_dw m=1 AREA=1.21p 
-+ PJ=4.4u
-DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS diode_pn_3p3_dw m=1 
-+ AREA=621.5f PJ=3.33u
-DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS diode_pn_3p3_dw m=1 AREA=56.5p 
-+ PJ=201.13u
-DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS diode_pn_3p3_dw m=1 
-+ AREA=7.458p PJ=27.53u
-DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS diode_pn_3p3_dw m=1 
-+ AREA=621.5f PJ=3.33u
-DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS diode_pn_3p3_dw m=1 
-+ AREA=319.225f PJ=2.26u
-DI1_default I1_default_PLUS I1_default_MINUS diode_pn_3p3_dw m=1 AREA=1p PJ=4u
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pn_6p0.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pn_6p0.cdl
deleted file mode 100644
index 9067197..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pn_6p0.cdl
+++ /dev/null
@@ -1,86 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: diode_pn_6p0
-* View Name:     schematic
-* Netlisted on:  Nov 24 09:50:38 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    diode_pn_6p0
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT diode_pn_6p0 I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS 
-+ I1_0_1_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS I1_0_2_0_0_R0_PLUS 
-+ I1_0_3_0_0_R0_MINUS I1_0_3_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS 
-+ I1_1_0_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS I1_1_1_0_0_R0_PLUS 
-+ I1_1_2_0_0_R0_MINUS I1_1_2_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS 
-+ I1_1_3_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS I1_2_0_0_0_R0_PLUS 
-+ I1_2_1_0_0_R0_MINUS I1_2_1_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS 
-+ I1_2_2_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS I1_2_3_0_0_R0_PLUS 
-+ I1_3_0_0_0_R0_MINUS I1_3_0_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS 
-+ I1_3_1_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS I1_3_2_0_0_R0_PLUS 
-+ I1_3_3_0_0_R0_MINUS I1_3_3_0_0_R0_PLUS I1_default_MINUS I1_default_PLUS
-*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_0_0_0_R0_PLUS:I I1_0_1_0_0_R0_MINUS:I 
-*.PININFO I1_0_1_0_0_R0_PLUS:I I1_0_2_0_0_R0_MINUS:I I1_0_2_0_0_R0_PLUS:I 
-*.PININFO I1_0_3_0_0_R0_MINUS:I I1_0_3_0_0_R0_PLUS:I I1_1_0_0_0_R0_MINUS:I 
-*.PININFO I1_1_0_0_0_R0_PLUS:I I1_1_1_0_0_R0_MINUS:I I1_1_1_0_0_R0_PLUS:I 
-*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_2_0_0_R0_PLUS:I I1_1_3_0_0_R0_MINUS:I 
-*.PININFO I1_1_3_0_0_R0_PLUS:I I1_2_0_0_0_R0_MINUS:I I1_2_0_0_0_R0_PLUS:I 
-*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_1_0_0_R0_PLUS:I I1_2_2_0_0_R0_MINUS:I 
-*.PININFO I1_2_2_0_0_R0_PLUS:I I1_2_3_0_0_R0_MINUS:I I1_2_3_0_0_R0_PLUS:I 
-*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_0_0_0_R0_PLUS:I I1_3_1_0_0_R0_MINUS:I 
-*.PININFO I1_3_1_0_0_R0_PLUS:I I1_3_2_0_0_R0_MINUS:I I1_3_2_0_0_R0_PLUS:I 
-*.PININFO I1_3_3_0_0_R0_MINUS:I I1_3_3_0_0_R0_PLUS:I I1_default_MINUS:I 
-*.PININFO I1_default_PLUS:I
-DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS diode_pn_6p0 m=1 AREA=10n 
-+ PJ=400u
-DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS diode_pn_6p0 m=1 AREA=1.32n 
-+ PJ=226.4u
-DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS diode_pn_6p0 m=1 AREA=110p 
-+ PJ=202.2u
-DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS diode_pn_6p0 m=1 AREA=36p 
-+ PJ=200.72u
-DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS diode_pn_6p0 m=1 AREA=1.32n 
-+ PJ=226.4u
-DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS diode_pn_6p0 m=1 AREA=174.24p 
-+ PJ=52.8u
-DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS diode_pn_6p0 m=1 AREA=14.52p 
-+ PJ=28.6u
-DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS diode_pn_6p0 m=1 AREA=4.752p 
-+ PJ=27.12u
-DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS diode_pn_6p0 m=1 AREA=110p 
-+ PJ=202.2u
-DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS diode_pn_6p0 m=1 AREA=14.52p 
-+ PJ=28.6u
-DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS diode_pn_6p0 m=1 AREA=1.21p 
-+ PJ=4.4u
-DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS diode_pn_6p0 m=1 AREA=396f 
-+ PJ=2.92u
-DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS diode_pn_6p0 m=1 AREA=36p 
-+ PJ=200.72u
-DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS diode_pn_6p0 m=1 AREA=4.752p 
-+ PJ=27.12u
-DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS diode_pn_6p0 m=1 AREA=396f 
-+ PJ=2.92u
-DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS diode_pn_6p0 m=1 AREA=203.4f 
-+ PJ=1.85u
-DI1_default I1_default_PLUS I1_default_MINUS diode_pn_6p0 m=1 AREA=1p PJ=4u
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pn_6p0_dw.cdl b/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pn_6p0_dw.cdl
deleted file mode 100644
index c859aae..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/diode_devices/netlist/diode_pn_6p0_dw.cdl
+++ /dev/null
@@ -1,86 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: diode_pn_6p0_dw
-* View Name:     schematic
-* Netlisted on:  Nov 24 09:51:10 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    diode_pn_6p0_dw
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT diode_pn_6p0_dw I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS 
-+ I1_0_1_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS I1_0_2_0_0_R0_PLUS 
-+ I1_0_3_0_0_R0_MINUS I1_0_3_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS 
-+ I1_1_0_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS I1_1_1_0_0_R0_PLUS 
-+ I1_1_2_0_0_R0_MINUS I1_1_2_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS 
-+ I1_1_3_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS I1_2_0_0_0_R0_PLUS 
-+ I1_2_1_0_0_R0_MINUS I1_2_1_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS 
-+ I1_2_2_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS I1_2_3_0_0_R0_PLUS 
-+ I1_3_0_0_0_R0_MINUS I1_3_0_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS 
-+ I1_3_1_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS I1_3_2_0_0_R0_PLUS 
-+ I1_3_3_0_0_R0_MINUS I1_3_3_0_0_R0_PLUS I1_default_MINUS I1_default_PLUS
-*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_0_0_0_R0_PLUS:I I1_0_1_0_0_R0_MINUS:I 
-*.PININFO I1_0_1_0_0_R0_PLUS:I I1_0_2_0_0_R0_MINUS:I I1_0_2_0_0_R0_PLUS:I 
-*.PININFO I1_0_3_0_0_R0_MINUS:I I1_0_3_0_0_R0_PLUS:I I1_1_0_0_0_R0_MINUS:I 
-*.PININFO I1_1_0_0_0_R0_PLUS:I I1_1_1_0_0_R0_MINUS:I I1_1_1_0_0_R0_PLUS:I 
-*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_2_0_0_R0_PLUS:I I1_1_3_0_0_R0_MINUS:I 
-*.PININFO I1_1_3_0_0_R0_PLUS:I I1_2_0_0_0_R0_MINUS:I I1_2_0_0_0_R0_PLUS:I 
-*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_1_0_0_R0_PLUS:I I1_2_2_0_0_R0_MINUS:I 
-*.PININFO I1_2_2_0_0_R0_PLUS:I I1_2_3_0_0_R0_MINUS:I I1_2_3_0_0_R0_PLUS:I 
-*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_0_0_0_R0_PLUS:I I1_3_1_0_0_R0_MINUS:I 
-*.PININFO I1_3_1_0_0_R0_PLUS:I I1_3_2_0_0_R0_MINUS:I I1_3_2_0_0_R0_PLUS:I 
-*.PININFO I1_3_3_0_0_R0_MINUS:I I1_3_3_0_0_R0_PLUS:I I1_default_MINUS:I 
-*.PININFO I1_default_PLUS:I
-DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS diode_pn_6p0_dw m=1 AREA=10n 
-+ PJ=400u
-DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS diode_pn_6p0_dw m=1 AREA=1.32n 
-+ PJ=226.4u
-DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS diode_pn_6p0_dw m=1 AREA=110p 
-+ PJ=202.2u
-DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS diode_pn_6p0_dw m=1 AREA=56.5p 
-+ PJ=201.13u
-DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS diode_pn_6p0_dw m=1 AREA=1.32n 
-+ PJ=226.4u
-DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS diode_pn_6p0_dw m=1 
-+ AREA=174.24p PJ=52.8u
-DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS diode_pn_6p0_dw m=1 
-+ AREA=14.52p PJ=28.6u
-DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS diode_pn_6p0_dw m=1 
-+ AREA=7.458p PJ=27.53u
-DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS diode_pn_6p0_dw m=1 AREA=110p 
-+ PJ=202.2u
-DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS diode_pn_6p0_dw m=1 
-+ AREA=14.52p PJ=28.6u
-DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS diode_pn_6p0_dw m=1 AREA=1.21p 
-+ PJ=4.4u
-DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS diode_pn_6p0_dw m=1 
-+ AREA=621.5f PJ=3.33u
-DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS diode_pn_6p0_dw m=1 AREA=56.5p 
-+ PJ=201.13u
-DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS diode_pn_6p0_dw m=1 
-+ AREA=7.458p PJ=27.53u
-DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS diode_pn_6p0_dw m=1 
-+ AREA=621.5f PJ=3.33u
-DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS diode_pn_6p0_dw m=1 
-+ AREA=319.225f PJ=2.26u
-DI1_default I1_default_PLUS I1_default_MINUS diode_pn_6p0_dw m=1 AREA=1p PJ=4u
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_m2m3_noshield.gds b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_0f85_m2m3_noshield.gds
similarity index 99%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_m2m3_noshield.gds
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_0f85_m2m3_noshield.gds
index cdcface..37e22ae 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_m2m3_noshield.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_0f85_m2m3_noshield.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_m2m3_noshield.yaml b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_0f85_m2m3_noshield.yaml
similarity index 71%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_m2m3_noshield.yaml
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_0f85_m2m3_noshield.yaml
index 060a3c2..46c3411 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_m2m3_noshield.yaml
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_0f85_m2m3_noshield.yaml
@@ -1,4 +1,4 @@
-mim_0p85fF_m2m3_noshield:
+cap_mim_0f85_m2m3_noshield:
   -rd mim_option: "A"
   -rd metal_level: "3LM"
   -rd mim_cap: "0.85"
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_tm_m3m4_noshield.gds b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_0f85_m3m4_noshield.gds
similarity index 99%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_tm_m3m4_noshield.gds
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_0f85_m3m4_noshield.gds
index 72c62bd..34988d8 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_tm_m3m4_noshield.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_0f85_m3m4_noshield.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_tm_m3m4_noshield.yaml b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_0f85_m3m4_noshield.yaml
similarity index 70%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_tm_m3m4_noshield.yaml
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_0f85_m3m4_noshield.yaml
index 64335cc..c273392 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_tm_m3m4_noshield.yaml
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_0f85_m3m4_noshield.yaml
@@ -1,4 +1,4 @@
-mim_0p85fF_tm_m3m4_noshield:
+cap_mim_0f85_m3m4_noshield:
   -rd mim_option: "B"
   -rd metal_level: "4LM"
   -rd mim_cap: "0.85"
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_tm_m4m5_noshield.gds b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_0f85_m4m5_noshield.gds
similarity index 99%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_tm_m4m5_noshield.gds
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_0f85_m4m5_noshield.gds
index c1fb759..b1a1d2b 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_tm_m4m5_noshield.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_0f85_m4m5_noshield.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_tm_m4m5_noshield.yaml b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_0f85_m4m5_noshield.yaml
similarity index 70%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_tm_m4m5_noshield.yaml
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_0f85_m4m5_noshield.yaml
index 35532ba..f58e8ed 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_tm_m4m5_noshield.yaml
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_0f85_m4m5_noshield.yaml
@@ -1,4 +1,4 @@
-mim_0p85fF_tm_m4m5_noshield:
+cap_mim_0f85_m4m5_noshield:
   -rd mim_option: "B"
   -rd metal_level: "5LM"
   -rd mim_cap: "0.85"
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_tm_m5m6_noshield.gds b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_0f85_m5m6_noshield.gds
similarity index 99%
copy from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_tm_m5m6_noshield.gds
copy to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_0f85_m5m6_noshield.gds
index 7cfaae6..9c7866a 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_tm_m5m6_noshield.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_0f85_m5m6_noshield.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_tm_m5m6_noshield.yaml b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_0f85_m5m6_noshield.yaml
similarity index 70%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_tm_m5m6_noshield.yaml
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_0f85_m5m6_noshield.yaml
index 0c52e94..e8458e4 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_tm_m5m6_noshield.yaml
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_0f85_m5m6_noshield.yaml
@@ -1,4 +1,4 @@
-mim_0p85fF_tm_m5m6_noshield:
+cap_mim_0f85_m5m6_noshield:
   -rd mim_option: "B"
   -rd metal_level: "6LM"
   -rd mim_cap: "0.85"
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_m2m3_noshield.gds b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f0_m2m3_noshield.gds
similarity index 99%
copy from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_m2m3_noshield.gds
copy to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f0_m2m3_noshield.gds
index cdcface..6839232 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_m2m3_noshield.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f0_m2m3_noshield.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_m2m3_noshield.yaml b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f0_m2m3_noshield.yaml
similarity index 71%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_m2m3_noshield.yaml
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f0_m2m3_noshield.yaml
index a3a5244..5cdd347 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_m2m3_noshield.yaml
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f0_m2m3_noshield.yaml
@@ -1,4 +1,4 @@
-mim_1p0fF_m2m3_noshield:
+cap_mim_1f0_m2m3_noshield:
   -rd mim_option: "A"
   -rd metal_level: "3LM"
   -rd mim_cap: "1"
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_tm_m3m4_noshield.gds b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f0_m3m4_noshield.gds
similarity index 99%
copy from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_tm_m3m4_noshield.gds
copy to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f0_m3m4_noshield.gds
index 72c62bd..e1f2fbc 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_tm_m3m4_noshield.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f0_m3m4_noshield.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_tm_m3m4_noshield.yaml b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f0_m3m4_noshield.yaml
similarity index 70%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_tm_m3m4_noshield.yaml
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f0_m3m4_noshield.yaml
index 00b0fe1..652e54d 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_tm_m3m4_noshield.yaml
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f0_m3m4_noshield.yaml
@@ -1,4 +1,4 @@
-mim_1p0fF_tm_m3m4_noshield:
+cap_mim_1f0_m3m4_noshield:
   -rd mim_option: "B"
   -rd metal_level: "4LM"
   -rd mim_cap: "1"
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_tm_m4m5_noshield.gds b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f0_m4m5_noshield.gds
similarity index 99%
copy from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_tm_m4m5_noshield.gds
copy to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f0_m4m5_noshield.gds
index c1fb759..a24428d 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_tm_m4m5_noshield.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f0_m4m5_noshield.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_tm_m4m5_noshield.yaml b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f0_m4m5_noshield.yaml
similarity index 70%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_tm_m4m5_noshield.yaml
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f0_m4m5_noshield.yaml
index d835d95..4718dcb 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_tm_m4m5_noshield.yaml
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f0_m4m5_noshield.yaml
@@ -1,4 +1,4 @@
-mim_1p0fF_tm_m4m5_noshield:
+cap_mim_1f0_m4m5_noshield:
   -rd mim_option: "B"
   -rd metal_level: "5LM"
   -rd mim_cap: "1"
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_tm_m5m6_noshield.gds b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f0_m5m6_noshield.gds
similarity index 99%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_tm_m5m6_noshield.gds
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f0_m5m6_noshield.gds
index 7cfaae6..bea7dfa 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_tm_m5m6_noshield.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f0_m5m6_noshield.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_tm_m5m6_noshield.yaml b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f0_m5m6_noshield.yaml
similarity index 70%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_tm_m5m6_noshield.yaml
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f0_m5m6_noshield.yaml
index 5825807..e77a318 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_tm_m5m6_noshield.yaml
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f0_m5m6_noshield.yaml
@@ -1,4 +1,4 @@
-mim_1p0fF_tm_m5m6_noshield:
+cap_mim_1f0_m5m6_noshield:
   -rd mim_option: "B"
   -rd metal_level: "6LM"
   -rd mim_cap: "1"
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_m2m3_noshield.gds b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f5_m2m3_noshield.gds
similarity index 99%
copy from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_m2m3_noshield.gds
copy to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f5_m2m3_noshield.gds
index 6d25b72..d8602cf 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_m2m3_noshield.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f5_m2m3_noshield.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_m2m3_noshield.yaml b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f5_m2m3_noshield.yaml
similarity index 72%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_m2m3_noshield.yaml
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f5_m2m3_noshield.yaml
index 5d0b626..a4ade5d 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_m2m3_noshield.yaml
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f5_m2m3_noshield.yaml
@@ -1,4 +1,4 @@
-mim_1p5fF_m2m3_noshield:
+cap_mim_1f5_m2m3_noshield:
   -rd mim_option: "A"
   -rd metal_level: "3LM"
   -rd mim_cap: "1.5"
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m3m4_noshield.gds b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f5_m3m4_noshield.gds
similarity index 99%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m3m4_noshield.gds
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f5_m3m4_noshield.gds
index 2e671ef..d93033d 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m3m4_noshield.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f5_m3m4_noshield.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_tm_m3m4_noshield.yaml b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f5_m3m4_noshield.yaml
similarity index 70%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_tm_m3m4_noshield.yaml
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f5_m3m4_noshield.yaml
index 7028012..847938a 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_tm_m3m4_noshield.yaml
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f5_m3m4_noshield.yaml
@@ -1,4 +1,4 @@
-mim_1p5fF_tm_m3m4_noshield:
+cap_mim_1f5_m3m4_noshield:
   -rd mim_option: "B"
   -rd metal_level: "4LM"
   -rd mim_cap: "1.5"
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m4m5_noshield.gds b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f5_m4m5_noshield.gds
similarity index 99%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m4m5_noshield.gds
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f5_m4m5_noshield.gds
index b0291da..3f15532 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m4m5_noshield.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f5_m4m5_noshield.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_tm_m4m5_noshield.yaml b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f5_m4m5_noshield.yaml
similarity index 70%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_tm_m4m5_noshield.yaml
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f5_m4m5_noshield.yaml
index 3426e30..353ebb4 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_tm_m4m5_noshield.yaml
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f5_m4m5_noshield.yaml
@@ -1,4 +1,4 @@
-mim_1p5fF_tm_m4m5_noshield:
+cap_mim_1f5_m4m5_noshield:
   -rd mim_option: "B"
   -rd metal_level: "5LM"
   -rd mim_cap: "1.5"
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m5m6_noshield.gds b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f5_m5m6_noshield.gds
similarity index 99%
copy from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m5m6_noshield.gds
copy to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f5_m5m6_noshield.gds
index 7d359f1..7a25035 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m5m6_noshield.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f5_m5m6_noshield.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_tm_m5m6_noshield.yaml b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f5_m5m6_noshield.yaml
similarity index 70%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_tm_m5m6_noshield.yaml
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f5_m5m6_noshield.yaml
index e08c7dc..781fbe8 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_tm_m5m6_noshield.yaml
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_1f5_m5m6_noshield.yaml
@@ -1,4 +1,4 @@
-mim_1p5fF_tm_m5m6_noshield:
+cap_mim_1f5_m5m6_noshield:
   -rd mim_option: "B"
   -rd metal_level: "6LM"
   -rd mim_cap: "1.5"
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_m2m3_noshield.gds b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_2f0_m2m3_noshield.gds
similarity index 99%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_m2m3_noshield.gds
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_2f0_m2m3_noshield.gds
index 6d25b72..2c97380 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_m2m3_noshield.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_2f0_m2m3_noshield.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_m2m3_noshield.yaml b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_2f0_m2m3_noshield.yaml
similarity index 71%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_m2m3_noshield.yaml
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_2f0_m2m3_noshield.yaml
index f9f80c1..da07c0f 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_m2m3_noshield.yaml
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_2f0_m2m3_noshield.yaml
@@ -1,4 +1,4 @@
-mim_2p0fF_m2m3_noshield:
+cap_mim_2f0_m2m3_noshield:
   -rd mim_option: "A"
   -rd metal_level: "3LM"
   -rd mim_cap: "2"
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m3m4_noshield.gds b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_2f0_m3m4_noshield.gds
similarity index 99%
copy from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m3m4_noshield.gds
copy to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_2f0_m3m4_noshield.gds
index 2e671ef..c09c2b6 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m3m4_noshield.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_2f0_m3m4_noshield.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m3m4_noshield.yaml b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_2f0_m3m4_noshield.yaml
similarity index 70%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m3m4_noshield.yaml
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_2f0_m3m4_noshield.yaml
index 2b0309b..d85e7a1 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m3m4_noshield.yaml
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_2f0_m3m4_noshield.yaml
@@ -1,4 +1,4 @@
-mim_2p0fF_tm_m3m4_noshield:
+cap_mim_2f0_m3m4_noshield:
   -rd mim_option: "B"
   -rd metal_level: "4LM"
   -rd mim_cap: "2"
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m4m5_noshield.gds b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_2f0_m4m5_noshield.gds
similarity index 99%
copy from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m4m5_noshield.gds
copy to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_2f0_m4m5_noshield.gds
index b0291da..72a2edd 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m4m5_noshield.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_2f0_m4m5_noshield.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m4m5_noshield.yaml b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_2f0_m4m5_noshield.yaml
similarity index 70%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m4m5_noshield.yaml
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_2f0_m4m5_noshield.yaml
index ab478fe..cb6ac9c 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m4m5_noshield.yaml
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_2f0_m4m5_noshield.yaml
@@ -1,4 +1,4 @@
-mim_2p0fF_tm_m4m5_noshield:
+cap_mim_2f0_m4m5_noshield:
   -rd mim_option: "B"
   -rd metal_level: "5LM"
   -rd mim_cap: "2"
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m5m6_noshield.gds b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_2f0_m5m6_noshield.gds
similarity index 99%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m5m6_noshield.gds
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_2f0_m5m6_noshield.gds
index 7d359f1..e3e67e3 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m5m6_noshield.gds
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_2f0_m5m6_noshield.gds
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m5m6_noshield.yaml b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_2f0_m5m6_noshield.yaml
similarity index 70%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m5m6_noshield.yaml
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_2f0_m5m6_noshield.yaml
index a7d59a4..0f3ab89 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_tm_m5m6_noshield.yaml
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/cap_mim_2f0_m5m6_noshield.yaml
@@ -1,4 +1,4 @@
-mim_2p0fF_tm_m5m6_noshield:
+cap_mim_2f0_m5m6_noshield:
   -rd mim_option: "B"
   -rd metal_level: "6LM"
   -rd mim_cap: "2"
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_m2m3_noshield.gds b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_m2m3_noshield.gds
deleted file mode 100644
index fac56eb..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_m2m3_noshield.gds
+++ /dev/null
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_tm_m3m4_noshield.gds b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_tm_m3m4_noshield.gds
deleted file mode 100644
index fd7f31e..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_0p85fF_tm_m3m4_noshield.gds
+++ /dev/null
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_tm_m4m5_noshield.gds b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_tm_m4m5_noshield.gds
deleted file mode 100644
index 7049ddb..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_tm_m4m5_noshield.gds
+++ /dev/null
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_tm_m5m6_noshield.gds b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_tm_m5m6_noshield.gds
deleted file mode 100644
index 453c75e..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p0fF_tm_m5m6_noshield.gds
+++ /dev/null
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_tm_m3m4_noshield.gds b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_tm_m3m4_noshield.gds
deleted file mode 100644
index f85ae78..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_tm_m3m4_noshield.gds
+++ /dev/null
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_tm_m4m5_noshield.gds b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_tm_m4m5_noshield.gds
deleted file mode 100644
index 6d72e9c..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_tm_m4m5_noshield.gds
+++ /dev/null
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_tm_m5m6_noshield.gds b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_tm_m5m6_noshield.gds
deleted file mode 100644
index 6c53293..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_1p5fF_tm_m5m6_noshield.gds
+++ /dev/null
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_m2m3_noshield.gds b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_m2m3_noshield.gds
deleted file mode 100644
index 020b0e6..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/layout/mim_2p0fF_m2m3_noshield.gds
+++ /dev/null
Binary files differ
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_0f85_m2m3_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_0f85_m2m3_noshield.cdl
new file mode 100644
index 0000000..85b2338
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_0f85_m2m3_noshield.cdl
@@ -0,0 +1,60 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: cap_mim_0f85_m2m3_noshield
+* View Name:     schematic
+* Netlisted on:  Nov 24 10:39:22 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    cap_mim_0f85_m2m3_noshield
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT cap_mim_0f85_m2m3_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
++ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
++ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
++ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
++ I1_default_TOP
+*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
+*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
+*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
+*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
+*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
+CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT cap_mim_0f85_m2m3_noshield M=1 l=50.000u w=50.000u 
++ c=2.153475p
+CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT cap_mim_0f85_m2m3_noshield M=1 l=50.000u w=11.560u 
++ c=0.51944826p
+CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT cap_mim_0f85_m2m3_noshield M=1 l=50.000u w=5.000u 
++ c=0.2405925p
+CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT cap_mim_0f85_m2m3_noshield M=1 l=11.560u w=50.000u 
++ c=0.51944826p
+CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT cap_mim_0f85_m2m3_noshield M=1 l=11.560u w=11.560u 
++ c=0.125082226p
+CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT cap_mim_0f85_m2m3_noshield M=1 l=11.560u w=5.000u 
++ c=0.05778147p
+CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT cap_mim_0f85_m2m3_noshield M=1 l=5.000u w=50.000u 
++ c=0.2405925p
+CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT cap_mim_0f85_m2m3_noshield M=1 l=5.000u w=11.560u 
++ c=0.05778147p
+CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT cap_mim_0f85_m2m3_noshield M=1 l=5.000u w=5.000u 
++ c=0.02658375p
+CI1_default I1_default_TOP I1_default_BOT cap_mim_0f85_m2m3_noshield M=1 l=5u w=5u 
++ c=0.02658375p
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_1p0fF_tm_m3m4_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_0f85_m3m4_noshield.cdl
similarity index 61%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_1p0fF_tm_m3m4_noshield.cdl
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_0f85_m3m4_noshield.cdl
index a4a4ba7..19ee6d1 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_1p0fF_tm_m3m4_noshield.cdl
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_0f85_m3m4_noshield.cdl
@@ -2,7 +2,7 @@
 * auCdl Netlist:
 * 
 * Library Name:  TCG_Library
-* Top Cell Name: mim_1p0fF_tm_m3m4_noshield
+* Top Cell Name: cap_mim_0f85_m3m4_noshield
 * View Name:     schematic
 * Netlisted on:  Nov 24 10:42:03 2021
 ************************************************************************
@@ -22,11 +22,11 @@
 
 ************************************************************************
 * Library Name: TCG_Library
-* Cell Name:    mim_1p0fF_tm_m3m4_noshield
+* Cell Name:    cap_mim_0f85_m3m4_noshield
 * View Name:    schematic
 ************************************************************************
 
-.SUBCKT mim_1p0fF_tm_m3m4_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
+.SUBCKT cap_mim_0f85_m3m4_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
 + I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
 + I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
 + I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
@@ -36,25 +36,25 @@
 *.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
 *.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
 *.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
-CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT mim_1p0fF_tm_m3m4_noshield M=1 l=50.000u w=50.000u 
-+ c=2.5335p
-CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT mim_1p0fF_tm_m3m4_noshield M=1 l=50.000u w=11.560u 
-+ c=0.6111156p
-CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT mim_1p0fF_tm_m3m4_noshield M=1 l=50.000u w=5.000u 
-+ c=0.28305p
-CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT mim_1p0fF_tm_m3m4_noshield M=1 l=11.560u w=50.000u 
-+ c=0.6111156p
-CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT mim_1p0fF_tm_m3m4_noshield M=1 l=11.560u w=11.560u 
-+ c=0.14715556p
-CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT mim_1p0fF_tm_m3m4_noshield M=1 l=11.560u w=5.000u 
-+ c=0.0679782p
-CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT mim_1p0fF_tm_m3m4_noshield M=1 l=5.000u w=50.000u 
-+ c=0.28305p
-CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT mim_1p0fF_tm_m3m4_noshield M=1 l=5.000u w=11.560u 
-+ c=0.0679782p
-CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT mim_1p0fF_tm_m3m4_noshield M=1 l=5.000u w=5.000u 
-+ c=0.031275p
-CI1_default I1_default_TOP I1_default_BOT mim_1p0fF_tm_m3m4_noshield M=1 l=5u w=5u 
-+ c=0.031275p
+CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT cap_mim_0f85_m3m4_noshield M=1 l=50.000u w=50.000u 
++ c=2.153475p
+CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT cap_mim_0f85_m3m4_noshield M=1 l=50.000u w=11.560u 
++ c=0.51944826p
+CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT cap_mim_0f85_m3m4_noshield M=1 l=50.000u w=5.000u 
++ c=0.2405925p
+CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT cap_mim_0f85_m3m4_noshield M=1 l=11.560u w=50.000u 
++ c=0.51944826p
+CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT cap_mim_0f85_m3m4_noshield M=1 l=11.560u w=11.560u 
++ c=0.125082226p
+CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT cap_mim_0f85_m3m4_noshield M=1 l=11.560u w=5.000u 
++ c=0.05778147p
+CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT cap_mim_0f85_m3m4_noshield M=1 l=5.000u w=50.000u 
++ c=0.2405925p
+CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT cap_mim_0f85_m3m4_noshield M=1 l=5.000u w=11.560u 
++ c=0.05778147p
+CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT cap_mim_0f85_m3m4_noshield M=1 l=5.000u w=5.000u 
++ c=0.02658375p
+CI1_default I1_default_TOP I1_default_BOT cap_mim_0f85_m3m4_noshield M=1 l=5u w=5u 
++ c=0.02658375p
 .ENDS
 
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_1p0fF_tm_m4m5_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_0f85_m4m5_noshield.cdl
similarity index 61%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_1p0fF_tm_m4m5_noshield.cdl
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_0f85_m4m5_noshield.cdl
index 6e0ae99..5682262 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_1p0fF_tm_m4m5_noshield.cdl
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_0f85_m4m5_noshield.cdl
@@ -2,7 +2,7 @@
 * auCdl Netlist:
 * 
 * Library Name:  TCG_Library
-* Top Cell Name: mim_1p0fF_tm_m4m5_noshield
+* Top Cell Name: cap_mim_0f85_m4m5_noshield
 * View Name:     schematic
 * Netlisted on:  Nov 24 10:42:03 2021
 ************************************************************************
@@ -22,11 +22,11 @@
 
 ************************************************************************
 * Library Name: TCG_Library
-* Cell Name:    mim_1p0fF_tm_m4m5_noshield
+* Cell Name:    cap_mim_0f85_m4m5_noshield
 * View Name:    schematic
 ************************************************************************
 
-.SUBCKT mim_1p0fF_tm_m4m5_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
+.SUBCKT cap_mim_0f85_m4m5_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
 + I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
 + I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
 + I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
@@ -36,25 +36,25 @@
 *.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
 *.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
 *.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
-CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT mim_1p0fF_tm_m4m5_noshield M=1 l=50.000u w=50.000u 
-+ c=2.5335p
-CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT mim_1p0fF_tm_m4m5_noshield M=1 l=50.000u w=11.560u 
-+ c=0.6111156p
-CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT mim_1p0fF_tm_m4m5_noshield M=1 l=50.000u w=5.000u 
-+ c=0.28305p
-CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT mim_1p0fF_tm_m4m5_noshield M=1 l=11.560u w=50.000u 
-+ c=0.6111156p
-CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT mim_1p0fF_tm_m4m5_noshield M=1 l=11.560u w=11.560u 
-+ c=0.14715556p
-CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT mim_1p0fF_tm_m4m5_noshield M=1 l=11.560u w=5.000u 
-+ c=0.0679782p
-CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT mim_1p0fF_tm_m4m5_noshield M=1 l=5.000u w=50.000u 
-+ c=0.28305p
-CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT mim_1p0fF_tm_m4m5_noshield M=1 l=5.000u w=11.560u 
-+ c=0.0679782p
-CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT mim_1p0fF_tm_m4m5_noshield M=1 l=5.000u w=5.000u 
-+ c=0.031275p
-CI1_default I1_default_TOP I1_default_BOT mim_1p0fF_tm_m4m5_noshield M=1 l=5u w=5u 
-+ c=0.031275p
+CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT cap_mim_0f85_m4m5_noshield M=1 l=50.000u w=50.000u 
++ c=2.153475p
+CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT cap_mim_0f85_m4m5_noshield M=1 l=50.000u w=11.560u 
++ c=0.51944826p
+CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT cap_mim_0f85_m4m5_noshield M=1 l=50.000u w=5.000u 
++ c=0.2405925p
+CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT cap_mim_0f85_m4m5_noshield M=1 l=11.560u w=50.000u 
++ c=0.51944826p
+CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT cap_mim_0f85_m4m5_noshield M=1 l=11.560u w=11.560u 
++ c=0.125082226p
+CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT cap_mim_0f85_m4m5_noshield M=1 l=11.560u w=5.000u 
++ c=0.05778147p
+CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT cap_mim_0f85_m4m5_noshield M=1 l=5.000u w=50.000u 
++ c=0.2405925p
+CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT cap_mim_0f85_m4m5_noshield M=1 l=5.000u w=11.560u 
++ c=0.05778147p
+CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT cap_mim_0f85_m4m5_noshield M=1 l=5.000u w=5.000u 
++ c=0.02658375p
+CI1_default I1_default_TOP I1_default_BOT cap_mim_0f85_m4m5_noshield M=1 l=5u w=5u 
++ c=0.02658375p
 .ENDS
 
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_1p0fF_tm_m5m6_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_0f85_m5m6_noshield.cdl
similarity index 61%
rename from ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_1p0fF_tm_m5m6_noshield.cdl
rename to ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_0f85_m5m6_noshield.cdl
index eda163d..f28729e 100644
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_1p0fF_tm_m5m6_noshield.cdl
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_0f85_m5m6_noshield.cdl
@@ -2,7 +2,7 @@
 * auCdl Netlist:
 * 
 * Library Name:  TCG_Library
-* Top Cell Name: mim_1p0fF_tm_m5m6_noshield
+* Top Cell Name: cap_mim_0f85_m5m6_noshield
 * View Name:     schematic
 * Netlisted on:  Nov 24 10:42:03 2021
 ************************************************************************
@@ -22,11 +22,11 @@
 
 ************************************************************************
 * Library Name: TCG_Library
-* Cell Name:    mim_1p0fF_tm_m5m6_noshield
+* Cell Name:    cap_mim_0f85_m5m6_noshield
 * View Name:    schematic
 ************************************************************************
 
-.SUBCKT mim_1p0fF_tm_m5m6_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
+.SUBCKT cap_mim_0f85_m5m6_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
 + I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
 + I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
 + I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
@@ -36,25 +36,25 @@
 *.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
 *.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
 *.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
-CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT mim_1p0fF_tm_m5m6_noshield M=1 l=50.000u w=50.000u 
-+ c=2.5335p
-CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT mim_1p0fF_tm_m5m6_noshield M=1 l=50.000u w=11.560u 
-+ c=0.6111156p
-CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT mim_1p0fF_tm_m5m6_noshield M=1 l=50.000u w=5.000u 
-+ c=0.28305p
-CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT mim_1p0fF_tm_m5m6_noshield M=1 l=11.560u w=50.000u 
-+ c=0.6111156p
-CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT mim_1p0fF_tm_m5m6_noshield M=1 l=11.560u w=11.560u 
-+ c=0.14715556p
-CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT mim_1p0fF_tm_m5m6_noshield M=1 l=11.560u w=5.000u 
-+ c=0.0679782p
-CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT mim_1p0fF_tm_m5m6_noshield M=1 l=5.000u w=50.000u 
-+ c=0.28305p
-CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT mim_1p0fF_tm_m5m6_noshield M=1 l=5.000u w=11.560u 
-+ c=0.0679782p
-CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT mim_1p0fF_tm_m5m6_noshield M=1 l=5.000u w=5.000u 
-+ c=0.031275p
-CI1_default I1_default_TOP I1_default_BOT mim_1p0fF_tm_m5m6_noshield M=1 l=5u w=5u 
-+ c=0.031275p
+CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT cap_mim_0f85_m5m6_noshield M=1 l=50.000u w=50.000u 
++ c=2.153475p
+CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT cap_mim_0f85_m5m6_noshield M=1 l=50.000u w=11.560u 
++ c=0.51944826p
+CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT cap_mim_0f85_m5m6_noshield M=1 l=50.000u w=5.000u 
++ c=0.2405925p
+CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT cap_mim_0f85_m5m6_noshield M=1 l=11.560u w=50.000u 
++ c=0.51944826p
+CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT cap_mim_0f85_m5m6_noshield M=1 l=11.560u w=11.560u 
++ c=0.125082226p
+CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT cap_mim_0f85_m5m6_noshield M=1 l=11.560u w=5.000u 
++ c=0.05778147p
+CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT cap_mim_0f85_m5m6_noshield M=1 l=5.000u w=50.000u 
++ c=0.2405925p
+CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT cap_mim_0f85_m5m6_noshield M=1 l=5.000u w=11.560u 
++ c=0.05778147p
+CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT cap_mim_0f85_m5m6_noshield M=1 l=5.000u w=5.000u 
++ c=0.02658375p
+CI1_default I1_default_TOP I1_default_BOT cap_mim_0f85_m5m6_noshield M=1 l=5u w=5u 
++ c=0.02658375p
 .ENDS
 
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_1f0_m2m3_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_1f0_m2m3_noshield.cdl
new file mode 100644
index 0000000..ba2c560
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_1f0_m2m3_noshield.cdl
@@ -0,0 +1,60 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: cap_mim_1f0_m2m3_noshield
+* View Name:     schematic
+* Netlisted on:  Nov 24 10:39:22 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    cap_mim_1f0_m2m3_noshield
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT cap_mim_1f0_m2m3_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
++ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
++ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
++ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
++ I1_default_TOP
+*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
+*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
+*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
+*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
+*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
+CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT cap_mim_1f0_m2m3_noshield M=1 l=50.000u w=50.000u 
++ c=2.5335p
+CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT cap_mim_1f0_m2m3_noshield M=1 l=50.000u w=11.560u 
++ c=0.6111156p
+CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT cap_mim_1f0_m2m3_noshield M=1 l=50.000u w=5.000u 
++ c=0.28305p
+CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT cap_mim_1f0_m2m3_noshield M=1 l=11.560u w=50.000u 
++ c=0.6111156p
+CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT cap_mim_1f0_m2m3_noshield M=1 l=11.560u w=11.560u 
++ c=0.14715556p
+CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT cap_mim_1f0_m2m3_noshield M=1 l=11.560u w=5.000u 
++ c=0.0679782p
+CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT cap_mim_1f0_m2m3_noshield M=1 l=5.000u w=50.000u 
++ c=0.28305p
+CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT cap_mim_1f0_m2m3_noshield M=1 l=5.000u w=11.560u 
++ c=0.0679782p
+CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT cap_mim_1f0_m2m3_noshield M=1 l=5.000u w=5.000u 
++ c=0.031275p
+CI1_default I1_default_TOP I1_default_BOT cap_mim_1f0_m2m3_noshield M=1 l=5u w=5u 
++ c=0.031275p
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_1f0_m3m4_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_1f0_m3m4_noshield.cdl
new file mode 100644
index 0000000..674d7e6
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_1f0_m3m4_noshield.cdl
@@ -0,0 +1,60 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: cap_mim_1f0_m3m4_noshield
+* View Name:     schematic
+* Netlisted on:  Nov 24 10:42:03 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    cap_mim_1f0_m3m4_noshield
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT cap_mim_1f0_m3m4_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
++ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
++ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
++ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
++ I1_default_TOP
+*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
+*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
+*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
+*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
+*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
+CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT cap_mim_1f0_m3m4_noshield M=1 l=50.000u w=50.000u 
++ c=2.5335p
+CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT cap_mim_1f0_m3m4_noshield M=1 l=50.000u w=11.560u 
++ c=0.6111156p
+CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT cap_mim_1f0_m3m4_noshield M=1 l=50.000u w=5.000u 
++ c=0.28305p
+CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT cap_mim_1f0_m3m4_noshield M=1 l=11.560u w=50.000u 
++ c=0.6111156p
+CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT cap_mim_1f0_m3m4_noshield M=1 l=11.560u w=11.560u 
++ c=0.14715556p
+CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT cap_mim_1f0_m3m4_noshield M=1 l=11.560u w=5.000u 
++ c=0.0679782p
+CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT cap_mim_1f0_m3m4_noshield M=1 l=5.000u w=50.000u 
++ c=0.28305p
+CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT cap_mim_1f0_m3m4_noshield M=1 l=5.000u w=11.560u 
++ c=0.0679782p
+CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT cap_mim_1f0_m3m4_noshield M=1 l=5.000u w=5.000u 
++ c=0.031275p
+CI1_default I1_default_TOP I1_default_BOT cap_mim_1f0_m3m4_noshield M=1 l=5u w=5u 
++ c=0.031275p
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_1f0_m4m5_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_1f0_m4m5_noshield.cdl
new file mode 100644
index 0000000..4918d52
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_1f0_m4m5_noshield.cdl
@@ -0,0 +1,60 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: cap_mim_1f0_m4m5_noshield
+* View Name:     schematic
+* Netlisted on:  Nov 24 10:42:03 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    cap_mim_1f0_m4m5_noshield
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT cap_mim_1f0_m4m5_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
++ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
++ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
++ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
++ I1_default_TOP
+*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
+*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
+*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
+*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
+*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
+CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT cap_mim_1f0_m4m5_noshield M=1 l=50.000u w=50.000u 
++ c=2.5335p
+CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT cap_mim_1f0_m4m5_noshield M=1 l=50.000u w=11.560u 
++ c=0.6111156p
+CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT cap_mim_1f0_m4m5_noshield M=1 l=50.000u w=5.000u 
++ c=0.28305p
+CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT cap_mim_1f0_m4m5_noshield M=1 l=11.560u w=50.000u 
++ c=0.6111156p
+CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT cap_mim_1f0_m4m5_noshield M=1 l=11.560u w=11.560u 
++ c=0.14715556p
+CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT cap_mim_1f0_m4m5_noshield M=1 l=11.560u w=5.000u 
++ c=0.0679782p
+CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT cap_mim_1f0_m4m5_noshield M=1 l=5.000u w=50.000u 
++ c=0.28305p
+CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT cap_mim_1f0_m4m5_noshield M=1 l=5.000u w=11.560u 
++ c=0.0679782p
+CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT cap_mim_1f0_m4m5_noshield M=1 l=5.000u w=5.000u 
++ c=0.031275p
+CI1_default I1_default_TOP I1_default_BOT cap_mim_1f0_m4m5_noshield M=1 l=5u w=5u 
++ c=0.031275p
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_1f0_m5m6_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_1f0_m5m6_noshield.cdl
new file mode 100644
index 0000000..4bfabb6
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_1f0_m5m6_noshield.cdl
@@ -0,0 +1,60 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: cap_mim_1f0_m5m6_noshield
+* View Name:     schematic
+* Netlisted on:  Nov 24 10:42:03 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    cap_mim_1f0_m5m6_noshield
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT cap_mim_1f0_m5m6_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
++ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
++ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
++ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
++ I1_default_TOP
+*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
+*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
+*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
+*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
+*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
+CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT cap_mim_1f0_m5m6_noshield M=1 l=50.000u w=50.000u 
++ c=2.5335p
+CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT cap_mim_1f0_m5m6_noshield M=1 l=50.000u w=11.560u 
++ c=0.6111156p
+CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT cap_mim_1f0_m5m6_noshield M=1 l=50.000u w=5.000u 
++ c=0.28305p
+CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT cap_mim_1f0_m5m6_noshield M=1 l=11.560u w=50.000u 
++ c=0.6111156p
+CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT cap_mim_1f0_m5m6_noshield M=1 l=11.560u w=11.560u 
++ c=0.14715556p
+CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT cap_mim_1f0_m5m6_noshield M=1 l=11.560u w=5.000u 
++ c=0.0679782p
+CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT cap_mim_1f0_m5m6_noshield M=1 l=5.000u w=50.000u 
++ c=0.28305p
+CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT cap_mim_1f0_m5m6_noshield M=1 l=5.000u w=11.560u 
++ c=0.0679782p
+CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT cap_mim_1f0_m5m6_noshield M=1 l=5.000u w=5.000u 
++ c=0.031275p
+CI1_default I1_default_TOP I1_default_BOT cap_mim_1f0_m5m6_noshield M=1 l=5u w=5u 
++ c=0.031275p
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_1p5fF_m2m3_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_1p5fF_m2m3_noshield.cdl
new file mode 100644
index 0000000..262610a
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_1p5fF_m2m3_noshield.cdl
@@ -0,0 +1,59 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: cap_mim_1f5_m2m3_noshield
+* View Name:     schematic
+* Netlisted on:  Nov 24 11:42:38 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    cap_mim_1f5_m2m3_noshield
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT cap_mim_1f5_m2m3_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
++ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
++ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
++ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
++ I1_default_TOP
+*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
+*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
+*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
+*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
+*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
+CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT cap_mim_1f5_m2m3_noshield M=1 l=100.000u w=100.000u 
++ c=14.8516p
+CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT cap_mim_1f5_m2m3_noshield M=1 l=100.000u w=12.340u 
++ c=1.89913372p
+CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT cap_mim_1f5_m2m3_noshield M=1 l=100.000u w=5.000u 
++ c=0.81459p
+CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT cap_mim_1f5_m2m3_noshield M=1 l=12.340u w=100.000u 
++ c=1.89913372p
+CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT cap_mim_1f5_m2m3_noshield M=1 l=12.340u w=12.340u 
++ c=0.24255257p
+CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT cap_mim_1f5_m2m3_noshield M=1 l=12.340u w=5.000u 
++ c=0.10384272p
+CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT cap_mim_1f5_m2m3_noshield M=1 l=5.000u w=100.000u 
++ c=0.81459p
+CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT cap_mim_1f5_m2m3_noshield M=1 l=5.000u w=12.340u 
++ c=0.10384272p
+CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT cap_mim_1f5_m2m3_noshield M=1 l=5.000u w=5.000u 
++ c=0.04433p
+CI1_default I1_default_TOP I1_default_BOT cap_mim_1f5_m2m3_noshield M=1 l=5u w=5u c=0.04433p
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_1p5fF_m3m4_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_1p5fF_m3m4_noshield.cdl
new file mode 100644
index 0000000..22327d8
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_1p5fF_m3m4_noshield.cdl
@@ -0,0 +1,59 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: cap_mim_1f5_m3m4_noshield
+* View Name:     schematic
+* Netlisted on:  Nov 24 12:03:53 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    cap_mim_1f5_m3m4_noshield
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT cap_mim_1f5_m3m4_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
++ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
++ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
++ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
++ I1_default_TOP
+*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
+*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
+*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
+*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
+*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
+CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT cap_mim_1f5_m3m4_noshield M=1 l=100.000u w=100.000u 
++ c=14.8516p
+CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT cap_mim_1f5_m3m4_noshield M=1 l=100.000u w=12.340u 
++ c=1.89913372p
+CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT cap_mim_1f5_m3m4_noshield M=1 l=100.000u w=5.000u 
++ c=0.81459p
+CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT cap_mim_1f5_m3m4_noshield M=1 l=12.340u w=100.000u 
++ c=1.89913372p
+CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT cap_mim_1f5_m3m4_noshield M=1 l=12.340u w=12.340u 
++ c=0.24255257p
+CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT cap_mim_1f5_m3m4_noshield M=1 l=12.340u w=5.000u 
++ c=0.10384272p
+CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT cap_mim_1f5_m3m4_noshield M=1 l=5.000u w=100.000u 
++ c=0.81459p
+CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT cap_mim_1f5_m3m4_noshield M=1 l=5.000u w=12.340u 
++ c=0.10384272p
+CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT cap_mim_1f5_m3m4_noshield M=1 l=5.000u w=5.000u 
++ c=0.04433p
+CI1_default I1_default_TOP I1_default_BOT cap_mim_1f5_m3m4_noshield M=1 l=5u w=5u c=0.04433p
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_1p5fF_m4m5_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_1p5fF_m4m5_noshield.cdl
new file mode 100644
index 0000000..aa81915
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_1p5fF_m4m5_noshield.cdl
@@ -0,0 +1,59 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: cap_mim_1f5_m4m5_noshield
+* View Name:     schematic
+* Netlisted on:  Nov 24 12:03:53 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    cap_mim_1f5_m4m5_noshield
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT cap_mim_1f5_m4m5_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
++ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
++ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
++ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
++ I1_default_TOP
+*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
+*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
+*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
+*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
+*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
+CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT cap_mim_1f5_m4m5_noshield M=1 l=100.000u w=100.000u 
++ c=14.8516p
+CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT cap_mim_1f5_m4m5_noshield M=1 l=100.000u w=12.340u 
++ c=1.89913372p
+CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT cap_mim_1f5_m4m5_noshield M=1 l=100.000u w=5.000u 
++ c=0.81459p
+CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT cap_mim_1f5_m4m5_noshield M=1 l=12.340u w=100.000u 
++ c=1.89913372p
+CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT cap_mim_1f5_m4m5_noshield M=1 l=12.340u w=12.340u 
++ c=0.24255257p
+CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT cap_mim_1f5_m4m5_noshield M=1 l=12.340u w=5.000u 
++ c=0.10384272p
+CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT cap_mim_1f5_m4m5_noshield M=1 l=5.000u w=100.000u 
++ c=0.81459p
+CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT cap_mim_1f5_m4m5_noshield M=1 l=5.000u w=12.340u 
++ c=0.10384272p
+CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT cap_mim_1f5_m4m5_noshield M=1 l=5.000u w=5.000u 
++ c=0.04433p
+CI1_default I1_default_TOP I1_default_BOT cap_mim_1f5_m4m5_noshield M=1 l=5u w=5u c=0.04433p
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_1p5fF_m5m6_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_1p5fF_m5m6_noshield.cdl
new file mode 100644
index 0000000..d657f55
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_1p5fF_m5m6_noshield.cdl
@@ -0,0 +1,59 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: cap_mim_1f5_m5m6_noshield
+* View Name:     schematic
+* Netlisted on:  Nov 24 12:03:53 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    cap_mim_1f5_m5m6_noshield
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT cap_mim_1f5_m5m6_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
++ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
++ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
++ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
++ I1_default_TOP
+*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
+*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
+*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
+*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
+*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
+CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT cap_mim_1f5_m5m6_noshield M=1 l=100.000u w=100.000u 
++ c=14.8516p
+CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT cap_mim_1f5_m5m6_noshield M=1 l=100.000u w=12.340u 
++ c=1.89913372p
+CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT cap_mim_1f5_m5m6_noshield M=1 l=100.000u w=5.000u 
++ c=0.81459p
+CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT cap_mim_1f5_m5m6_noshield M=1 l=12.340u w=100.000u 
++ c=1.89913372p
+CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT cap_mim_1f5_m5m6_noshield M=1 l=12.340u w=12.340u 
++ c=0.24255257p
+CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT cap_mim_1f5_m5m6_noshield M=1 l=12.340u w=5.000u 
++ c=0.10384272p
+CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT cap_mim_1f5_m5m6_noshield M=1 l=5.000u w=100.000u 
++ c=0.81459p
+CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT cap_mim_1f5_m5m6_noshield M=1 l=5.000u w=12.340u 
++ c=0.10384272p
+CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT cap_mim_1f5_m5m6_noshield M=1 l=5.000u w=5.000u 
++ c=0.04433p
+CI1_default I1_default_TOP I1_default_BOT cap_mim_1f5_m5m6_noshield M=1 l=5u w=5u c=0.04433p
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_2f0_m2m3_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_2f0_m2m3_noshield.cdl
new file mode 100644
index 0000000..61880d4
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_2f0_m2m3_noshield.cdl
@@ -0,0 +1,60 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: cap_mim_2f0_m2m3_noshield
+* View Name:     schematic
+* Netlisted on:  Nov 24 10:53:54 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    cap_mim_2f0_m2m3_noshield
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT cap_mim_2f0_m2m3_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
++ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
++ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
++ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
++ I1_default_TOP
+*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
+*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
+*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
+*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
+*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
+CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT cap_mim_2f0_m2m3_noshield M=1 l=100.000u 
++ w=100.000u c=19.99532p
+CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT cap_mim_2f0_m2m3_noshield M=1 l=100.000u 
++ w=12.340u c=2.50920124p
+CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT cap_mim_2f0_m2m3_noshield M=1 l=100.000u 
++ w=5.000u c=1.045043p
+CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT cap_mim_2f0_m2m3_noshield M=1 l=12.340u 
++ w=100.000u c=2.50920124p
+CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT cap_mim_2f0_m2m3_noshield M=1 l=12.340u 
++ w=12.340u c=0.31479093p
+CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT cap_mim_2f0_m2m3_noshield M=1 l=12.340u 
++ w=5.000u c=0.13104724p
+CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT cap_mim_2f0_m2m3_noshield M=1 l=5.000u 
++ w=100.000u c=1.045043p
+CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT cap_mim_2f0_m2m3_noshield M=1 l=5.000u 
++ w=12.340u c=0.13104724p
+CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT cap_mim_2f0_m2m3_noshield M=1 l=5.000u 
++ w=5.000u c=0.054516p
+CI1_default I1_default_TOP I1_default_BOT cap_mim_2f0_m2m3_noshield M=1 l=5u w=5u 
++ c=0.054516p
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_2f0_m3m4_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_2f0_m3m4_noshield.cdl
new file mode 100644
index 0000000..02d889e
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_2f0_m3m4_noshield.cdl
@@ -0,0 +1,60 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: cap_mim_2f0_m3m4_noshield
+* View Name:     schematic
+* Netlisted on:  Nov 24 11:32:36 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    cap_mim_2f0_m3m4_noshield
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT cap_mim_2f0_m3m4_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
++ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
++ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
++ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
++ I1_default_TOP
+*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
+*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
+*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
+*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
+*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
+CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT cap_mim_2f0_m3m4_noshield M=1 l=100.000u 
++ w=100.000u c=19.99532p
+CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT cap_mim_2f0_m3m4_noshield M=1 l=100.000u 
++ w=12.340u c=2.50920124p
+CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT cap_mim_2f0_m3m4_noshield M=1 l=100.000u 
++ w=5.000u c=1.045043p
+CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT cap_mim_2f0_m3m4_noshield M=1 l=12.340u 
++ w=100.000u c=2.50920124p
+CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT cap_mim_2f0_m3m4_noshield M=1 l=12.340u 
++ w=12.340u c=0.31479093p
+CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT cap_mim_2f0_m3m4_noshield M=1 l=12.340u 
++ w=5.000u c=0.13104724p
+CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT cap_mim_2f0_m3m4_noshield M=1 l=5.000u 
++ w=100.000u c=1.045043p
+CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT cap_mim_2f0_m3m4_noshield M=1 l=5.000u 
++ w=12.340u c=0.13104724p
+CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT cap_mim_2f0_m3m4_noshield M=1 l=5.000u 
++ w=5.000u c=0.054516p
+CI1_default I1_default_TOP I1_default_BOT cap_mim_2f0_m3m4_noshield M=1 l=5u w=5u 
++ c=0.054516p
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_2f0_m4m5_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_2f0_m4m5_noshield.cdl
new file mode 100644
index 0000000..ab3ffbf
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_2f0_m4m5_noshield.cdl
@@ -0,0 +1,60 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: cap_mim_2f0_m4m5_noshield
+* View Name:     schematic
+* Netlisted on:  Nov 24 11:32:36 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    cap_mim_2f0_m4m5_noshield
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT cap_mim_2f0_m4m5_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
++ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
++ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
++ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
++ I1_default_TOP
+*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
+*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
+*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
+*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
+*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
+CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT cap_mim_2f0_m4m5_noshield M=1 l=100.000u 
++ w=100.000u c=19.99532p
+CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT cap_mim_2f0_m4m5_noshield M=1 l=100.000u 
++ w=12.340u c=2.50920124p
+CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT cap_mim_2f0_m4m5_noshield M=1 l=100.000u 
++ w=5.000u c=1.045043p
+CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT cap_mim_2f0_m4m5_noshield M=1 l=12.340u 
++ w=100.000u c=2.50920124p
+CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT cap_mim_2f0_m4m5_noshield M=1 l=12.340u 
++ w=12.340u c=0.31479093p
+CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT cap_mim_2f0_m4m5_noshield M=1 l=12.340u 
++ w=5.000u c=0.13104724p
+CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT cap_mim_2f0_m4m5_noshield M=1 l=5.000u 
++ w=100.000u c=1.045043p
+CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT cap_mim_2f0_m4m5_noshield M=1 l=5.000u 
++ w=12.340u c=0.13104724p
+CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT cap_mim_2f0_m4m5_noshield M=1 l=5.000u 
++ w=5.000u c=0.054516p
+CI1_default I1_default_TOP I1_default_BOT cap_mim_2f0_m4m5_noshield M=1 l=5u w=5u 
++ c=0.054516p
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_2f0_m5m6_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_2f0_m5m6_noshield.cdl
new file mode 100644
index 0000000..7f4bc39
--- /dev/null
+++ b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/cap_mim_2f0_m5m6_noshield.cdl
@@ -0,0 +1,60 @@
+************************************************************************
+* auCdl Netlist:
+* 
+* Library Name:  TCG_Library
+* Top Cell Name: cap_mim_2f0_m5m6_noshield
+* View Name:     schematic
+* Netlisted on:  Nov 24 11:32:36 2021
+************************************************************************
+
+*.BIPOLAR
+*.RESI = 2000 
+*.RESVAL
+*.CAPVAL
+*.DIOPERI
+*.DIOAREA
+*.EQUATION
+*.SCALE METER
+*.MEGA
+.PARAM
+
+
+
+************************************************************************
+* Library Name: TCG_Library
+* Cell Name:    cap_mim_2f0_m5m6_noshield
+* View Name:    schematic
+************************************************************************
+
+.SUBCKT cap_mim_2f0_m5m6_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
++ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
++ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
++ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
++ I1_default_TOP
+*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
+*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
+*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
+*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
+*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
+CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT cap_mim_2f0_m5m6_noshield M=1 l=100.000u 
++ w=100.000u c=19.99532p
+CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT cap_mim_2f0_m5m6_noshield M=1 l=100.000u 
++ w=12.340u c=2.50920124p
+CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT cap_mim_2f0_m5m6_noshield M=1 l=100.000u 
++ w=5.000u c=1.045043p
+CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT cap_mim_2f0_m5m6_noshield M=1 l=12.340u 
++ w=100.000u c=2.50920124p
+CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT cap_mim_2f0_m5m6_noshield M=1 l=12.340u 
++ w=12.340u c=0.31479093p
+CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT cap_mim_2f0_m5m6_noshield M=1 l=12.340u 
++ w=5.000u c=0.13104724p
+CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT cap_mim_2f0_m5m6_noshield M=1 l=5.000u 
++ w=100.000u c=1.045043p
+CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT cap_mim_2f0_m5m6_noshield M=1 l=5.000u 
++ w=12.340u c=0.13104724p
+CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT cap_mim_2f0_m5m6_noshield M=1 l=5.000u 
++ w=5.000u c=0.054516p
+CI1_default I1_default_TOP I1_default_BOT cap_mim_2f0_m5m6_noshield M=1 l=5u w=5u 
++ c=0.054516p
+.ENDS
+
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_0p85fF_m2m3_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_0p85fF_m2m3_noshield.cdl
deleted file mode 100644
index 808d77a..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_0p85fF_m2m3_noshield.cdl
+++ /dev/null
@@ -1,60 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: mim_0p85fF_m2m3_noshield
-* View Name:     schematic
-* Netlisted on:  Nov 24 10:39:22 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    mim_0p85fF_m2m3_noshield
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT mim_0p85fF_m2m3_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
-+ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
-+ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
-+ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
-+ I1_default_TOP
-*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
-*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
-*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
-*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
-*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
-CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT mim_0p85fF_m2m3_noshield M=1 l=50.000u w=50.000u 
-+ c=2.153475p
-CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT mim_0p85fF_m2m3_noshield M=1 l=50.000u w=11.560u 
-+ c=0.51944826p
-CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT mim_0p85fF_m2m3_noshield M=1 l=50.000u w=5.000u 
-+ c=0.2405925p
-CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT mim_0p85fF_m2m3_noshield M=1 l=11.560u w=50.000u 
-+ c=0.51944826p
-CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT mim_0p85fF_m2m3_noshield M=1 l=11.560u w=11.560u 
-+ c=0.125082226p
-CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT mim_0p85fF_m2m3_noshield M=1 l=11.560u w=5.000u 
-+ c=0.05778147p
-CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT mim_0p85fF_m2m3_noshield M=1 l=5.000u w=50.000u 
-+ c=0.2405925p
-CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT mim_0p85fF_m2m3_noshield M=1 l=5.000u w=11.560u 
-+ c=0.05778147p
-CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT mim_0p85fF_m2m3_noshield M=1 l=5.000u w=5.000u 
-+ c=0.02658375p
-CI1_default I1_default_TOP I1_default_BOT mim_0p85fF_m2m3_noshield M=1 l=5u w=5u 
-+ c=0.02658375p
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_0p85fF_tm_m3m4_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_0p85fF_tm_m3m4_noshield.cdl
deleted file mode 100644
index 84dcbd3..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_0p85fF_tm_m3m4_noshield.cdl
+++ /dev/null
@@ -1,60 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: mim_0p85fF_tm_m3m4_noshield
-* View Name:     schematic
-* Netlisted on:  Nov 24 10:42:03 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    mim_0p85fF_tm_m3m4_noshield
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT mim_0p85fF_tm_m3m4_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
-+ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
-+ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
-+ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
-+ I1_default_TOP
-*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
-*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
-*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
-*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
-*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
-CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT mim_0p85fF_tm_m3m4_noshield M=1 l=50.000u w=50.000u 
-+ c=2.153475p
-CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT mim_0p85fF_tm_m3m4_noshield M=1 l=50.000u w=11.560u 
-+ c=0.51944826p
-CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT mim_0p85fF_tm_m3m4_noshield M=1 l=50.000u w=5.000u 
-+ c=0.2405925p
-CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT mim_0p85fF_tm_m3m4_noshield M=1 l=11.560u w=50.000u 
-+ c=0.51944826p
-CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT mim_0p85fF_tm_m3m4_noshield M=1 l=11.560u w=11.560u 
-+ c=0.125082226p
-CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT mim_0p85fF_tm_m3m4_noshield M=1 l=11.560u w=5.000u 
-+ c=0.05778147p
-CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT mim_0p85fF_tm_m3m4_noshield M=1 l=5.000u w=50.000u 
-+ c=0.2405925p
-CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT mim_0p85fF_tm_m3m4_noshield M=1 l=5.000u w=11.560u 
-+ c=0.05778147p
-CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT mim_0p85fF_tm_m3m4_noshield M=1 l=5.000u w=5.000u 
-+ c=0.02658375p
-CI1_default I1_default_TOP I1_default_BOT mim_0p85fF_tm_m3m4_noshield M=1 l=5u w=5u 
-+ c=0.02658375p
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_0p85fF_tm_m4m5_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_0p85fF_tm_m4m5_noshield.cdl
deleted file mode 100644
index 2dbf6ae..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_0p85fF_tm_m4m5_noshield.cdl
+++ /dev/null
@@ -1,60 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: mim_0p85fF_tm_m4m5_noshield
-* View Name:     schematic
-* Netlisted on:  Nov 24 10:42:03 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    mim_0p85fF_tm_m4m5_noshield
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT mim_0p85fF_tm_m4m5_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
-+ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
-+ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
-+ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
-+ I1_default_TOP
-*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
-*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
-*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
-*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
-*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
-CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT mim_0p85fF_tm_m4m5_noshield M=1 l=50.000u w=50.000u 
-+ c=2.153475p
-CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT mim_0p85fF_tm_m4m5_noshield M=1 l=50.000u w=11.560u 
-+ c=0.51944826p
-CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT mim_0p85fF_tm_m4m5_noshield M=1 l=50.000u w=5.000u 
-+ c=0.2405925p
-CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT mim_0p85fF_tm_m4m5_noshield M=1 l=11.560u w=50.000u 
-+ c=0.51944826p
-CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT mim_0p85fF_tm_m4m5_noshield M=1 l=11.560u w=11.560u 
-+ c=0.125082226p
-CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT mim_0p85fF_tm_m4m5_noshield M=1 l=11.560u w=5.000u 
-+ c=0.05778147p
-CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT mim_0p85fF_tm_m4m5_noshield M=1 l=5.000u w=50.000u 
-+ c=0.2405925p
-CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT mim_0p85fF_tm_m4m5_noshield M=1 l=5.000u w=11.560u 
-+ c=0.05778147p
-CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT mim_0p85fF_tm_m4m5_noshield M=1 l=5.000u w=5.000u 
-+ c=0.02658375p
-CI1_default I1_default_TOP I1_default_BOT mim_0p85fF_tm_m4m5_noshield M=1 l=5u w=5u 
-+ c=0.02658375p
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_0p85fF_tm_m5m6_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_0p85fF_tm_m5m6_noshield.cdl
deleted file mode 100644
index eeb3db6..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_0p85fF_tm_m5m6_noshield.cdl
+++ /dev/null
@@ -1,60 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: mim_0p85fF_tm_m5m6_noshield
-* View Name:     schematic
-* Netlisted on:  Nov 24 10:42:03 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    mim_0p85fF_tm_m5m6_noshield
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT mim_0p85fF_tm_m5m6_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
-+ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
-+ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
-+ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
-+ I1_default_TOP
-*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
-*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
-*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
-*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
-*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
-CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT mim_0p85fF_tm_m5m6_noshield M=1 l=50.000u w=50.000u 
-+ c=2.153475p
-CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT mim_0p85fF_tm_m5m6_noshield M=1 l=50.000u w=11.560u 
-+ c=0.51944826p
-CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT mim_0p85fF_tm_m5m6_noshield M=1 l=50.000u w=5.000u 
-+ c=0.2405925p
-CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT mim_0p85fF_tm_m5m6_noshield M=1 l=11.560u w=50.000u 
-+ c=0.51944826p
-CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT mim_0p85fF_tm_m5m6_noshield M=1 l=11.560u w=11.560u 
-+ c=0.125082226p
-CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT mim_0p85fF_tm_m5m6_noshield M=1 l=11.560u w=5.000u 
-+ c=0.05778147p
-CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT mim_0p85fF_tm_m5m6_noshield M=1 l=5.000u w=50.000u 
-+ c=0.2405925p
-CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT mim_0p85fF_tm_m5m6_noshield M=1 l=5.000u w=11.560u 
-+ c=0.05778147p
-CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT mim_0p85fF_tm_m5m6_noshield M=1 l=5.000u w=5.000u 
-+ c=0.02658375p
-CI1_default I1_default_TOP I1_default_BOT mim_0p85fF_tm_m5m6_noshield M=1 l=5u w=5u 
-+ c=0.02658375p
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_1p0fF_m2m3_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_1p0fF_m2m3_noshield.cdl
deleted file mode 100644
index e83fa1f..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_1p0fF_m2m3_noshield.cdl
+++ /dev/null
@@ -1,60 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: mim_1p0fF_m2m3_noshield
-* View Name:     schematic
-* Netlisted on:  Nov 24 10:39:22 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    mim_1p0fF_m2m3_noshield
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT mim_1p0fF_m2m3_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
-+ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
-+ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
-+ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
-+ I1_default_TOP
-*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
-*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
-*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
-*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
-*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
-CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT mim_1p0fF_m2m3_noshield M=1 l=50.000u w=50.000u 
-+ c=2.5335p
-CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT mim_1p0fF_m2m3_noshield M=1 l=50.000u w=11.560u 
-+ c=0.6111156p
-CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT mim_1p0fF_m2m3_noshield M=1 l=50.000u w=5.000u 
-+ c=0.28305p
-CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT mim_1p0fF_m2m3_noshield M=1 l=11.560u w=50.000u 
-+ c=0.6111156p
-CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT mim_1p0fF_m2m3_noshield M=1 l=11.560u w=11.560u 
-+ c=0.14715556p
-CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT mim_1p0fF_m2m3_noshield M=1 l=11.560u w=5.000u 
-+ c=0.0679782p
-CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT mim_1p0fF_m2m3_noshield M=1 l=5.000u w=50.000u 
-+ c=0.28305p
-CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT mim_1p0fF_m2m3_noshield M=1 l=5.000u w=11.560u 
-+ c=0.0679782p
-CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT mim_1p0fF_m2m3_noshield M=1 l=5.000u w=5.000u 
-+ c=0.031275p
-CI1_default I1_default_TOP I1_default_BOT mim_1p0fF_m2m3_noshield M=1 l=5u w=5u 
-+ c=0.031275p
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_1p5fF_m2m3_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_1p5fF_m2m3_noshield.cdl
deleted file mode 100644
index 2fceba7..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_1p5fF_m2m3_noshield.cdl
+++ /dev/null
@@ -1,59 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: mim_1p5fF_m2m3_noshield
-* View Name:     schematic
-* Netlisted on:  Nov 24 11:42:38 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    mim_1p5fF_m2m3_noshield
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT mim_1p5fF_m2m3_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
-+ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
-+ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
-+ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
-+ I1_default_TOP
-*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
-*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
-*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
-*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
-*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
-CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT mim_1p5fF_m2m3_noshield M=1 l=100.000u w=100.000u 
-+ c=14.8516p
-CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT mim_1p5fF_m2m3_noshield M=1 l=100.000u w=12.340u 
-+ c=1.89913372p
-CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT mim_1p5fF_m2m3_noshield M=1 l=100.000u w=5.000u 
-+ c=0.81459p
-CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT mim_1p5fF_m2m3_noshield M=1 l=12.340u w=100.000u 
-+ c=1.89913372p
-CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT mim_1p5fF_m2m3_noshield M=1 l=12.340u w=12.340u 
-+ c=0.24255257p
-CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT mim_1p5fF_m2m3_noshield M=1 l=12.340u w=5.000u 
-+ c=0.10384272p
-CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT mim_1p5fF_m2m3_noshield M=1 l=5.000u w=100.000u 
-+ c=0.81459p
-CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT mim_1p5fF_m2m3_noshield M=1 l=5.000u w=12.340u 
-+ c=0.10384272p
-CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT mim_1p5fF_m2m3_noshield M=1 l=5.000u w=5.000u 
-+ c=0.04433p
-CI1_default I1_default_TOP I1_default_BOT mim_1p5fF_m2m3_noshield M=1 l=5u w=5u c=0.04433p
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_1p5fF_tm_m3m4_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_1p5fF_tm_m3m4_noshield.cdl
deleted file mode 100644
index 34731c2..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_1p5fF_tm_m3m4_noshield.cdl
+++ /dev/null
@@ -1,59 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: mim_1p5fF_tm_m3m4_noshield
-* View Name:     schematic
-* Netlisted on:  Nov 24 12:03:53 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    mim_1p5fF_tm_m3m4_noshield
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT mim_1p5fF_tm_m3m4_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
-+ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
-+ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
-+ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
-+ I1_default_TOP
-*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
-*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
-*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
-*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
-*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
-CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT mim_1p5fF_tm_m3m4_noshield M=1 l=100.000u w=100.000u 
-+ c=14.8516p
-CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT mim_1p5fF_tm_m3m4_noshield M=1 l=100.000u w=12.340u 
-+ c=1.89913372p
-CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT mim_1p5fF_tm_m3m4_noshield M=1 l=100.000u w=5.000u 
-+ c=0.81459p
-CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT mim_1p5fF_tm_m3m4_noshield M=1 l=12.340u w=100.000u 
-+ c=1.89913372p
-CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT mim_1p5fF_tm_m3m4_noshield M=1 l=12.340u w=12.340u 
-+ c=0.24255257p
-CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT mim_1p5fF_tm_m3m4_noshield M=1 l=12.340u w=5.000u 
-+ c=0.10384272p
-CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT mim_1p5fF_tm_m3m4_noshield M=1 l=5.000u w=100.000u 
-+ c=0.81459p
-CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT mim_1p5fF_tm_m3m4_noshield M=1 l=5.000u w=12.340u 
-+ c=0.10384272p
-CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT mim_1p5fF_tm_m3m4_noshield M=1 l=5.000u w=5.000u 
-+ c=0.04433p
-CI1_default I1_default_TOP I1_default_BOT mim_1p5fF_tm_m3m4_noshield M=1 l=5u w=5u c=0.04433p
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_1p5fF_tm_m4m5_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_1p5fF_tm_m4m5_noshield.cdl
deleted file mode 100644
index 1ceddc8..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_1p5fF_tm_m4m5_noshield.cdl
+++ /dev/null
@@ -1,59 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: mim_1p5fF_tm_m4m5_noshield
-* View Name:     schematic
-* Netlisted on:  Nov 24 12:03:53 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    mim_1p5fF_tm_m4m5_noshield
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT mim_1p5fF_tm_m4m5_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
-+ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
-+ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
-+ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
-+ I1_default_TOP
-*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
-*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
-*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
-*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
-*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
-CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT mim_1p5fF_tm_m4m5_noshield M=1 l=100.000u w=100.000u 
-+ c=14.8516p
-CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT mim_1p5fF_tm_m4m5_noshield M=1 l=100.000u w=12.340u 
-+ c=1.89913372p
-CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT mim_1p5fF_tm_m4m5_noshield M=1 l=100.000u w=5.000u 
-+ c=0.81459p
-CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT mim_1p5fF_tm_m4m5_noshield M=1 l=12.340u w=100.000u 
-+ c=1.89913372p
-CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT mim_1p5fF_tm_m4m5_noshield M=1 l=12.340u w=12.340u 
-+ c=0.24255257p
-CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT mim_1p5fF_tm_m4m5_noshield M=1 l=12.340u w=5.000u 
-+ c=0.10384272p
-CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT mim_1p5fF_tm_m4m5_noshield M=1 l=5.000u w=100.000u 
-+ c=0.81459p
-CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT mim_1p5fF_tm_m4m5_noshield M=1 l=5.000u w=12.340u 
-+ c=0.10384272p
-CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT mim_1p5fF_tm_m4m5_noshield M=1 l=5.000u w=5.000u 
-+ c=0.04433p
-CI1_default I1_default_TOP I1_default_BOT mim_1p5fF_tm_m4m5_noshield M=1 l=5u w=5u c=0.04433p
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_1p5fF_tm_m5m6_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_1p5fF_tm_m5m6_noshield.cdl
deleted file mode 100644
index 9a6bad7..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_1p5fF_tm_m5m6_noshield.cdl
+++ /dev/null
@@ -1,59 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: mim_1p5fF_tm_m5m6_noshield
-* View Name:     schematic
-* Netlisted on:  Nov 24 12:03:53 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    mim_1p5fF_tm_m5m6_noshield
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT mim_1p5fF_tm_m5m6_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
-+ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
-+ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
-+ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
-+ I1_default_TOP
-*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
-*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
-*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
-*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
-*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
-CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT mim_1p5fF_tm_m5m6_noshield M=1 l=100.000u w=100.000u 
-+ c=14.8516p
-CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT mim_1p5fF_tm_m5m6_noshield M=1 l=100.000u w=12.340u 
-+ c=1.89913372p
-CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT mim_1p5fF_tm_m5m6_noshield M=1 l=100.000u w=5.000u 
-+ c=0.81459p
-CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT mim_1p5fF_tm_m5m6_noshield M=1 l=12.340u w=100.000u 
-+ c=1.89913372p
-CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT mim_1p5fF_tm_m5m6_noshield M=1 l=12.340u w=12.340u 
-+ c=0.24255257p
-CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT mim_1p5fF_tm_m5m6_noshield M=1 l=12.340u w=5.000u 
-+ c=0.10384272p
-CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT mim_1p5fF_tm_m5m6_noshield M=1 l=5.000u w=100.000u 
-+ c=0.81459p
-CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT mim_1p5fF_tm_m5m6_noshield M=1 l=5.000u w=12.340u 
-+ c=0.10384272p
-CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT mim_1p5fF_tm_m5m6_noshield M=1 l=5.000u w=5.000u 
-+ c=0.04433p
-CI1_default I1_default_TOP I1_default_BOT mim_1p5fF_tm_m5m6_noshield M=1 l=5u w=5u c=0.04433p
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_2p0fF_m2m3_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_2p0fF_m2m3_noshield.cdl
deleted file mode 100644
index 0223463..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_2p0fF_m2m3_noshield.cdl
+++ /dev/null
@@ -1,60 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: mim_2p0fF_m2m3_noshield
-* View Name:     schematic
-* Netlisted on:  Nov 24 10:53:54 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    mim_2p0fF_m2m3_noshield
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT mim_2p0fF_m2m3_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
-+ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
-+ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
-+ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
-+ I1_default_TOP
-*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
-*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
-*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
-*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
-*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
-CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT mim_2p0fF_m2m3_noshield M=1 l=100.000u 
-+ w=100.000u c=19.99532p
-CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT mim_2p0fF_m2m3_noshield M=1 l=100.000u 
-+ w=12.340u c=2.50920124p
-CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT mim_2p0fF_m2m3_noshield M=1 l=100.000u 
-+ w=5.000u c=1.045043p
-CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT mim_2p0fF_m2m3_noshield M=1 l=12.340u 
-+ w=100.000u c=2.50920124p
-CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT mim_2p0fF_m2m3_noshield M=1 l=12.340u 
-+ w=12.340u c=0.31479093p
-CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT mim_2p0fF_m2m3_noshield M=1 l=12.340u 
-+ w=5.000u c=0.13104724p
-CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT mim_2p0fF_m2m3_noshield M=1 l=5.000u 
-+ w=100.000u c=1.045043p
-CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT mim_2p0fF_m2m3_noshield M=1 l=5.000u 
-+ w=12.340u c=0.13104724p
-CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT mim_2p0fF_m2m3_noshield M=1 l=5.000u 
-+ w=5.000u c=0.054516p
-CI1_default I1_default_TOP I1_default_BOT mim_2p0fF_m2m3_noshield M=1 l=5u w=5u 
-+ c=0.054516p
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_2p0fF_tm_m3m4_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_2p0fF_tm_m3m4_noshield.cdl
deleted file mode 100644
index 0cb1eb6..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_2p0fF_tm_m3m4_noshield.cdl
+++ /dev/null
@@ -1,60 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: mim_2p0fF_tm_m3m4_noshield
-* View Name:     schematic
-* Netlisted on:  Nov 24 11:32:36 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    mim_2p0fF_tm_m3m4_noshield
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT mim_2p0fF_tm_m3m4_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
-+ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
-+ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
-+ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
-+ I1_default_TOP
-*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
-*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
-*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
-*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
-*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
-CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT mim_2p0fF_tm_m3m4_noshield M=1 l=100.000u 
-+ w=100.000u c=19.99532p
-CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT mim_2p0fF_tm_m3m4_noshield M=1 l=100.000u 
-+ w=12.340u c=2.50920124p
-CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT mim_2p0fF_tm_m3m4_noshield M=1 l=100.000u 
-+ w=5.000u c=1.045043p
-CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT mim_2p0fF_tm_m3m4_noshield M=1 l=12.340u 
-+ w=100.000u c=2.50920124p
-CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT mim_2p0fF_tm_m3m4_noshield M=1 l=12.340u 
-+ w=12.340u c=0.31479093p
-CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT mim_2p0fF_tm_m3m4_noshield M=1 l=12.340u 
-+ w=5.000u c=0.13104724p
-CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT mim_2p0fF_tm_m3m4_noshield M=1 l=5.000u 
-+ w=100.000u c=1.045043p
-CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT mim_2p0fF_tm_m3m4_noshield M=1 l=5.000u 
-+ w=12.340u c=0.13104724p
-CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT mim_2p0fF_tm_m3m4_noshield M=1 l=5.000u 
-+ w=5.000u c=0.054516p
-CI1_default I1_default_TOP I1_default_BOT mim_2p0fF_tm_m3m4_noshield M=1 l=5u w=5u 
-+ c=0.054516p
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_2p0fF_tm_m4m5_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_2p0fF_tm_m4m5_noshield.cdl
deleted file mode 100644
index 0dc8b9b..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_2p0fF_tm_m4m5_noshield.cdl
+++ /dev/null
@@ -1,60 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: mim_2p0fF_tm_m4m5_noshield
-* View Name:     schematic
-* Netlisted on:  Nov 24 11:32:36 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    mim_2p0fF_tm_m4m5_noshield
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT mim_2p0fF_tm_m4m5_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
-+ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
-+ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
-+ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
-+ I1_default_TOP
-*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
-*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
-*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
-*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
-*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
-CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT mim_2p0fF_tm_m4m5_noshield M=1 l=100.000u 
-+ w=100.000u c=19.99532p
-CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT mim_2p0fF_tm_m4m5_noshield M=1 l=100.000u 
-+ w=12.340u c=2.50920124p
-CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT mim_2p0fF_tm_m4m5_noshield M=1 l=100.000u 
-+ w=5.000u c=1.045043p
-CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT mim_2p0fF_tm_m4m5_noshield M=1 l=12.340u 
-+ w=100.000u c=2.50920124p
-CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT mim_2p0fF_tm_m4m5_noshield M=1 l=12.340u 
-+ w=12.340u c=0.31479093p
-CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT mim_2p0fF_tm_m4m5_noshield M=1 l=12.340u 
-+ w=5.000u c=0.13104724p
-CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT mim_2p0fF_tm_m4m5_noshield M=1 l=5.000u 
-+ w=100.000u c=1.045043p
-CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT mim_2p0fF_tm_m4m5_noshield M=1 l=5.000u 
-+ w=12.340u c=0.13104724p
-CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT mim_2p0fF_tm_m4m5_noshield M=1 l=5.000u 
-+ w=5.000u c=0.054516p
-CI1_default I1_default_TOP I1_default_BOT mim_2p0fF_tm_m4m5_noshield M=1 l=5u w=5u 
-+ c=0.054516p
-.ENDS
-
diff --git a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_2p0fF_tm_m5m6_noshield.cdl b/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_2p0fF_tm_m5m6_noshield.cdl
deleted file mode 100644
index 898b421..0000000
--- a/ULL/klayout/lvs/testing/testcases/unit/mimcap_devices/netlist/mim_2p0fF_tm_m5m6_noshield.cdl
+++ /dev/null
@@ -1,60 +0,0 @@
-************************************************************************
-* auCdl Netlist:
-* 
-* Library Name:  TCG_Library
-* Top Cell Name: mim_2p0fF_tm_m5m6_noshield
-* View Name:     schematic
-* Netlisted on:  Nov 24 11:32:36 2021
-************************************************************************
-
-*.BIPOLAR
-*.RESI = 2000 
-*.RESVAL
-*.CAPVAL
-*.DIOPERI
-*.DIOAREA
-*.EQUATION
-*.SCALE METER
-*.MEGA
-.PARAM
-
-
-
-************************************************************************
-* Library Name: TCG_Library
-* Cell Name:    mim_2p0fF_tm_m5m6_noshield
-* View Name:    schematic
-************************************************************************
-
-.SUBCKT mim_2p0fF_tm_m5m6_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP 
-+ I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT 
-+ I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP 
-+ I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT 
-+ I1_default_TOP
-*.PININFO I1_0_0_R0_BOT:I I1_0_0_R0_TOP:I I1_0_1_R0_BOT:I I1_0_1_R0_TOP:I 
-*.PININFO I1_0_2_R0_BOT:I I1_0_2_R0_TOP:I I1_1_0_R0_BOT:I I1_1_0_R0_TOP:I 
-*.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I 
-*.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I 
-*.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I
-CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT mim_2p0fF_tm_m5m6_noshield M=1 l=100.000u 
-+ w=100.000u c=19.99532p
-CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT mim_2p0fF_tm_m5m6_noshield M=1 l=100.000u 
-+ w=12.340u c=2.50920124p
-CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT mim_2p0fF_tm_m5m6_noshield M=1 l=100.000u 
-+ w=5.000u c=1.045043p
-CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT mim_2p0fF_tm_m5m6_noshield M=1 l=12.340u 
-+ w=100.000u c=2.50920124p
-CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT mim_2p0fF_tm_m5m6_noshield M=1 l=12.340u 
-+ w=12.340u c=0.31479093p
-CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT mim_2p0fF_tm_m5m6_noshield M=1 l=12.340u 
-+ w=5.000u c=0.13104724p
-CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT mim_2p0fF_tm_m5m6_noshield M=1 l=5.000u 
-+ w=100.000u c=1.045043p
-CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT mim_2p0fF_tm_m5m6_noshield M=1 l=5.000u 
-+ w=12.340u c=0.13104724p
-CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT mim_2p0fF_tm_m5m6_noshield M=1 l=5.000u 
-+ w=5.000u c=0.054516p
-CI1_default I1_default_TOP I1_default_BOT mim_2p0fF_tm_m5m6_noshield M=1 l=5u w=5u 
-+ c=0.054516p
-.ENDS
-