set current_folder [file dirname [file normalize [info script]]]
# Technology lib
set ::env(LIB_SYNTH) "$current_folder/lib/scs8ls_tt_1.80v_25C.lib"
set ::env(LIB_MAX) "$current_folder/lib/scs8ls_ff_1.76v_-40C.lib"
set ::env(LIB_MIN) "$current_folder/lib/scs8ls_ss_1.60v_100C.lib"
set ::env(LIB_TYPICAL) $::env(LIB_SYNTH)

# welltap and endcap cells
set ::env(FP_WELLTAP_CELL) "scs8ls_tap_1"
set ::env(FP_ENDCAP_CELL) "scs8ls_decap_4"

# defaults (can be overridden by designs):
set ::env(SYNTH_DRIVING_CELL) "scs8ls_inv_8"
set ::env(SYNTH_DRIVING_CELL_PIN) "Y"
set ::env(SYNTH_CAP_LOAD) "20.94"; # femtofarad _inv_8 pin A cap
set ::env(SYNTH_MIN_BUF_PORT) "scs8ls_buf_1 A X"
set ::env(SYNTH_TIEHI_PORT) "scs8ls_conb_1 HI"
set ::env(SYNTH_TIELO_PORT) "scs8ls_conb_1 LO"

# cts defaults
set ::env(CTS_ROOT_BUFFER) scs8ls_clkbuf_16

# Placement defaults
set ::env(PL_LIB) $::env(LIB_TYPICAL)

# Fillcell insertion
set ::env(FILL_CELL) "scs8ls_fill"

set ::env(CELL_PAD) 0.96

set ::env(CELL_PAD_EXECLUDE) "$::env(PDK_VARIANT)_tap* $::env(PDK_VARIANT)_decap* $::env(PDK_VARIANT)_fill*"