set ::env(DESIGN_NAME) "spm"

set ::env(VERILOG_FILES) [glob $::env(OPENLANE_ROOT)/designs/spm/src/*.v]

set ::env(CLOCK_PERIOD) "10.000"
set ::env(CLOCK_PORT) "clk"

set ::env(RUN_MAGIC) 1
set ::env(RUN_ROUTING_DETAILED) 1

set ::env(CLOCK_NET) "clk"
set ::env(CLOCK_NET) $::env(CLOCK_PORT)