added xh018_xdpram_16384x32_m32p verilog into the rtl directory
32 files changed
tree: b0c86ff444782817a4b7785dffa1c38eb220045c
  1. .ef-config/
  2. def/
  3. doc/
  4. elec/
  5. lef/
  6. mag/
  7. netgen/
  8. ngspice/
  9. openlane/
  10. pkg/
  11. qflow/
  12. spi/
  13. testbench/
  14. verilog/
  15. xspice/
  16. .gitignore
  17. lvlshift.json
  18. project.json
  19. README.md
README.md

This repo contains a derivative of striVe with SRAM from OpenRAM