Added DRC error report from SKW for drop5
diff --git a/gds/drop5/drcError.db_0413 b/gds/drop5/drcError.db_0413
new file mode 100644
index 0000000..e5d757f
--- /dev/null
+++ b/gds/drop5/drcError.db_0413
@@ -0,0 +1,6393 @@
+striVe 1000
+r_0_X.1b
+0 0 2 Apr 13 11:33:48 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid nwell vertex
+r_1_X.1b
+0 0 2 Apr 13 11:33:48 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid diff vertex
+r_2_X.1b
+0 0 2 Apr 13 11:33:48 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid dnwell vertex
+r_3_X.1b
+0 0 2 Apr 13 11:33:48 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid tap vertex
+r_4_X.1b
+0 0 2 Apr 13 11:33:48 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid lvtn vertex
+r_5_X.1b
+0 0 2 Apr 13 11:33:48 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid hvtp vertex
+r_6_X.1b
+0 0 2 Apr 13 11:33:48 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid hvi vertex
+r_7_X.1b
+0 0 2 Apr 13 11:33:48 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid tunm vertex
+r_8_X.1b
+0 0 2 Apr 13 11:33:48 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid poly vertex
+r_9_X.1b
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+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid npc vertex
+r_10_X.1b
+0 0 2 Apr 13 11:33:48 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid nsdm vertex
+r_11_X.1b
+0 0 2 Apr 13 11:33:49 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid psdm vertex
+r_12_X.1b
+0 0 2 Apr 13 11:33:49 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid licon1 vertex
+r_13_X.1b
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+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid li1 vertex
+r_14_X.1b
+0 0 2 Apr 13 11:33:49 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid mcon vertex
+r_15_X.1b
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+Rule File Pathname: ./xControlFile
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+r_16_X.1b
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+Rule File Pathname: ./xControlFile
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+r_17_X.1b
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+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid met2 vertex
+r_18_X.1b
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+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid vhvi vertex
+r_19_X.1b
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+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid via2 vertex
+r_20_X.1b
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+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid met3 vertex
+r_21_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid via3 vertex
+r_22_X.1b
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+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid met4 vertex
+r_23_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
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+r_24_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid met5 vertex
+r_25_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid nsm vertex
+r_26_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid pad vertex
+r_27_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid ldntm vertex
+r_28_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid hvntm vertex
+r_29_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid pnp vertex
+r_30_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid capacitor vertex
+r_31_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid ncm vertex
+r_32_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid inductor vertex
+r_33_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid rpm vertex
+r_34_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid hvtr vertex
+r_35_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid metop1 vertex
+r_36_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid metop2 vertex
+r_37_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid metop3 vertex
+r_38_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid metop4 vertex
+r_39_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid metop5 vertex
+r_40_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid metop6 vertex
+r_41_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid metop7 vertex
+r_42_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid metop8 vertex
+r_43_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid NTMdrop vertex
+r_44_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid LVTNMdrop vertex
+r_45_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid HVTPMdrop vertex
+r_46_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid LI1Mdrop vertex
+r_47_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid LICM1drop vertex
+r_48_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid PSDMdrop vertex
+r_49_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid NSDMdrop vertex
+r_50_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid FOMdrop vertex
+r_51_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid NTMadd vertex
+r_52_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid LVTNMadd vertex
+r_53_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid HVTPMadd vertex
+r_54_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid LI1Madd vertex
+r_55_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid LICM1add vertex
+r_56_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid PSDMadd vertex
+r_57_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid NSDMadd vertex
+r_58_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid FOMadd vertex
+r_59_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid PMM2mk vertex
+r_60_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid CU1Mmk vertex
+r_61_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid RPMmk vertex
+r_62_X.1b
+0 0 2 Apr 13 11:33:50 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid PBOmk vertex
+r_63_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid PDMmk vertex
+r_64_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid NSMmk vertex
+r_65_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid MM5mk vertex
+r_66_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid VIM4mk vertex
+r_67_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid MM4mk vertex
+r_68_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid VIM3mk vertex
+r_69_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid MM3mk vertex
+r_70_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid VIM2mk vertex
+r_71_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid CTM1mk vertex
+r_72_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid LI1Mmk vertex
+r_73_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid LICM1mk vertex
+r_74_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid PSDMmk vertex
+r_75_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid NSDMmk vertex
+r_76_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid LDNTMmk vertex
+r_77_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid NPCMmk vertex
+r_78_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid HVNTMmk vertex
+r_79_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid NTMmk vertex
+r_80_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid LVOMmk vertex
+r_81_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid ONOMmk vertex
+r_82_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid TUNMmk vertex
+r_83_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid HVTRMmk vertex
+r_84_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid HVTPMmk vertex
+r_85_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid LVTNMmk vertex
+r_86_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid NWMmk vertex
+r_87_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid DNMmk vertex
+r_88_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid FOMmk vertex
+r_89_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid cfom vertex
+r_90_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid clvtnm vertex
+r_91_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid chvtpm vertex
+r_92_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid conom vertex
+r_93_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid clvom vertex
+r_94_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid cntm vertex
+r_95_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid chvntm vertex
+r_96_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid cnpc vertex
+r_97_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid cnsdm vertex
+r_98_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid cpsdm vertex
+r_99_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid cli1m vertex
+r_100_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid cviam3 vertex
+r_101_X.1b
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1b: off 0.005 grid cviam4 vertex
+r_102_X.1a
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1a: off 0.001 grid P1Mmk vertex
+r_103_X.1a
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1a: off 0.001 grid P1Madd vertex
+r_104_X.1a
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1a: off 0.001 grid P1Mdrop vertex
+r_105_X.1a
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1a: off 0.001 grid VIMmk vertex
+r_106_X.1a
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1a: off 0.001 grid MM1mk vertex
+r_107_X.1a
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1a: off 0.001 grid MM2mk vertex
+r_108_X.1a
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1a: off 0.001 grid pmm vertex
+r_109_X.1a
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1a: off 0.001 grid rdl vertex
+r_110_X.1a
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1a: off 0.001 grid pmm2 vertex
+r_111_X.1a
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1a: off 0.001 grid ubm vertex
+r_112_X.1a
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1a: off 0.001 grid bump vertex
+r_113_X.1a
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1: off 0.001 grid capm vertex
+r_114_X.1a
+0 0 2 Apr 13 11:33:51 2020
+Rule File Pathname: ./xControlFile
+X.1: off 0.001 grid cap2m vertex
+r_113_X.2
+0 0 2 Apr 13 11:33:52 2020
+Rule File Pathname: ./xControlFile
+X.2: non-manhattan diffNOtSealUHVI edge
+r_114_X.2
+0 0 2 Apr 13 11:33:52 2020
+Rule File Pathname: ./xControlFile
+X.2: non-manhattan tapNotSealUHVI edge
+r_115_X.2
+0 0 2 Apr 13 11:33:58 2020
+Rule File Pathname: ./xControlFile
+X.2: non-manhattan poly_noESD_noAnch edge
+r_116_X.2
+8 8 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.2: non-manhattan li1Peri_noSEAL_noAnch edge
+e 1 1
+CN s8iom0_gpiov2_pad c 0 1 -1 0 203965 795000
+3365 186880 3395 186910
+e 2 1
+CN s8iom0_gpiov2_pad c 0 1 -1 0 203965 795000
+3365 187870 3390 187845
+e 3 1
+CN s8iom0_gpiov2_pad c 0 1 -1 0 203965 795000
+3365 193470 3390 193495
+e 4 1
+CN s8iom0_gpiov2_pad c 0 1 -1 0 203965 795000
+3365 194460 3395 194430
+e 5 1
+CN s8iom0_gpiov2_pad c 0 1 -1 0 203965 795000
+8725 186910 8760 186875
+e 6 1
+CN s8iom0_gpiov2_pad c 0 1 -1 0 203965 795000
+8725 194430 8760 194465
+e 7 1
+CN s8iom0_gpiov2_pad c 0 1 -1 0 203965 795000
+8730 187845 8760 187875
+e 8 1
+CN s8iom0_gpiov2_pad c 0 1 -1 0 203965 795000
+8730 193495 8760 193465
+r_117_X.2
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.2: non-manhattan licon_nonSEAL edge
+r_118_X.2
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.2: non-manhattan mcon_nonSEAL edge
+r_119_X.2
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.2: non-manhattan via_nonSEAL edge
+r_120_X.2
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.2: non-manhattan via2_nonSEAL edge
+r_121_X.2
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.2: non-manhattan via3_nonSEAL edge
+r_122_X.2
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.2: non-manhattan via4_nonSEAL edge
+r_123_X.2a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.2a: difftap enclosed in areaid.analog must be rectangular
+r_124_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal nwell edge
+r_125_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal diff edge
+r_126_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal dnwell edge
+r_127_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal lvtn edge
+r_128_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal hvtp edge
+r_129_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal hvi edge
+r_130_X.3a
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+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal tunm edge
+r_131_X.3a
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+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal npc edge
+r_132_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal nsdm edge
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+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal psdm edge
+r_134_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal met1 edge
+r_135_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal met2 edge
+r_136_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal vhvi edge
+r_137_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal met3 edge
+r_138_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal met4 edge
+r_139_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal met5 edge
+r_140_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal nsm edge
+r_141_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal pad edge
+r_142_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal ldntm edge
+r_143_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal hvntm edge
+r_144_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal pnp edge
+r_145_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal capacitor edge
+r_146_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal ncm edge
+r_147_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal inductor edge
+r_148_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal rpm edge
+r_149_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal hvtr edge
+r_150_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal metop1 edge
+r_151_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal metop2 edge
+r_152_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal metop3 edge
+r_153_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal metop4 edge
+r_154_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal metop5 edge
+r_155_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal metop6 edge
+r_156_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal metop7 edge
+r_157_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal metop8 edge
+r_158_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal NTMdrop edge
+r_159_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal LVTNMdrop edge
+r_160_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal HVTPMdrop edge
+r_161_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal LI1Mdrop edge
+r_162_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal LICM1drop edge
+r_163_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal PSDMdrop edge
+r_164_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal NSDMdrop edge
+r_165_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal P1Mdrop edge
+r_166_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal FOMdrop edge
+r_167_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal NTMadd edge
+r_168_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal LVTNMadd edge
+r_169_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal HVTPMadd edge
+r_170_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal LI1Madd edge
+r_171_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal LICM1add edge
+r_172_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal PSDMadd edge
+r_173_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal NSDMadd edge
+r_174_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal P1Madd edge
+r_175_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal FOMadd edge
+r_176_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal cfom edge
+r_177_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal clvtnm edge
+r_178_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal chvtpm edge
+r_179_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal conom edge
+r_180_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal clvom edge
+r_181_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal cntm edge
+r_182_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal chvntm edge
+r_183_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal cnpc edge
+r_184_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal cnsdm edge
+r_185_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal cpsdm edge
+r_186_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal cli1m edge
+r_187_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal cviam3 edge
+r_188_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal cviam4 edge
+r_189_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal PMM2mk edge
+r_190_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal CU1Mmk edge
+r_191_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal RPMmk edge
+r_192_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal PBOmk edge
+r_193_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal PDMmk edge
+r_194_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal NSMmk edge
+r_195_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal MM5mk edge
+r_196_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal VIM4mk edge
+r_197_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal MM4mk edge
+r_198_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal VIM3mk edge
+r_199_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal MM3mk edge
+r_200_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal VIM2mk edge
+r_201_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal MM2mk edge
+r_202_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal VIMmk edge
+r_203_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal MM1mk edge
+r_204_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal CTM1mk edge
+r_205_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal LI1Mmk edge
+r_206_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal LICM1mk edge
+r_207_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal PSDMmk edge
+r_208_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal NSDMmk edge
+r_209_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal LDNTMmk edge
+r_210_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal NPCMmk edge
+r_211_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal HVNTMmk edge
+r_212_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal NTMmk edge
+r_213_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal P1Mmk edge
+r_214_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal LVOMmk edge
+r_215_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal ONOMmk edge
+r_216_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal TUNMmk edge
+r_217_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal HVTRMmk edge
+r_218_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal HVTPMmk edge
+r_219_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal LVTNMmk edge
+r_220_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal NWMmk edge
+r_221_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal DNMmk edge
+r_222_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal FOMmk edge
+r_223_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal tap_SEAL edge
+r_224_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal tap_ENID edge
+r_225_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal poly_ESD edge
+r_226_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal "li1" in core edge
+r_227_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal li1_SEAL edge
+r_228_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal licon_SEAL edge
+r_229_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal mcon_SEAL edge
+r_230_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal via_SEAL edge
+r_231_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal via2_SEAL edge
+r_232_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal via3_SEAL edge
+r_233_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal capm edge
+r_234_X.3a
+0 0 2 Apr 13 11:33:59 2020
+Rule File Pathname: ./xControlFile
+X.3a: non-octagonal cap2m edge
+r_233_X.5
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.5: met5Pin must be enclosed by met5
+r_234_X.5
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.5: met4Pin must be enclosed by met4
+r_235_X.5
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.5: met3Pin must be enclosed by met3
+r_236_X.5
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.5: met2Pin must be enclosed by met2
+r_237_X.5
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.5: met1Pin must be enclosed by met1
+r_238_X.5
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.5: li1Pin must be enclosed by li1
+r_239_X.5
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.5: polyPin must be enclosed by poly
+r_240_X.5
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.5: diffPin must be enclosed by diff
+r_241_X.9
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.9: NTMdrop must be enclosed by COREID
+r_242_X.9
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.9: LVTNMdrop must be enclosed by COREID
+r_243_X.9
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.9: HVTPMdrop must be enclosed by COREID
+r_244_X.9
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.9: LI1Mdrop must be enclosed by COREID
+r_245_X.9
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.9: LICM1drop must be enclosed by COREID
+r_246_X.9
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.9: PSDMdrop must be enclosed by COREID
+r_247_X.9
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.9: NSDMdrop must be enclosed by COREID
+r_248_X.9
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.9: P1Mdrop must be enclosed by COREID
+r_249_X.9
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.9: NTMadd must be enclosed by COREID
+r_250_X.9
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.9: LVTNMadd must be enclosed by COREID
+r_251_X.9
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.9: HVTPMadd must be enclosed by COREID
+r_252_X.9
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.9: LI1Madd must be enclosed by COREID
+r_253_X.9
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.9: LICM1add must be enclosed by COREID
+r_254_X.9
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.9: PSDMadd must be enclosed by COREID
+r_255_X.9
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.9: NSDMadd must be enclosed by COREID
+r_256_X.9
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.9: P1Madd must be enclosed by COREID
+r_257_X.9
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.9: FOMadd must be enclosed by COREID
+r_258_X.9
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.9: FOM outside advSeal_6um must be enclosed by COREID
+r_259_X.10
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.10: diffres must not overlap licon1
+r_260_X.10
+0 0 2 Apr 13 11:34:00 2020
+Rule File Pathname: ./xControlFile
+X.10: polyres must not overlap licon1
+r_261_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.635 min. spacing of moduleCutAREA & q0nwellnotBuildSpace
+r_262_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.635 min. enclosure of q0nwellnotBuildSpace by moduleCutAREA
+r_263_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.135 min. spacing of moduleCutAREA & q0diffnotBuildSpace
+r_264_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.135 min. enclosure of q0diffnotBuildSpace by moduleCutAREA
+r_265_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 3.15 min. spacing of moduleCutAREA & q0dnwellnotBuildSpace
+r_266_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 3.15 min. enclosure of q0dnwellnotBuildSpace by moduleCutAREA
+r_267_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.135 min. spacing of moduleCutAREA & q0tapnotBuildSpace
+r_268_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.135 min. enclosure of q0tapnotBuildSpace by moduleCutAREA
+r_269_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.19 min. spacing of moduleCutAREA & q0lvtnnotBuildSpace
+r_270_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.19 min. enclosure of q0lvtnnotBuildSpace by moduleCutAREA
+r_271_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.19 min. spacing of moduleCutAREA & q0hvtpnotBuildSpace
+r_272_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.19 min. enclosure of q0hvtpnotBuildSpace by moduleCutAREA
+r_273_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.35 min. spacing of moduleCutAREA & q0hvinotBuildSpace
+r_274_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.35 min. enclosure of q0hvinotBuildSpace by moduleCutAREA
+r_275_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.25 min. spacing of moduleCutAREA & q0tunmnotBuildSpace
+r_276_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.25 min. enclosure of q0tunmnotBuildSpace by moduleCutAREA
+r_277_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.105 min. spacing of moduleCutAREA & q0polynotBuildSpace
+r_278_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.105 min. enclosure of q0polynotBuildSpace by moduleCutAREA
+r_279_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.135 min. spacing of moduleCutAREA & q0npcnotBuildSpace
+r_280_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.135 min. enclosure of q0npcnotBuildSpace by moduleCutAREA
+r_281_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.19 min. spacing of moduleCutAREA & q0nsdmnotBuildSpace
+r_282_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.19 min. enclosure of q0nsdmnotBuildSpace by moduleCutAREA
+r_283_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.19 min. spacing of moduleCutAREA & q0psdmnotBuildSpace
+r_284_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.19 min. enclosure of q0psdmnotBuildSpace by moduleCutAREA
+r_285_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.085 min. spacing of moduleCutAREA & q0licon1notBuildSpace
+r_286_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.085 min. enclosure of q0licon1notBuildSpace by moduleCutAREA
+r_287_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.085 min. spacing of moduleCutAREA & q0li1notBuildSpace
+r_288_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.085 min. enclosure of q0li1notBuildSpace by moduleCutAREA
+r_289_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.095 min. spacing of moduleCutAREA & q0mconnotBuildSpace
+r_290_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.095 min. enclosure of q0mconnotBuildSpace by moduleCutAREA
+r_291_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.07 min. spacing of moduleCutAREA & q0met1notBuildSpace
+r_292_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.07 min. enclosure of q0met1notBuildSpace by moduleCutAREA
+r_293_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.085 min. spacing of moduleCutAREA & q0vianotBuildSpace
+r_294_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.085 min. enclosure of q0vianotBuildSpace by moduleCutAREA
+r_295_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.07 min. spacing of moduleCutAREA & q0met2notBuildSpace
+r_296_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.07 min. enclosure of q0met2notBuildSpace by moduleCutAREA
+r_297_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.1 min. spacing of moduleCutAREA & q0via2notBuildSpace
+r_298_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.1 min. enclosure of q0via2notBuildSpace by moduleCutAREA
+r_299_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.15 min. spacing of moduleCutAREA & q0met3notBuildSpace
+r_300_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.15 min. enclosure of q0met3notBuildSpace by moduleCutAREA
+r_301_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.1 min. spacing of moduleCutAREA & q0via3notBuildSpace
+r_302_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.1 min. enclosure of q0via3notBuildSpace by moduleCutAREA
+r_303_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.15 min. spacing of moduleCutAREA & q0met4notBuildSpace
+r_304_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.15 min. enclosure of q0met4notBuildSpace by moduleCutAREA
+r_305_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.4 min. spacing of moduleCutAREA & q0via4notBuildSpace
+r_306_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.4 min. enclosure of q0via4notBuildSpace by moduleCutAREA
+r_307_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.8 min. spacing of moduleCutAREA & q0met5notBuildSpace
+r_308_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.8 min. enclosure of q0met5notBuildSpace by moduleCutAREA
+r_309_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 2 min. spacing of moduleCutAREA & q0nsmnotBuildSpace
+r_310_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 2 min. enclosure of q0nsmnotBuildSpace by moduleCutAREA
+r_311_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.635 min. spacing of moduleCutAREA & q0padnotBuildSpace
+r_312_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.635 min. enclosure of q0padnotBuildSpace by moduleCutAREA
+r_313_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.35 min. spacing of moduleCutAREA & q0ldntmnotBuildSpace
+r_314_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.35 min. enclosure of q0ldntmnotBuildSpace by moduleCutAREA
+r_315_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.19 min. spacing of moduleCutAREA & q0hvntmnotBuildSpace
+r_316_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.19 min. enclosure of q0hvntmnotBuildSpace by moduleCutAREA
+r_317_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.19 min. spacing of moduleCutAREA & q0ncmnotBuildSpace
+r_318_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.19 min. enclosure of q0ncmnotBuildSpace by moduleCutAREA
+r_319_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 5 min. spacing of moduleCutAREA & q0rdlnotBuildSpace
+r_320_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 5 min. enclosure of q0rdlnotBuildSpace by moduleCutAREA
+r_321_X.12a
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12a: 0.19 min. spacing of moduleCutAREA & q0hvtrnotBuildSpace
+r_322_X.12b
+0 0 2 Apr 13 11:34:42 2020
+Rule File Pathname: ./xControlFile
+X.12b: 0.19 min. enclosure of q0hvtrnotBuildSpace by moduleCutAREA
+r_323_X.12d
+0 0 2 Apr 13 11:34:44 2020
+Rule File Pathname: ./xControlFile
+X.12d: 0.14 min. spacing of moduleCutAREA & q1met1notBuildSpace
+r_324_X.12e
+0 0 2 Apr 13 11:34:44 2020
+Rule File Pathname: ./xControlFile
+X.12e: 0.14 min. enclosure of q1met1notBuildSpace by moduleCutAREA
+r_325_X.12d
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.12d: 0.14 min. spacing of moduleCutAREA & q1met2notBuildSpace
+r_326_X.12e
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.12e: 0.14 min. enclosure of q1met2notBuildSpace by moduleCutAREA
+r_327_X.12d
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.12d: 0.2 min. spacing of moduleCutAREA & q1met3notBuildSpace
+r_328_X.12e
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.12e: 0.2 min. enclosure of q1met3notBuildSpace by moduleCutAREA
+r_329_X.12d
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.12d: 0.2 min. spacing of moduleCutAREA & q1met4notBuildSpace
+r_330_X.12e
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.12e: 0.2 min. enclosure of q1met4notBuildSpace by moduleCutAREA
+r_331_X.12e
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.12e: 0.42 min. spacing of moduleCutAREA & capm
+r_326_X.18b
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.18b: 0.42 min. enclosure of capm by moduleCutAREA
+r_327_X.18a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.18a: 0.42 min. spacing of moduleCutAREA & cap2m
+r_328_X.18b
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.18b: 0.42 min. enclosure of cap2m by moduleCutAREA
+r_331_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer cfom allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_332_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer clvtnm allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_333_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer chvtpm allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_334_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer conom allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_335_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer clvom allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_336_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer cntm allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_337_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer chvntm allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_338_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer cnpc allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_339_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer cnsdm allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_340_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer cpsdm allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_341_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer cli1m allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_342_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer cviam3 allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_343_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer cviam4 allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_344_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer PMM2mk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_345_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer CU1Mmk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_346_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer RPMmk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_347_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer PBOmk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_348_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer PDMmk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_349_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer NSMmk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_350_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer MM5mk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_351_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer VIM4mk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_352_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer MM4mk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_353_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer VIM3mk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_354_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer MM3mk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_355_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer VIM2mk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_356_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer MM2mk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_357_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer VIMmk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_358_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer MM1mk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_359_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer CTM1mk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_360_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer LI1Mmk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_361_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer LICM1mk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_362_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer PSDMmk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_363_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer NSDMmk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_364_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer LDNTMmk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_365_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer NPCMmk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_366_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer HVNTMmk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_367_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer NTMmk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_368_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer P1Mmk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_369_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer LVOMmk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_370_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer ONOMmk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_371_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer TUNMmk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_372_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer HVTRMmk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_373_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer HVTPMmk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_374_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer LVTNMmk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_375_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer NWMmk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_376_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer DNMmk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_377_X.15a
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.15a: X.15a: layer FOMmk allowed inside areaid:mt or inside areaid.sl or inside areaid.ft
+r_378_X.16
+0 0 2 Apr 13 11:34:45 2020
+Rule File Pathname: ./xControlFile
+X.16: extentDie must not overlap moduleCutAREA
+r_379_X.19
+0 0 2 Apr 13 11:34:46 2020
+Rule File Pathname: ./xControlFile
+X.19: SEAL ring is not at origin (0,0)
+r_380_X.21
+0 0 2 Apr 13 11:34:46 2020
+Rule File Pathname: ./xControlFile
+X.21: prune must overlap areaidMTorSC
+r_381_X.23b
+0 0 2 Apr 13 11:34:46 2020
+Rule File Pathname: ./xControlFile
+X.23b: diff must not straddle SEALID
+r_382_X.23c
+0 0 2 Apr 13 11:34:46 2020
+Rule File Pathname: ./xControlFile
+X.23c: tap must not overlap SEALID
+r_383_X.23c
+0 0 2 Apr 13 11:34:46 2020
+Rule File Pathname: ./xControlFile
+X.23c: poly must not overlap SEALID
+r_384_X.23c
+0 0 2 Apr 13 11:34:46 2020
+Rule File Pathname: ./xControlFile
+X.23c: li1 must not overlap SEALID
+r_385_X.23c
+0 0 2 Apr 13 11:34:46 2020
+Rule File Pathname: ./xControlFile
+X.23c: met1 must not overlap SEALID
+r_386_X.23c
+0 0 2 Apr 13 11:34:46 2020
+Rule File Pathname: ./xControlFile
+X.23c: met2 must not overlap SEALID
+r_387_X.23c
+0 0 2 Apr 13 11:34:46 2020
+Rule File Pathname: ./xControlFile
+X.23c: met3 must not overlap SEALID
+r_388_X.23c
+0 0 2 Apr 13 11:34:46 2020
+Rule File Pathname: ./xControlFile
+X.23c: met4 must not overlap SEALID
+r_389_X.23c
+0 0 2 Apr 13 11:34:46 2020
+Rule File Pathname: ./xControlFile
+X.23c: met5 must not overlap SEALID
+r_390_X.26
+0 0 2 Apr 13 11:34:46 2020
+Rule File Pathname: ./xControlFile
+X.26: SEALID_6um must overlap diff
+r_391_X.25
+0 0 2 Apr 13 11:34:46 2020
+Rule File Pathname: ./xControlFile
+X.25: pnp layer must be within specified fixed layout cells s8rf_pnp/s8rf_pnp5x
+r_392_X.28
+0 0 2 Apr 13 11:34:47 2020
+Rule File Pathname: ./xControlFile
+X.28: 6 min. width of SEALID
+r_393_dnwell.2
+0 0 2 Apr 13 11:34:47 2020
+Rule File Pathname: ./xControlFile
+dnwell.2: 3 min. width of dnwell
+r_394_dnwell.3
+0 0 2 Apr 13 11:34:47 2020
+Rule File Pathname: ./xControlFile
+dnwell.3: 6.3 min. spacing/notch of dnwellNotPhotoNotUHVI
+r_395_dnwell.4
+0 0 2 Apr 13 11:34:47 2020
+Rule File Pathname: ./xControlFile
+dnwell.4: dnwell must not overlap pnp
+r_396_dnwell.5
+0 0 2 Apr 13 11:34:47 2020
+Rule File Pathname: ./xControlFile
+dnwell.5: PDIFF not Exempt cells must not straddle dnwell
+r_397_dnwell.7
+0 0 2 Apr 13 11:34:47 2020
+Rule File Pathname: ./xControlFile
+dnwell.7: dnwell cannot straddle localSub
+r_398_nwell.1
+0 0 2 Apr 13 11:34:47 2020
+Rule File Pathname: ./xControlFile
+nwell.1: 0.84 min. width of nwell
+r_399_nwell.2a
+0 0 2 Apr 13 11:34:47 2020
+Rule File Pathname: ./xControlFile
+nwell.2a: 1.27 min. spacing/notch of nwell
+r_400_nwell.4
+0 0 2 Apr 13 11:34:47 2020
+Rule File Pathname: ./xControlFile
+nwell.4: nwell_nonUHVI must overlap metal contacted tap to nwell
+r_401_nwell.5
+0 0 2 Apr 13 11:34:47 2020
+Rule File Pathname: ./xControlFile
+nwell.5: 0.4 min. enclosure of dnwellNotTechCDLOWVTID by filledNwell
+r_402_nwell.5
+0 0 2 Apr 13 11:34:48 2020
+Rule File Pathname: ./xControlFile
+nwell.5: dnwellNotTechCDLOWVTID must be enclosed by filledNwell
+r_403_nwell.6
+0 0 2 Apr 13 11:34:48 2020
+Rule File Pathname: ./xControlFile
+nwell.6: 1.03 min enclosure of nwellHole by dnwell
+r_404_nwell.7
+0 0 2 Apr 13 11:34:48 2020
+Rule File Pathname: ./xControlFile
+nwell.7: 4.5 min spacing between nwell and dnwell on separate nets
+r_405_hvtp.1
+0 0 2 Apr 13 11:34:48 2020
+Rule File Pathname: ./xControlFile
+hvtp.1: 0.38 min. width of hvtp
+r_406_hvtp.2
+0 0 2 Apr 13 11:34:48 2020
+Rule File Pathname: ./xControlFile
+hvtp.2: 0.38 min. spacing/notch of hvtp
+r_407_hvtp.3
+0 0 2 Apr 13 11:34:48 2020
+Rule File Pathname: ./xControlFile
+hvtp.3: 0.18 min. enclosure of PFET_PERI by hvtp
+r_408_hvtp.4
+0 0 2 Apr 13 11:34:49 2020
+Rule File Pathname: ./xControlFile
+hvtp.4: 0.18 min. spacing of PFET_PERI & hvtp
+r_409_hvtp.5
+0 0 2 Apr 13 11:34:49 2020
+Rule File Pathname: ./xControlFile
+hvtp.5: 0.265 min. area of hvtp
+r_410_hvtp.6
+0 0 2 Apr 13 11:34:49 2020
+Rule File Pathname: ./xControlFile
+hvtp.6: 0.265 min. area of hvtpHoles
+r_411_hvtp.c1
+0 0 2 Apr 13 11:34:49 2020
+Rule File Pathname: ./xControlFile
+hvtp.c1: Min/Max enclosure of nwell by hvtp
+r_412_lvtn.1a
+0 0 2 Apr 13 11:34:49 2020
+Rule File Pathname: ./xControlFile
+lvtn.1a: 0.38 min. width of lvtn
+r_413_lvtn.2
+0 0 2 Apr 13 11:34:49 2020
+Rule File Pathname: ./xControlFile
+lvtn.2: 0.38 min. spacing/notch of lvtn
+r_414_lvtn.3a
+0 0 2 Apr 13 11:34:49 2020
+Rule File Pathname: ./xControlFile
+lvtn.3a: 0.18 min. spacing of Gate in Periphery outside UHVI layer & "lvtn" in periphery
+r_415_lvtn.3b
+0 0 2 Apr 13 11:34:49 2020
+Rule File Pathname: ./xControlFile
+lvtn.3b: 0.19 min spacing of lvtn(peri) to pfet along S/D direction
+r_416_lvtn.4b
+0 0 2 Apr 13 11:34:49 2020
+Rule File Pathname: ./xControlFile
+lvtn.4b: 0.18 min. enclosure of Gate in Periphery outside UHVI layer by "lvtn" in periphery
+r_417_lvtn.9
+0 0 2 Apr 13 11:34:49 2020
+Rule File Pathname: ./xControlFile
+lvtn.9: 0.38 min. spacing of lvtn & hvtp
+r_418_lvtn.9
+0 0 2 Apr 13 11:34:49 2020
+Rule File Pathname: ./xControlFile
+lvtn.9: lvtn must not overlap hvtp
+r_419_lvtn.10
+0 0 2 Apr 13 11:34:50 2020
+Rule File Pathname: ./xControlFile
+lvtn.10: 0.38 min enclosure of lvtn by (nwell not overlapping Varactor Channel)
+r_420_lvtn.12
+0 0 2 Apr 13 11:34:50 2020
+Rule File Pathname: ./xControlFile
+lvtn.12: 0.38 min. spacing of lvtn & coreNwell
+r_421_lvtn.13
+0 0 2 Apr 13 11:34:50 2020
+Rule File Pathname: ./xControlFile
+lvtn.13: 0.265 min. area of lvtn
+r_422_lvtn.14
+0 0 2 Apr 13 11:34:50 2020
+Rule File Pathname: ./xControlFile
+lvtn.14: 0.265 min. area of lvtnHoles
+r_423_hvtr.1
+0 0 2 Apr 13 11:34:50 2020
+Rule File Pathname: ./xControlFile
+hvtr.1: 0.38 min. width of hvtr
+r_424_hvtr.2
+0 0 2 Apr 13 11:34:50 2020
+Rule File Pathname: ./xControlFile
+hvtr.2: 0.38 min. spacing of hvtr & hvtp
+r_425_hvtr.2
+0 0 2 Apr 13 11:34:50 2020
+Rule File Pathname: ./xControlFile
+hvtr.2: hvtr must not overlap hvtp
+r_426_hvtr.3
+0 0 2 Apr 13 11:34:50 2020
+Rule File Pathname: ./xControlFile
+hvtr.3: 0.18 min. enclosure of PFET by hvtr
+r_427_difftap.1
+0 0 2 Apr 13 11:34:50 2020
+Rule File Pathname: ./xControlFile
+difftap.1: 0.15 min. width of diff across areaid:ce
+r_428_difftap.1
+0 0 2 Apr 13 11:34:50 2020
+Rule File Pathname: ./xControlFile
+difftap.1: 0.15 min. width of diff in PERI
+r_429_difftap.c1
+0 0 2 Apr 13 11:34:50 2020
+Rule File Pathname: ./xControlFile
+difftap.c1: 0.14 min. width of diff in COREID
+r_430_difftap.1
+0 0 2 Apr 13 11:34:50 2020
+Rule File Pathname: ./xControlFile
+difftap.1: 0.15 min. width of tap across areaid:ce
+r_431_difftap.1
+0 0 2 Apr 13 11:34:50 2020
+Rule File Pathname: ./xControlFile
+difftap.1: 0.15 min. width of tap in PERI
+r_432_difftap.c1
+0 0 2 Apr 13 11:34:50 2020
+Rule File Pathname: ./xControlFile
+difftap.c1: 0.14 min. width of tap in COREID
+r_433_difftap.2
+0 0 2 Apr 13 11:34:50 2020
+Rule File Pathname: ./xControlFile
+difftap.2: 0.42 min. width of GATE_PERI_noSC
+r_434_difftap.2b
+0 0 2 Apr 13 11:34:50 2020
+Rule File Pathname: ./xControlFile
+difftap.2b: 0.36 min. width of GATE_PERI_SC
+r_435_difftap.3
+0 0 2 Apr 13 11:34:50 2020
+Rule File Pathname: ./xControlFile
+difftap.3: 0.27 min. spacing/notch of diff or tap
+r_436_difftap.4
+0 0 2 Apr 13 11:34:51 2020
+Rule File Pathname: ./xControlFile
+difftap.4: 0.29 min. width of tap butting diff
+r_437_difftap.5
+0 0 2 Apr 13 11:34:51 2020
+Rule File Pathname: ./xControlFile
+difftap.5: 0.4 min. width of "tap" in periphery butting & between diff
+r_438_difftap.6
+0 0 2 Apr 13 11:34:51 2020
+Rule File Pathname: ./xControlFile
+difftap.6: diff and tap are not allowed to extend beyond their abutting edge
+r_439_difftap.7
+0 0 2 Apr 13 11:34:51 2020
+Rule File Pathname: ./xControlFile
+difftap.7: 0.13 spacing of diff/tap butting edge to non-coincident diff/tap edge
+r_440_difftap.8
+0 0 2 Apr 13 11:34:51 2020
+Rule File Pathname: ./xControlFile
+difftap.8: 0.18 min. enclosure of PDIFF_PERI_nonESDuhvi by nwell
+r_441_difftap.9
+0 0 2 Apr 13 11:34:52 2020
+Rule File Pathname: ./xControlFile
+difftap.9: 0.34 min. spacing of NDIFF_PERI_nonESDuhvi & nwell_noesd
+r_442_difftap.10
+0 0 2 Apr 13 11:34:52 2020
+Rule File Pathname: ./xControlFile
+difftap.10: 0.18 min. enclosure of NTAP_nonESD_nonuhvi by nwell
+r_443_difftap.11
+0 0 2 Apr 13 11:34:52 2020
+Rule File Pathname: ./xControlFile
+difftap.11: 0.13 min. spacing of PTAP_nonUHVI & nwell
+r_444_difftap.c1
+0 0 2 Apr 13 11:34:52 2020
+Rule File Pathname: ./xControlFile
+difftap.c1: 0.14 min. width of "gate" in core
+r_445_difftap.c5
+0 0 2 Apr 13 11:34:52 2020
+Rule File Pathname: ./xControlFile
+difftap.c5: 0.38 min. width of "tap" in core butting & between diff
+r_446_difftap.c8
+0 0 2 Apr 13 11:34:52 2020
+Rule File Pathname: ./xControlFile
+difftap.c8: 0.15 min. enclosure of "pdiff" in core by nwell
+r_447_difftap.c10
+0 0 2 Apr 13 11:34:53 2020
+Rule File Pathname: ./xControlFile
+difftap.c10: 0.15 min. enclosure of "ntap" in core by nwell
+r_448_difftap.c12
+0 0 2 Apr 13 11:34:53 2020
+Rule File Pathname: ./xControlFile
+difftap.c12: 0.18 min. enclosure of adj. sides of "pdiff" in core by nwell
+r_449_difftap.c13
+0 0 2 Apr 13 11:34:53 2020
+Rule File Pathname: ./xControlFile
+difftap.c13: 0.32 min. spacing of "ndiff" in core & nwell
+r_450_difftap.c14
+0 0 2 Apr 13 11:34:53 2020
+Rule File Pathname: ./xControlFile
+difftap.c14: 0.34 min. enclosure of adj. sides of "ndiff" in core by chipNotNwell
+r_451_tunm.1
+0 0 2 Apr 13 11:34:53 2020
+Rule File Pathname: ./xControlFile
+tunm.1: 0.41 min. width of tunm
+r_452_tunm.2
+0 0 2 Apr 13 11:34:53 2020
+Rule File Pathname: ./xControlFile
+tunm.2: 0.5 min. spacing/notch of tunm
+r_453_tunm.3
+0 0 2 Apr 13 11:34:53 2020
+Rule File Pathname: ./xControlFile
+tunm.3: 0.095 min. extension of tunm beyond gate
+r_454_tunm.4
+0 0 2 Apr 13 11:34:53 2020
+Rule File Pathname: ./xControlFile
+tunm.4: 0.095 min. spacing of GATE_outsidetunm & tunm
+r_455_tunm.5
+0 0 2 Apr 13 11:34:53 2020
+Rule File Pathname: ./xControlFile
+tunm.5: gate must not straddle tunm
+r_456_tunm.6a
+0 0 2 Apr 13 11:34:53 2020
+Rule File Pathname: ./xControlFile
+tunm.6a: tunm outside deep nwell is not allowed
+r_457_tunm.7
+0 0 2 Apr 13 11:34:53 2020
+Rule File Pathname: ./xControlFile
+tunm.7: 0.672 min. area of tunm
+r_458_tunm.8
+0 0 2 Apr 13 11:34:53 2020
+Rule File Pathname: ./xControlFile
+tunm.8: tunm must be enclosed by COREID
+r_459_nsd.1
+0 0 2 Apr 13 11:34:54 2020
+Rule File Pathname: ./xControlFile
+nsd.1: 0.38 min. width of nsdm across areaid:ce
+r_460_nsd.1
+0 0 2 Apr 13 11:34:54 2020
+Rule File Pathname: ./xControlFile
+nsd.1: 0.38 min. width of nsdm in PERI
+r_461_nsd.c1b
+0 0 2 Apr 13 11:34:54 2020
+Rule File Pathname: ./xControlFile
+nsd.c1b: 0.29 min. width of nsdm in COREID
+r_462_nsd.2
+0 0 2 Apr 13 11:34:54 2020
+Rule File Pathname: ./xControlFile
+nsd.2: 0.38 min. spacing/notch of "nsdm" in periphery
+r_463_nsd.2
+0 0 2 Apr 13 11:34:54 2020
+Rule File Pathname: ./xControlFile
+nsd.2: 0.38 min. spacing of nsdm across COREID boundary
+r_464_nsd.5a
+0 0 2 Apr 13 11:34:54 2020
+Rule File Pathname: ./xControlFile
+nsd.5a: 0.125 min. enclosure of n+ diff by nsdm
+r_465_nsd.5b
+0 0 2 Apr 13 11:34:54 2020
+Rule File Pathname: ./xControlFile
+nsd.5b: 0.125 min. enclosure of n+ tap in peri by nsdm
+r_466_nsd.7
+0 0 2 Apr 13 11:34:56 2020
+Rule File Pathname: ./xControlFile
+nsd.7: 0.13 min. spacing of nsdm & opposite implant diffTap
+r_467_nsd.8
+0 0 2 Apr 13 11:34:56 2020
+Rule File Pathname: ./xControlFile
+nsd.8: nsdm must not overlap pdiff/ptap (source of extendedDrain fet exempted)
+r_468_nsd.9
+0 0 2 Apr 13 11:34:56 2020
+Rule File Pathname: ./xControlFile
+nsd.9: ndiff/ntap (source of extendedDrain fet and gated_npn exempted) must be enclosed by nsdmZENERID
+r_469_nsd.10a
+0 0 2 Apr 13 11:34:56 2020
+Rule File Pathname: ./xControlFile
+nsd.10a: 0.265 min. area of nsdm
+r_470_nsd.11
+0 0 2 Apr 13 11:34:56 2020
+Rule File Pathname: ./xControlFile
+nsd.11: 0.265 min. area of nsdmHole
+r_471_nsd.c1a
+0 0 2 Apr 13 11:34:56 2020
+Rule File Pathname: ./xControlFile
+nsd.c1a: 0.38 min. width of nsdm (opposite parallel)
+r_472_nsd.c2a
+0 0 2 Apr 13 11:34:56 2020
+Rule File Pathname: ./xControlFile
+nsd.c2a: 0.38 min. spacing/notch of "nsdm" in core
+r_473_nsd.c2b
+0 0 2 Apr 13 11:34:56 2020
+Rule File Pathname: ./xControlFile
+nsd.c2b: 0.29 min. spacing/notch of "nsdm" in core
+r_474_nsd.c5a
+0 0 2 Apr 13 11:34:56 2020
+Rule File Pathname: ./xControlFile
+nsd.c5a: 0.13 min. enclosure of n+ tap in core by nsdm
+r_475_psd.1
+0 0 2 Apr 13 11:34:57 2020
+Rule File Pathname: ./xControlFile
+psd.1: 0.38 min. width of psdm across areaid:ce
+r_476_psd.1
+0 0 2 Apr 13 11:34:57 2020
+Rule File Pathname: ./xControlFile
+psd.1: 0.38 min. width of psdm in PERI
+r_477_psd.c1b
+0 0 2 Apr 13 11:34:57 2020
+Rule File Pathname: ./xControlFile
+psd.c1b: 0.29 min. width of psdm in COREID
+r_478_psd.2
+0 0 2 Apr 13 11:34:57 2020
+Rule File Pathname: ./xControlFile
+psd.2: 0.38 min. spacing/notch of "psdm" in periphery
+r_479_psd.2
+0 0 2 Apr 13 11:34:57 2020
+Rule File Pathname: ./xControlFile
+psd.2: 0.38 min. spacing of psdm across COREID boundary
+r_480_psd.5a
+0 0 2 Apr 13 11:34:57 2020
+Rule File Pathname: ./xControlFile
+psd.5a: 0.125 min. enclosure of p+ diff by psdm
+r_481_psd.5b
+0 0 2 Apr 13 11:34:58 2020
+Rule File Pathname: ./xControlFile
+psd.5b: 0.125 min. enclosure of p+ tap in peri by psdm
+r_482_psd.7
+0 0 2 Apr 13 11:34:59 2020
+Rule File Pathname: ./xControlFile
+psd.7: 0.13 min. spacing of psdm & opposite implant diffTap
+r_483_psd.8
+0 0 2 Apr 13 11:34:59 2020
+Rule File Pathname: ./xControlFile
+psd.8: psdm must not overlap ndiff/ntap (source of extendedDrain fet exempted)
+r_484_psd.9
+0 0 2 Apr 13 11:34:59 2020
+Rule File Pathname: ./xControlFile
+psd.9: pdiff/ptap (source of extendedDrain fet exempted) must be enclosed by psdmZENERID
+r_485_psd.10b
+0 0 2 Apr 13 11:34:59 2020
+Rule File Pathname: ./xControlFile
+psd.10b: 0.255 min. area of psdm
+r_486_psd.11
+0 0 2 Apr 13 11:34:59 2020
+Rule File Pathname: ./xControlFile
+psd.11: 0.265 min. area of psdmHole
+r_487_psd.c1a
+0 0 2 Apr 13 11:34:59 2020
+Rule File Pathname: ./xControlFile
+psd.c1a: 0.38 min. width of psdm (opposite parallel)
+r_488_psd.c2a
+0 0 2 Apr 13 11:34:59 2020
+Rule File Pathname: ./xControlFile
+psd.c2a: 0.38 min. spacing/notch of "psdm" in core
+r_489_psd.c2b
+0 0 2 Apr 13 11:34:59 2020
+Rule File Pathname: ./xControlFile
+psd.c2b: 0.29 min. spacing/notch of "psdm" in core
+r_490_psd.c5b
+0 0 2 Apr 13 11:34:59 2020
+Rule File Pathname: ./xControlFile
+psd.c5b: 0.12 min. enclosure of p+ tap in core by psdm
+r_491_hvi.1
+0 0 2 Apr 13 11:34:59 2020
+Rule File Pathname: ./xControlFile
+hvi.1: 0.6 min. width of hvi_peri
+r_492_hvi.2a
+0 0 2 Apr 13 11:34:59 2020
+Rule File Pathname: ./xControlFile
+hvi.2a: 0.7 min. spacing/notch of hvi_peri
+r_493_hvi.4
+0 0 2 Apr 13 11:34:59 2020
+Rule File Pathname: ./xControlFile
+hvi.4: hvi must not overlap tunm
+r_494_hvi.5
+0 0 2 Apr 13 11:34:59 2020
+Rule File Pathname: ./xControlFile
+hvi.5: 0.7 min. spacing between non-butting hvi and nwell
+r_495_nwell.8
+0 0 2 Apr 13 11:34:59 2020
+Rule File Pathname: ./xControlFile
+nwell.8: 2 min. spacing of HV_nwell & nwell
+r_496_hv.nwell.1
+0 0 2 Apr 13 11:35:00 2020
+Rule File Pathname: ./xControlFile
+hv.nwell.1: 2.5 min. spacing of nwell with text (shv_nwell) & nwell
+r_497_nwell.9
+0 0 2 Apr 13 11:35:00 2020
+Rule File Pathname: ./xControlFile
+nwell.9: HVnwell must be enclosed by hvi
+r_498_nwell.10
+0 0 2 Apr 13 11:35:01 2020
+Rule File Pathname: ./xControlFile
+nwell.10: LVnwell should not be on the same net as HVnwell
+r_499_difftap.14
+0 0 2 Apr 13 11:35:01 2020
+Rule File Pathname: ./xControlFile
+difftap.14: 0.29 min. width of Hdiff in periphery not Hv Pdiff Res
+r_500_difftap.14a
+0 0 2 Apr 13 11:35:01 2020
+Rule File Pathname: ./xControlFile
+difftap.14a: 0.15 min. width of Hv Pdiff Res in periphery
+r_501_difftap.15a
+0 0 2 Apr 13 11:35:01 2020
+Rule File Pathname: ./xControlFile
+difftap.15a: 0.3 min. spacing/notch of Hdiff in periphery
+r_502_difftap.15b
+0 0 2 Apr 13 11:35:01 2020
+Rule File Pathname: ./xControlFile
+difftap.15b: 0.37 min. spacing of n+ diff inside hvi in periphery & ptapHV_PERI_noAbut
+r_503_difftap.16
+0 0 2 Apr 13 11:35:01 2020
+Rule File Pathname: ./xControlFile
+difftap.16: 0.7 min. width of tapHV butting diffHV_noUHVI
+r_504_difftap.16
+0 0 2 Apr 13 11:35:01 2020
+Rule File Pathname: ./xControlFile
+difftap.16: 0.7 min. width of tapHV_noUHVI butting & between Hdiff
+r_505_difftap.17
+0 0 2 Apr 13 11:35:01 2020
+Rule File Pathname: ./xControlFile
+difftap.17: 0.33 min. enclosure of p+ Hdiff (no ESD)(no UHVI) by HV_nwell
+r_506_difftap.18
+0 0 2 Apr 13 11:35:01 2020
+Rule File Pathname: ./xControlFile
+difftap.18: 0.43 min. spacing of ndiff_nonESDuhvi & HV_nwell
+r_507_difftap.19
+0 0 2 Apr 13 11:35:01 2020
+Rule File Pathname: ./xControlFile
+difftap.19: 0.33 min. enclosure of n+ Htap (no ESD)(no UHVI) by HV_nwell
+r_508_difftap.20
+0 0 2 Apr 13 11:35:02 2020
+Rule File Pathname: ./xControlFile
+difftap.20: 0.43 min. spacing of PTAP_noPwellRes_noUHVI & HV_nwell
+r_509_difftap.21
+0 0 2 Apr 13 11:35:02 2020
+Rule File Pathname: ./xControlFile
+difftap.21: "diffTap" in periphery must not straddle hvi
+r_510_difftap.22
+0 0 2 Apr 13 11:35:02 2020
+Rule File Pathname: ./xControlFile
+difftap.22: 0.18 min. enclosure of Hdiff/Htap in periphery without UHVI by hvi
+r_511_difftap.23
+0 0 2 Apr 13 11:35:02 2020
+Rule File Pathname: ./xControlFile
+difftap.23: 0.18 min. spacing of diffTapNoHv_PERI & hvi
+r_512_difftap.24
+0 0 2 Apr 13 11:35:02 2020
+Rule File Pathname: ./xControlFile
+difftap.24: 0.43 min. spacing of ndiffHV_nonESDuhvi & nwell
+r_513_difftap.c11
+0 0 2 Apr 13 11:35:02 2020
+Rule File Pathname: ./xControlFile
+difftap.c11: 0.15 min. width of Hdiff in COREID
+r_514_poly.13
+0 0 2 Apr 13 11:35:02 2020
+Rule File Pathname: ./xControlFile
+poly.13: 0.5 min. width of poly over diff inside hvi in periphery
+r_515_poly.14
+0 0 2 Apr 13 11:35:03 2020
+Rule File Pathname: ./xControlFile
+poly.14: gate must not straddle hvi
+r_516_poly.1a
+0 0 2 Apr 13 11:35:03 2020
+Rule File Pathname: ./xControlFile
+poly.1a: 0.15 min. width of poly
+r_517_poly.1b
+0 0 2 Apr 13 11:35:03 2020
+Rule File Pathname: ./xControlFile
+poly.1b: poly.1b: 0.350 min. channel length of pfet overlapping lvtn
+r_518_poly.2
+0 0 2 Apr 13 11:35:03 2020
+Rule File Pathname: ./xControlFile
+poly.2: 0.21 min. spacing/notch of "poly" in periphery
+r_519_poly.2
+0 0 2 Apr 13 11:35:03 2020
+Rule File Pathname: ./xControlFile
+poly.2: 0.21 min. spacing of poly2noXmt across COREID boundary
+r_520_poly.c3
+0 0 2 Apr 13 11:35:03 2020
+Rule File Pathname: ./xControlFile
+poly.c3: poly.c3: 0.175 min. spacing of poly (except for poly.c2)
+r_521_poly.c2
+0 0 2 Apr 13 11:35:03 2020
+Rule File Pathname: ./xControlFile
+poly.c2: poly.c2: 0.160 min. spacing of poly for poly core gap
+r_522_poly.3
+0 0 2 Apr 13 11:35:03 2020
+Rule File Pathname: ./xControlFile
+poly.3: 0.33 min. width of poly resistor
+r_523_poly.4
+0 0 2 Apr 13 11:35:03 2020
+Rule File Pathname: ./xControlFile
+poly.4: 0.075 min. spacing of "poly" in periphery & diff
+r_524_poly.5
+0 0 2 Apr 13 11:35:03 2020
+Rule File Pathname: ./xControlFile
+poly.5: 0.055 min. spacing of "poly" in periphery & tap
+r_525_poly.6
+0 0 2 Apr 13 11:35:03 2020
+Rule File Pathname: ./xControlFile
+poly.6: 0.3 min. extension of diff edge butting tap beyond gate edge in periphery
+r_526_poly.7
+0 0 2 Apr 13 11:35:03 2020
+Rule File Pathname: ./xControlFile
+poly.7: 0.25 min. extension of diff beyond gate edge in periphery
+r_527_poly.8
+0 0 2 Apr 13 11:35:03 2020
+Rule File Pathname: ./xControlFile
+poly.8: 0.13 min. extension of poly beyond gate end in periphery
+r_528_poly.9
+0 0 2 Apr 13 11:35:03 2020
+Rule File Pathname: ./xControlFile
+poly.9: 0.48 min. spacing of poly resistor & diffTap
+r_529_poly.9
+0 0 2 Apr 13 11:35:03 2020
+Rule File Pathname: ./xControlFile
+poly.9: poly resistor must not overlap diffTap
+r_530_poly.9
+0 0 2 Apr 13 11:35:03 2020
+Rule File Pathname: ./xControlFile
+poly.9: 0.48 min. spacing of poly resistor & poly
+r_531_poly.10
+0 0 2 Apr 13 11:35:04 2020
+Rule File Pathname: ./xControlFile
+poly.10: poly must not overlap any inner corner of diff
+r_532_poly.11
+0 0 2 Apr 13 11:35:04 2020
+Rule File Pathname: ./xControlFile
+poly.11: No 90 degree bends of poly on diff
+r_533_poly.12
+0 0 2 Apr 13 11:35:04 2020
+Rule File Pathname: ./xControlFile
+poly.12: PolyNotLvNwellnoUHVI must not overlap "tap" in periphery
+r_534_poly.15
+0 0 2 Apr 13 11:35:04 2020
+Rule File Pathname: ./xControlFile
+poly.15: poly must not overlap diffres
+r_535_poly.c1
+0 0 2 Apr 13 11:35:04 2020
+Rule File Pathname: ./xControlFile
+poly.c1: 0.03 min. spacing of "poly" in core & diff
+r_536_poly.c1
+0 0 2 Apr 13 11:35:04 2020
+Rule File Pathname: ./xControlFile
+poly.c1: 0.03 min. spacing of "poly" in core & tap
+r_537_dnwell.6
+0 0 2 Apr 13 11:35:04 2020
+Rule File Pathname: ./xControlFile
+dnwell.6: rfNMOS must be enclosed by dnwell
+r_538_poly.X.1a
+0 0 2 Apr 13 11:35:05 2020
+Rule File Pathname: ./xControlFile
+poly.X.1a: 0.5 min. width of dummy_nhv
+r_539_poly.X.1a
+0 0 2 Apr 13 11:35:05 2020
+Rule File Pathname: ./xControlFile
+poly.X.1a: 0.15 min. width of dummy_nlowvt
+r_540_poly.X.1a
+0 0 2 Apr 13 11:35:05 2020
+Rule File Pathname: ./xControlFile
+poly.X.1a: 0.15 min. width of dummy_nshort
+r_541_poly.X.1a
+0 0 2 Apr 13 11:35:05 2020
+Rule File Pathname: ./xControlFile
+poly.X.1a: 0.15 min. width of dummy_pshort
+r_542_poly.X.1a
+0 0 2 Apr 13 11:35:05 2020
+Rule File Pathname: ./xControlFile
+poly.X.1a: 0.35 min. width of dummy_plowvt
+r_543_POLY.X.1
+0 0 2 Apr 13 11:35:05 2020
+Rule File Pathname: ./xControlFile
+POLY.X.1: This is an invalid nfet
+r_544_POLY.X.1
+0 0 2 Apr 13 11:35:05 2020
+Rule File Pathname: ./xControlFile
+POLY.X.1: This is an invalid pfet
+r_545_POLY.X.1
+0 0 2 Apr 13 11:35:05 2020
+Rule File Pathname: ./xControlFile
+POLY.X.1: This nhvnative is only allow in the FGR
+r_546_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pmedlvt_W0p84_L0p15_2F device has an invalid W/L. Please see MRGA
+r_547_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pshort_W3p0_L0p25_M4_b device has an invalid W/L. Please see MRGA
+r_548_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pshort_W5p0_L0p15_2F device has an invalid W/L. Please see MRGA
+r_549_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pshort_W1p65_L0p25_M4_b device has an invalid W/L. Please see MRGA
+r_551_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pshort_W3p0_L0p15_M4_b device has an invalid W/L. Please see MRGA
+r_552_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pshort_W5p0_L0p25_M4_b device has an invalid W/L. Please see MRGA
+r_553_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pshort_W5p0_L0p25_M2_b device has an invalid W/L. Please see MRGA
+r_555_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pshort_W0p84_L0p15_2F device has an invalid W/L. Please see MRGA
+r_556_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pshort_W1p65_L0p25_M2_b device has an invalid W/L. Please see MRGA
+r_558_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pshort_W3p0_L0p15_M2_b device has an invalid W/L. Please see MRGA
+r_559_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pshort_W5p0_L0p15_M4_b device has an invalid W/L. Please see MRGA
+r_560_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pshort_W5p0_L0p15_M2_b device has an invalid W/L. Please see MRGA
+r_561_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pshort_W3p0_L0p15_2F device has an invalid W/L. Please see MRGA
+r_562_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pshort_W5p0_L0p18_M4_b device has an invalid W/L. Please see MRGA
+r_563_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pshort_W1p68_L0p15_4F device has an invalid W/L. Please see MRGA
+r_564_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pshort_W3p0_L0p18_M4_b device has an invalid W/L. Please see MRGA
+r_565_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pshort_W5p0_L0p18_M2_b device has an invalid W/L. Please see MRGA
+r_566_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pshort_W3p0_L0p25_M2_b device has an invalid W/L. Please see MRGA
+r_567_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pshort_W1p65_L0p15_M2_b device has an invalid W/L. Please see MRGA
+r_569_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This ppu device has an invalid W/L. Please see MRGA
+r_570_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pshort_W1p68_L0p15_2F device has an invalid W/L. Please see MRGA
+r_571_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pshort_W1p65_L0p18_M4_b device has an invalid W/L. Please see MRGA
+r_572_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pmedlvt_W1p68_L0p15_4F device has an invalid W/L. Please see MRGA
+r_573_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pshort_W1p65_L0p18_M2_b device has an invalid W/L. Please see MRGA
+r_574_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pshort_W1p65_L0p15_M4_b device has an invalid W/L. Please see MRGA
+r_576_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pshort_W3p0_L0p18_M2_b device has an invalid W/L. Please see MRGA
+r_577_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_pmedlvt_W1p68_L0p15_2F device has an invalid W/L. Please see MRGA
+r_578_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W0p42_L0p15_2F device has an invalid W/L. Please see MRGA
+r_579_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W0p84_L0p15_2F device has an invalid W/L. Please see MRGA
+r_580_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nhv_W7p0_L0p5_M10_b device has an invalid W/L. Please see MRGA
+r_582_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nshort_W5p0_L0p25_M4_b device has an invalid W/L. Please see MRGA
+r_583_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This npass device has an invalid W/L. Please see MRGA
+r_584_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W1p65_L0p15_M2_b device has an invalid W/L. Please see MRGA
+r_585_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nhv_W3p0_L0p5_M10_b device has an invalid W/L. Please see MRGA
+r_586_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This sonos_p device has an invalid W/L. Please see MRGA
+r_587_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This nhvnativeesd device has an invalid W/L. Please see MRGA
+r_588_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This npd device has an invalid W/L. Please see MRGA
+r_589_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This ntvnative device has an invalid W/L. Please see MRGA
+r_590_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nhv_W5p0_L0p5_M4_b device has an invalid W/L. Please see MRGA
+r_591_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nshort_W1p65_L0p18_M4_b device has an invalid W/L. Please see MRGA
+r_592_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W3p0_L0p15_4F device has an invalid W/L. Please see MRGA
+r_593_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This fnpass device has an invalid W/L. Please see MRGA
+r_594_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W1p65_L0p15_M4_b device has an invalid W/L. Please see MRGA
+r_595_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W3p0_L0p18_M4_b device has an invalid W/L. Please see MRGA
+r_596_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W3p0_L0p15_8F device has an invalid W/L. Please see MRGA
+r_597_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W3p0_L0p15_M4_b device has an invalid W/L. Please see MRGA
+r_598_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W3p0_L0p25_M4_b device has an invalid W/L. Please see MRGA
+r_599_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W3p0_L0p15_M2_b device has an invalid W/L. Please see MRGA
+r_600_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W5p0_L0p15_M2_b device has an invalid W/L. Please see MRGA
+r_601_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W0p84_L0p15_4F device has an invalid W/L. Please see MRGA
+r_602_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nshort_W3p0_L0p18_M4_b device has an invalid W/L. Please see MRGA
+r_603_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nshort_W5p0_L0p18_M2_b device has an invalid W/L. Please see MRGA
+r_604_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nshort_W5p0_L0p25_M2_b device has an invalid W/L. Please see MRGA
+r_606_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nshort_W3p0_L0p25_M2_b device has an invalid W/L. Please see MRGA
+r_607_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This sonos_e device has an invalid W/L. Please see MRGA
+r_608_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nshort_W5p0_L0p15_M4_b device has an invalid W/L. Please see MRGA
+r_609_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nhv_W3p0_L0p5_M4_b device has an invalid W/L. Please see MRGA
+r_610_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W3p0_L0p18_M2_b device has an invalid W/L. Please see MRGA
+r_611_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nshort_W1p65_L0p25_M4_b device has an invalid W/L. Please see MRGA
+r_612_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nshort_W3p0_L0p15_M2_b device has an invalid W/L. Please see MRGA
+r_614_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nshort_W5p0_L0p15_M2_b device has an invalid W/L. Please see MRGA
+r_615_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nhv_W5p0_L0p5_M2_b device has an invalid W/L. Please see MRGA
+r_616_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W0p84_L0p15_8F device has an invalid W/L. Please see MRGA
+r_617_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nshort_W1p65_L0p15_M4_b device has an invalid W/L. Please see MRGA
+r_618_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W3p0_L0p25_M2_b device has an invalid W/L. Please see MRGA
+r_619_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W5p0_L0p25_M4_b device has an invalid W/L. Please see MRGA
+r_620_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This nshortesd device has an invalid W/L. Please see MRGA
+r_621_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W5p0_L0p25_M2_b device has an invalid W/L. Please see MRGA
+r_622_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nshort_W3p0_L0p15_M4_b device has an invalid W/L. Please see MRGA
+r_624_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nshort_W5p0_L0p18_M4_b device has an invalid W/L. Please see MRGA
+r_625_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W1p65_L0p25_M2_b device has an invalid W/L. Please see MRGA
+r_626_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nhv_W5p0_L0p5_M10_b device has an invalid W/L. Please see MRGA
+r_627_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nshort_W3p0_L0p25_M4_b device has an invalid W/L. Please see MRGA
+r_628_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nhv_W3p0_L0p5_M2_b device has an invalid W/L. Please see MRGA
+r_629_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W1p65_L0p18_M2_b device has an invalid W/L. Please see MRGA
+r_630_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This nlvtpass device has an invalid W/L. Please see MRGA
+r_631_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nshort_W1p65_L0p18_M2_b device has an invalid W/L. Please see MRGA
+r_632_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W5p0_L0p15_M4_b device has an invalid W/L. Please see MRGA
+r_633_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W1p65_L0p18_M4_b device has an invalid W/L. Please see MRGA
+r_634_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W5p0_L0p18_M4_b device has an invalid W/L. Please see MRGA
+r_635_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W3p0_L0p15_2F device has an invalid W/L. Please see MRGA
+r_636_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nshort_W3p0_L0p18_M2_b device has an invalid W/L. Please see MRGA
+r_637_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W5p0_L0p18_M2_b device has an invalid W/L. Please see MRGA
+r_638_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nhv_W7p0_L0p5_M4_b device has an invalid W/L. Please see MRGA
+r_639_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This nhvesd device has an invalid W/L. Please see MRGA
+r_640_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nshort_W1p65_L0p25_M2_b device has an invalid W/L. Please see MRGA
+r_641_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nlowvt_W1p65_L0p25_M4_b device has an invalid W/L. Please see MRGA
+r_642_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This s8rf_nshort_W1p65_L0p15_M2_b device has an invalid W/L. Please see MRGA
+r_643_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This pvhv device has an invalid W/L. Please see MRGA
+r_644_Poly.X.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+Poly.X.1: This nvhv device has an invalid W/L. Please see MRGA
+r_645_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: s8rf_nlowvt_W0p42_L0p15_2F_cell should be rectangular
+r_646_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 0.42 min. width of s8rf_nlowvt_W0p42_L0p15_2F_cell
+r_647_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 0.42 max. width of s8rf_nlowvt_W0p42_L0p15_2F_cell
+r_648_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 1.14 min. length of s8rf_nlowvt_W0p42_L0p15_2F_cell
+r_649_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 1.14 max. length of s8rf_nlowvt_W0p42_L0p15_2F_cell
+r_650_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: s8rf_nlowvt_W0p84_L0p15_2F_cell should be rectangular
+r_651_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 0.84 min. width of s8rf_nlowvt_W0p84_L0p15_2F_cell
+r_652_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 0.84 max. width of s8rf_nlowvt_W0p84_L0p15_2F_cell
+r_653_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 1.14 min. length of s8rf_nlowvt_W0p84_L0p15_2F_cell
+r_654_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 1.14 max. length of s8rf_nlowvt_W0p84_L0p15_2F_cell
+r_655_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: s8rf_nlowvt_W0p84_L0p15_4F_cell should be rectangular
+r_656_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 0.84 min. width of s8rf_nlowvt_W0p84_L0p15_4F_cell
+r_657_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 0.84 max. width of s8rf_nlowvt_W0p84_L0p15_4F_cell
+r_658_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 2 min. length of s8rf_nlowvt_W0p84_L0p15_4F_cell
+r_659_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 2 max. length of s8rf_nlowvt_W0p84_L0p15_4F_cell
+r_660_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: s8rf_nlowvt_W0p84_L0p15_8F_cell should be rectangular
+r_661_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 0.84 min. width of s8rf_nlowvt_W0p84_L0p15_8F_cell
+r_662_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 0.84 max. width of s8rf_nlowvt_W0p84_L0p15_8F_cell
+r_663_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 3.72 min. length of s8rf_nlowvt_W0p84_L0p15_8F_cell
+r_664_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 3.72 max. length of s8rf_nlowvt_W0p84_L0p15_8F_cell
+r_665_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: s8rf_nlowvt_W3p0_L0p15_2F_cell should be rectangular
+r_666_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 1.14 min. width of s8rf_nlowvt_W3p0_L0p15_2F_cell
+r_667_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 1.14 max. width of s8rf_nlowvt_W3p0_L0p15_2F_cell
+r_668_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 3 min. length of s8rf_nlowvt_W3p0_L0p15_2F_cell
+r_669_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 3 max. length of s8rf_nlowvt_W3p0_L0p15_2F_cell
+r_670_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: s8rf_nlowvt_W3p0_L0p15_4F_cell should be rectangular
+r_671_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 2 min. width of s8rf_nlowvt_W3p0_L0p15_4F_cell
+r_672_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 2 max. width of s8rf_nlowvt_W3p0_L0p15_4F_cell
+r_673_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 3 min. length of s8rf_nlowvt_W3p0_L0p15_4F_cell
+r_674_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 3 max. length of s8rf_nlowvt_W3p0_L0p15_4F_cell
+r_675_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: s8rf_nlowvt_W3p0_L0p15_8F_cell should be rectangular
+r_676_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 3 min. width of s8rf_nlowvt_W3p0_L0p15_8F_cell
+r_677_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 3 max. width of s8rf_nlowvt_W3p0_L0p15_8F_cell
+r_678_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 3.72 min. length of s8rf_nlowvt_W3p0_L0p15_8F_cell
+r_679_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 3.72 max. length of s8rf_nlowvt_W3p0_L0p15_8F_cell
+r_680_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: s8rf_pshort_W0p84_L0p15_2F_cell should be rectangular
+r_681_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 0.84 min. width of s8rf_pshort_W0p84_L0p15_2F_cell
+r_682_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 0.84 max. width of s8rf_pshort_W0p84_L0p15_2F_cell
+r_683_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 1.11 min. length of s8rf_pshort_W0p84_L0p15_2F_cell
+r_684_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 1.11 max. length of s8rf_pshort_W0p84_L0p15_2F_cell
+r_685_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: s8rf_pshort_W1p68_L0p15_2F_cell should be rectangular
+r_686_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 1.11 min. width of s8rf_pshort_W1p68_L0p15_2F_cell
+r_687_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 1.11 max. width of s8rf_pshort_W1p68_L0p15_2F_cell
+r_688_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 1.68 min. length of s8rf_pshort_W1p68_L0p15_2F_cell
+r_689_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 1.68 max. length of s8rf_pshort_W1p68_L0p15_2F_cell
+r_690_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: s8rf_pshort_W1p68_L0p15_4F_cell should be rectangular
+r_691_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 1.68 min. width of s8rf_pshort_W1p68_L0p15_4F_cell
+r_692_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 1.68 max. width of s8rf_pshort_W1p68_L0p15_4F_cell
+r_693_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 1.97 min. length of s8rf_pshort_W1p68_L0p15_4F_cell
+r_694_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 1.97 max. length of s8rf_pshort_W1p68_L0p15_4F_cell
+r_695_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: s8rf_pshort_W3p0_L0p15_2F_cell should be rectangular
+r_696_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 1.11 min. width of s8rf_pshort_W3p0_L0p15_2F_cell
+r_697_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 1.11 max. width of s8rf_pshort_W3p0_L0p15_2F_cell
+r_698_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 3 min. length of s8rf_pshort_W3p0_L0p15_2F_cell
+r_699_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 3 max. length of s8rf_pshort_W3p0_L0p15_2F_cell
+r_700_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: s8rf_pshort_W5p0_L0p15_2F_cell should be rectangular
+r_701_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 1.11 min. width of s8rf_pshort_W5p0_L0p15_2F_cell
+r_702_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 1.11 max. width of s8rf_pshort_W5p0_L0p15_2F_cell
+r_703_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 5 min. length of s8rf_pshort_W5p0_L0p15_2F_cell
+r_704_diff.13
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+diff.13: 5 max. length of s8rf_pshort_W5p0_L0p15_2F_cell
+r_705_poly.16
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+poly.16: Poly of the RF FETs defined in Table H5 cannot overlap
+r_706_npc.1
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+npc.1: 0.27 min. width of npc
+r_707_npc.2
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+npc.2: 0.27 min. spacing/notch of npc
+r_708_npc.4
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+npc.4: 0.09 min. spacing of npc & gate
+r_709_npc.4
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+npc.4: npc must not overlap gate
+r_710_npc.5
+0 0 2 Apr 13 11:35:09 2020
+Rule File Pathname: ./xControlFile
+npc.5: 0.095 max enclosure of poly overlapping slotted_licon by npcm
+r_711_licon.2
+0 0 2 Apr 13 11:35:10 2020
+Rule File Pathname: ./xControlFile
+licon.2: 0.17 min. spacing/notch of "licon1" in periphery
+r_712_licon.2
+0 0 2 Apr 13 11:35:10 2020
+Rule File Pathname: ./xControlFile
+licon.2: 0.17 min. spacing of licon1 across COREID boundary
+r_713_licon.3
+0 0 2 Apr 13 11:35:10 2020
+Rule File Pathname: ./xControlFile
+licon.3: 0.17 min. width of ring licon1
+r_714_licon.3
+0 0 2 Apr 13 11:35:10 2020
+Rule File Pathname: ./xControlFile
+licon.3: 0.175 max. width of ring licon1
+r_715_licon.3
+0 0 2 Apr 13 11:35:10 2020
+Rule File Pathname: ./xControlFile
+licon.3: ring licon1 must be enclosed by SEALID
+r_716_licon.4
+0 0 2 Apr 13 11:35:10 2020
+Rule File Pathname: ./xControlFile
+licon.4: licon1 must overlap li1 and (poly or diff or tap)
+r_717_licon.5a
+0 0 2 Apr 13 11:35:10 2020
+Rule File Pathname: ./xControlFile
+licon.5a: 0.04 min. enclosure of "licon1" in periphery by diff
+r_718_licon.5b
+0 0 2 Apr 13 11:35:11 2020
+Rule File Pathname: ./xControlFile
+licon.5b: 0.06 min. spacing of tapLicon_PERI & diffTap butting edge
+r_719_licon.5c
+0 0 2 Apr 13 11:35:11 2020
+Rule File Pathname: ./xControlFile
+licon.5c: 0.06 min. enclosure of adj. sides of "licon1" in periphery by diff
+r_720_licon.6
+0 0 2 Apr 13 11:35:12 2020
+Rule File Pathname: ./xControlFile
+licon.6: "licon1" in periphery must not straddle tap
+r_721_licon.7
+0 0 2 Apr 13 11:35:12 2020
+Rule File Pathname: ./xControlFile
+licon.7: 0.12 min. enclosure of adj. sides of "licon1" in periphery by noButtTap
+r_722_licon.8
+0 0 2 Apr 13 11:35:13 2020
+Rule File Pathname: ./xControlFile
+licon.8: 0.05 min. enclosure of "poly_licon1" in periphery by poly
+r_723_licon.8a
+0 0 2 Apr 13 11:35:14 2020
+Rule File Pathname: ./xControlFile
+licon.8a: 0.08 min. enclosure of adj. sides of "poly_licon1" in periphery by poly
+r_724_licon.10
+0 0 2 Apr 13 11:35:14 2020
+Rule File Pathname: ./xControlFile
+licon.10: 0.25 min. spacing of varLiconPer & varChannel
+r_725_licon.11
+0 0 2 Apr 13 11:35:14 2020
+Rule File Pathname: ./xControlFile
+licon.11: 0.055 min. spacing of "licon1 on diffTap" in periphery & gateNoSC
+r_726_licon.11
+0 0 2 Apr 13 11:35:14 2020
+Rule File Pathname: ./xControlFile
+licon.11: "licon1 on diffTap" in periphery must not overlap gateNoSC
+r_727_licon.11a
+0 0 2 Apr 13 11:35:15 2020
+Rule File Pathname: ./xControlFile
+licon.11a: 0.05 min. spacing of "licon1 on diffTap" in periphery & (gate and areaid.sc) except 0.15 phighvt
+r_728_licon.11a
+0 0 2 Apr 13 11:35:15 2020
+Rule File Pathname: ./xControlFile
+licon.11a: "licon1 on diffTap" in periphery must not overlap (gate and areaid.sc) except 0.15 phighvt
+r_729_licon.11b
+0 0 2 Apr 13 11:35:15 2020
+Rule File Pathname: ./xControlFile
+licon.11b: 0.05 min. spacing of "licon1 on diffTap" in periphery & gateSCPhighvt
+r_730_licon.11b
+0 0 2 Apr 13 11:35:15 2020
+Rule File Pathname: ./xControlFile
+licon.11b: "licon1 on diffTap" in periphery must not overlap gateSCPhighvt
+r_731_licon.11c
+0 0 2 Apr 13 11:35:15 2020
+Rule File Pathname: ./xControlFile
+licon.11c: 0.04 min. spacing of "licon1 on diffTap" in periphery & licon11cGate
+r_732_licon.11c
+0 0 2 Apr 13 11:35:15 2020
+Rule File Pathname: ./xControlFile
+licon.11c: "licon1 on diffTap" in periphery must not overlap licon11cGate
+r_733_licon.11d
+0 0 2 Apr 13 11:35:15 2020
+Rule File Pathname: ./xControlFile
+licon.11d: 0.045 min. spacing of "licon1 on diffTap" in periphery & licon11dGate
+r_734_licon.11d
+0 0 2 Apr 13 11:35:15 2020
+Rule File Pathname: ./xControlFile
+licon.11d: "licon1 on diffTap" in periphery must not overlap licon11dGate
+r_735_licon.1
+0 0 2 Apr 13 11:35:15 2020
+Rule File Pathname: ./xControlFile
+licon.1: rectLCON1OutRpm should be rectangular
+r_736_licon.1
+0 0 2 Apr 13 11:35:15 2020
+Rule File Pathname: ./xControlFile
+licon.1: 0.17 min. width of rectLCON1OutRpm
+r_737_licon.1
+0 0 2 Apr 13 11:35:16 2020
+Rule File Pathname: ./xControlFile
+licon.1: 0.17 max. length of rectLCON1OutRpm
+r_738_licon.1b/c
+0 0 2 Apr 13 11:35:16 2020
+Rule File Pathname: ./xControlFile
+licon.1b/c: rectLCON1AndRpm should be rectangular
+r_739_licon.1b/c
+0 0 2 Apr 13 11:35:16 2020
+Rule File Pathname: ./xControlFile
+licon.1b/c: 0.19 min. width of rectLCON1AndRpm
+r_740_licon.1b/c
+0 0 2 Apr 13 11:35:16 2020
+Rule File Pathname: ./xControlFile
+licon.1b/c: 0.19 max. width of rectLCON1AndRpm
+r_741_licon.1b/c
+0 0 2 Apr 13 11:35:16 2020
+Rule File Pathname: ./xControlFile
+licon.1b/c: 2 min. length of rectLCON1AndRpm
+r_742_licon.1b/c
+0 0 2 Apr 13 11:35:16 2020
+Rule File Pathname: ./xControlFile
+licon.1b/c: 2 max. length of rectLCON1AndRpm
+r_743_licon.2b
+0 0 2 Apr 13 11:35:16 2020
+Rule File Pathname: ./xControlFile
+licon.2b: 0.35 min. spacing/notch of rectLCON1AndRpm
+r_744_licon.2c
+0 0 2 Apr 13 11:35:16 2020
+Rule File Pathname: ./xControlFile
+licon.2c: min spacing between slotted licon in lateral dir is 0.510
+r_745_licon.2d
+0 0 2 Apr 13 11:35:16 2020
+Rule File Pathname: ./xControlFile
+licon.2d: 0.51 min. spacing of rectLCON1AndRpm & rectLCON1OutRpm
+r_746_licon.9
+0 0 2 Apr 13 11:35:16 2020
+Rule File Pathname: ./xControlFile
+licon.9: 0.11 min. spacing of polyLicon1OutRpm & psdm
+r_747_licon.9
+0 0 2 Apr 13 11:35:16 2020
+Rule File Pathname: ./xControlFile
+licon.9: polyLicon1OutRpm must not overlap psdm
+r_748_licon.13
+0 0 2 Apr 13 11:35:16 2020
+Rule File Pathname: ./xControlFile
+licon.13: 0.09 min. spacing of "licon1 on diffTap" in periphery & npc
+r_749_licon.13
+0 0 2 Apr 13 11:35:16 2020
+Rule File Pathname: ./xControlFile
+licon.13: "licon1 on diffTap" in periphery must not overlap npc
+r_750_licon.14
+0 0 2 Apr 13 11:35:16 2020
+Rule File Pathname: ./xControlFile
+licon.14: 0.19 min. spacing of poly_licon1 & "diffTap" in periphery
+r_751_licon.15
+0 0 2 Apr 13 11:35:17 2020
+Rule File Pathname: ./xControlFile
+licon.15: 0.1 min. enclosure of "poly_licon1" in periphery by npc
+r_752_licon.15
+0 0 2 Apr 13 11:35:17 2020
+Rule File Pathname: ./xControlFile
+licon.15: "poly_licon1" in periphery must be enclosed by npc
+r_753_npcon.c6
+0 0 2 Apr 13 11:35:17 2020
+Rule File Pathname: ./xControlFile
+npcon.c6: 0.045 min. enclosure of "poly_licon1" in core by npc
+r_754_npcon.c6
+0 0 2 Apr 13 11:35:17 2020
+Rule File Pathname: ./xControlFile
+npcon.c6: "poly_licon1" in core must be enclosed by npc
+r_755_licon.16
+0 0 2 Apr 13 11:35:17 2020
+Rule File Pathname: ./xControlFile
+licon.16: source must enclose at least one licon in peri
+r_756_licon.16
+0 0 2 Apr 13 11:35:18 2020
+Rule File Pathname: ./xControlFile
+licon.16: tap must enclose at least one licon in peri
+r_757_licon.17
+0 0 2 Apr 13 11:35:18 2020
+Rule File Pathname: ./xControlFile
+licon.17: licon1 overlapping poly must not overlap diffTap
+r_758_licon.18
+0 0 2 Apr 13 11:35:18 2020
+Rule File Pathname: ./xControlFile
+licon.18: npc must enclose poly_licon
+r_759_licon.19
+0 0 2 Apr 13 11:35:18 2020
+Rule File Pathname: ./xControlFile
+licon.19: poly on HV varactor must not interact with licon
+r_760_licon.c1
+0 0 2 Apr 13 11:35:18 2020
+Rule File Pathname: ./xControlFile
+licon.c1: 0.13 min. spacing of poly_licon1 & "diffTap" in core
+r_761_licon.c3
+0 0 2 Apr 13 11:35:18 2020
+Rule File Pathname: ./xControlFile
+licon.c3: 0.165 min. spacing/notch of "licon1" in core
+r_762_licon.c4
+0 0 2 Apr 13 11:35:18 2020
+Rule File Pathname: ./xControlFile
+licon.c4: "poly_licon1" in core must not overlap psdm
+r_763_li.1
+0 0 2 Apr 13 11:35:26 2020
+Rule File Pathname: ./xControlFile
+li.1: 0.17 min. width of liNoVppCaps across areaid:ce
+r_764_li.1
+0 0 2 Apr 13 11:35:26 2020
+Rule File Pathname: ./xControlFile
+li.1: 0.17 min. width of liNoVppCaps in PERI
+r_765_li.c1
+0 0 2 Apr 13 11:35:26 2020
+Rule File Pathname: ./xControlFile
+li.c1: 0.14 min. width of liNoVppCaps in COREID
+r_766_li.1a
+0 0 2 Apr 13 11:35:26 2020
+Rule File Pathname: ./xControlFile
+li.1a: 0.14 min. width of liVppCaps
+r_767_li.3
+0 0 2 Apr 13 11:35:26 2020
+Rule File Pathname: ./xControlFile
+li.3: 0.17 min. spacing/notch of li1_3_PERI
+r_768_li.3
+0 0 2 Apr 13 11:35:26 2020
+Rule File Pathname: ./xControlFile
+li.3: 0.17 min. spacing of li1 across COREID boundary
+r_769_li.3a
+0 0 2 Apr 13 11:35:26 2020
+Rule File Pathname: ./xControlFile
+li.3a: 0.14 min. spacing/notch of li1_3a_PERI
+r_770_li.4
+0 0 2 Apr 13 11:35:26 2020
+Rule File Pathname: ./xControlFile
+li.4: "licon1" in periphery must be enclosed by li1
+r_771_li.5
+0 0 2 Apr 13 11:35:29 2020
+Rule File Pathname: ./xControlFile
+li.5: 0.08 min. enclosure of adj. sides of "licon1" in periphery by li1
+r_772_li.6
+0 0 2 Apr 13 11:35:30 2020
+Rule File Pathname: ./xControlFile
+li.6: 0.0561 min. area of li1 across areaid:ce
+r_773_li.6
+0 0 2 Apr 13 11:35:30 2020
+Rule File Pathname: ./xControlFile
+li.6: 0.0561 min. area of li1
+r_774_li.7
+0 0 2 Apr 13 11:35:30 2020
+Rule File Pathname: ./xControlFile
+li.7: 0.29 min. width of li1AndResNoESD
+r_775_li.c1
+0 0 2 Apr 13 11:35:30 2020
+Rule File Pathname: ./xControlFile
+li.c1: 0.14 min. width of "li1" in core
+r_776_li.c2
+0 0 2 Apr 13 11:35:30 2020
+Rule File Pathname: ./xControlFile
+li.c2: 0.14 min. spacing/notch of "li1" in core
+r_777_ct.1
+0 0 2 Apr 13 11:35:31 2020
+Rule File Pathname: ./xControlFile
+ct.1: non-ring mcon should be rectangular
+r_778_ct.1
+0 0 2 Apr 13 11:35:32 2020
+Rule File Pathname: ./xControlFile
+ct.1: 0.17 min. width of non-ring mcon
+r_779_ct.1
+0 0 2 Apr 13 11:35:34 2020
+Rule File Pathname: ./xControlFile
+ct.1: 0.17 max. length of non-ring mcon
+r_780_ct.2
+0 0 2 Apr 13 11:35:36 2020
+Rule File Pathname: ./xControlFile
+ct.2: 0.19 min. spacing/notch of mcon
+r_781_ct.3
+0 0 2 Apr 13 11:35:36 2020
+Rule File Pathname: ./xControlFile
+ct.3: 0.17 min. width of ring-shaped mcon
+r_782_ct.3
+0 0 2 Apr 13 11:35:36 2020
+Rule File Pathname: ./xControlFile
+ct.3: 0.175 max. width of ring-shaped mcon
+r_783_ct.3
+0 0 2 Apr 13 11:35:36 2020
+Rule File Pathname: ./xControlFile
+ct.3: ring-shaped mcon must be enclosed by SEALID
+r_784_ct.4
+0 0 2 Apr 13 11:35:36 2020
+Rule File Pathname: ./xControlFile
+ct.4: "mcon" in periphery must be enclosed by li1
+r_785_ct.c1
+0 0 2 Apr 13 11:35:36 2020
+Rule File Pathname: ./xControlFile
+ct.c1: "mcon" in core must overlap li1
+r_786_ct.c2
+0 0 2 Apr 13 11:35:36 2020
+Rule File Pathname: ./xControlFile
+ct.c2: 0.19 min. spacing/notch of "mcon" in core
+r_787_m1.1
+0 0 2 Apr 13 11:35:37 2020
+Rule File Pathname: ./xControlFile
+m1.1: 0.14 min. width of met1
+r_788_m1.2
+0 0 2 Apr 13 11:35:37 2020
+Rule File Pathname: ./xControlFile
+m1.2: 0.14 min. spacing/notch of met1
+r_789_m1.3b
+0 0 2 Apr 13 11:35:38 2020
+Rule File Pathname: ./xControlFile
+m1.3b: 0.28 min. spacing between huge met1 and normal met1
+r_790_m1.3a
+0 0 2 Apr 13 11:35:39 2020
+Rule File Pathname: ./xControlFile
+m1.3a: 0.28 min. spacing/notch of huge met1+nearby met1
+r_791_m1.4
+0 0 2 Apr 13 11:35:41 2020
+Rule File Pathname: ./xControlFile
+m1.4: 0.03 min. enclosure of mcon_PERI_4 by met1
+r_792_m1.4
+0 0 2 Apr 13 11:35:41 2020
+Rule File Pathname: ./xControlFile
+m1.4: mcon_PERI_4 must be enclosed by met1
+r_793_m1.4a
+0 0 2 Apr 13 11:35:41 2020
+Rule File Pathname: ./xControlFile
+m1.4a: 0.005 min. enclosure of mcon_PERI_4a by met1
+r_794_m1.4a
+0 0 2 Apr 13 11:35:41 2020
+Rule File Pathname: ./xControlFile
+m1.4a: mcon_PERI_4a must be enclosed by met1
+r_795_m1.5
+0 0 2 Apr 13 11:35:45 2020
+Rule File Pathname: ./xControlFile
+m1.5: 0.06 min. enclosure of adj. sides of "mcon" in periphery by met1
+r_796_m1.6
+0 0 2 Apr 13 11:35:46 2020
+Rule File Pathname: ./xControlFile
+m1.6: 0.083 min. area of met1
+r_797_m1.7
+0 0 2 Apr 13 11:35:47 2020
+Rule File Pathname: ./xControlFile
+m1.7: 0.14 min. area of met1Hole
+r_798_m1.7
+0 0 2 Apr 13 11:35:47 2020
+Rule File Pathname: ./xControlFile
+m1.7: 0.14 min. area of met1HoleEmpty
+r_799_m1.c1
+0 0 2 Apr 13 11:35:47 2020
+Rule File Pathname: ./xControlFile
+m1.c1: "mcon" in core must be enclosed by met1
+r_800_via.1a
+0 0 2 Apr 13 11:35:47 2020
+Rule File Pathname: ./xControlFile
+via.1a: via outside of moduleCut should be rectangular
+r_801_via.1a
+0 0 2 Apr 13 11:35:47 2020
+Rule File Pathname: ./xControlFile
+via.1a: 0.15 min. width of via outside of moduleCut
+r_802_via.1a
+0 0 2 Apr 13 11:35:48 2020
+Rule File Pathname: ./xControlFile
+via.1a: 0.15 max. length of via outside of moduleCut
+r_803_via.1b
+0 0 2 Apr 13 11:35:48 2020
+Rule File Pathname: ./xControlFile
+via.1b: via size inside module cut must be 0.150 or 0.230 or 0.280
+r_804_via.2
+0 0 2 Apr 13 11:35:48 2020
+Rule File Pathname: ./xControlFile
+via.2: 0.17 min. spacing/notch of via
+r_805_via.3
+0 0 2 Apr 13 11:35:48 2020
+Rule File Pathname: ./xControlFile
+via.3: 0.2 min. width of ring-shaped via
+r_806_via.3
+0 0 2 Apr 13 11:35:48 2020
+Rule File Pathname: ./xControlFile
+via.3: 0.205 max. width of ring-shaped via
+r_807_via.3
+0 0 2 Apr 13 11:35:48 2020
+Rule File Pathname: ./xControlFile
+via.3: ring-shaped via must be enclosed by SEALID
+r_808_via.4a
+0 0 2 Apr 13 11:35:50 2020
+Rule File Pathname: ./xControlFile
+via.4a: 0.055 min. enclosure of 0.15um via by met1
+r_809_via.4a
+0 0 2 Apr 13 11:35:50 2020
+Rule File Pathname: ./xControlFile
+via.4a: 0.15um via must be enclosed by met1
+r_810_via.4b
+0 0 2 Apr 13 11:35:50 2020
+Rule File Pathname: ./xControlFile
+via.4b: 0.03 min. enclosure of 0.23 via within modulecut by met1
+r_811_via.4b
+0 0 2 Apr 13 11:35:50 2020
+Rule File Pathname: ./xControlFile
+via.4b: 0.23 via within modulecut must be enclosed by met1
+r_812_via.4c
+0 0 2 Apr 13 11:35:50 2020
+Rule File Pathname: ./xControlFile
+via.4c: 0 min. enclosure of 0.28 via within modulecut by met1
+r_813_via.4c
+0 0 2 Apr 13 11:35:50 2020
+Rule File Pathname: ./xControlFile
+via.4c: 0.28 via within modulecut must be enclosed by met1
+r_814_via.5a
+0 0 2 Apr 13 11:35:55 2020
+Rule File Pathname: ./xControlFile
+via.5a: 0.085 min. enclosure of adj. sides of 0.15um via by met1
+r_815_via.5b
+0 0 2 Apr 13 11:35:55 2020
+Rule File Pathname: ./xControlFile
+via.5b: 0.06 min. enclosure of adj. sides of 0.23 via within modulecut by met1
+r_816_via.5c
+0 0 2 Apr 13 11:35:55 2020
+Rule File Pathname: ./xControlFile
+via.5c: 0 min. enclosure of adj. sides of 0.28 via within modulecut by met1
+r_817_m2.1
+0 0 2 Apr 13 11:36:00 2020
+Rule File Pathname: ./xControlFile
+m2.1: 0.14 min. width of met2
+r_818_m2.2
+0 0 2 Apr 13 11:36:00 2020
+Rule File Pathname: ./xControlFile
+m2.2: 0.14 min. spacing/notch of met2
+r_819_m2.3b
+0 0 2 Apr 13 11:36:01 2020
+Rule File Pathname: ./xControlFile
+m2.3b: 0.28 min. spacing between huge met2 and normal met2
+r_820_m2.3a
+0 0 2 Apr 13 11:36:01 2020
+Rule File Pathname: ./xControlFile
+m2.3a: 0.28 min. spacing/notch of huge met2+nearby met2
+r_821_m2.4
+0 0 2 Apr 13 11:36:02 2020
+Rule File Pathname: ./xControlFile
+m2.4: 0.055 min. enclosure of "via" in periphery by met2
+r_822_m2.4
+0 0 2 Apr 13 11:36:02 2020
+Rule File Pathname: ./xControlFile
+m2.4: "via" in periphery must be enclosed by met2
+r_823_m2.5
+0 0 2 Apr 13 11:36:04 2020
+Rule File Pathname: ./xControlFile
+m2.5: 0.085 min. enclosure of adj. sides of via by met2
+r_824_m2.6
+0 0 2 Apr 13 11:36:05 2020
+Rule File Pathname: ./xControlFile
+m2.6: 0.0676 min. area of met2
+r_825_m2.7
+0 0 2 Apr 13 11:36:05 2020
+Rule File Pathname: ./xControlFile
+m2.7: 0.14 min. area of met2Hole
+r_826_m2.7
+0 0 2 Apr 13 11:36:05 2020
+Rule File Pathname: ./xControlFile
+m2.7: 0.14 min. area of met2HoleEmpty
+r_827_m2.c4
+0 0 2 Apr 13 11:36:05 2020
+Rule File Pathname: ./xControlFile
+m2.c4: 0.04 min. enclosure of "via" in core by met2
+r_828_m2.c4
+0 0 2 Apr 13 11:36:05 2020
+Rule File Pathname: ./xControlFile
+m2.c4: "via" in core must be enclosed by met2
+r_829_varac.1
+0 0 2 Apr 13 11:36:05 2020
+Rule File Pathname: ./xControlFile
+varac.1: Min channel length of varactor channel is 0.180
+r_830_varac.2
+0 0 2 Apr 13 11:36:05 2020
+Rule File Pathname: ./xControlFile
+varac.2: Min channel width of varactor channel is 1.000
+r_831_varac.3
+0 0 2 Apr 13 11:36:05 2020
+Rule File Pathname: ./xControlFile
+varac.3: 0.18 min. spacing of varChannel & hvtp
+r_832_varac.4
+0 0 2 Apr 13 11:36:06 2020
+Rule File Pathname: ./xControlFile
+varac.4: 0.25 min. spacing of varChannel & liconOnTap
+r_833_varac.5
+0 0 2 Apr 13 11:36:06 2020
+Rule File Pathname: ./xControlFile
+varac.5: 0.15 min. enclosure of polyonVarChannel by nwell
+r_834_varac.6
+0 0 2 Apr 13 11:36:06 2020
+Rule File Pathname: ./xControlFile
+varac.6: 0.27 min. spacing of taponVarChannel & difftapNotVarChannel
+r_835_varac.7
+0 0 2 Apr 13 11:36:06 2020
+Rule File Pathname: ./xControlFile
+varac.7: nwell overlapping varacChannel must not overlap p+ diff
+r_836_varac.8
+0 0 2 Apr 13 11:36:06 2020
+Rule File Pathname: ./xControlFile
+varac.8: 0.255 min. enclosure of varChannel by hvtp
+r_837_photo.2
+0 0 2 Apr 13 11:36:06 2020
+Rule File Pathname: ./xControlFile
+photo.2: 3.000 min/max width of photoDiode
+r_838_photo.3
+0 0 2 Apr 13 11:36:06 2020
+Rule File Pathname: ./xControlFile
+photo.3: 5 min. spacing/notch of photoDiode
+r_839_photo.4
+0 0 2 Apr 13 11:36:06 2020
+Rule File Pathname: ./xControlFile
+photo.4: 5.3 min. spacing of photoDiode & dnwellNotPhoto
+r_840_photo.5
+0 0 2 Apr 13 11:36:06 2020
+Rule File Pathname: ./xControlFile
+photo.5: edges of photoDiode (dnwell overlapping areaid.po) must be coincident with areaid.po
+r_841_photo.6
+0 0 2 Apr 13 11:36:06 2020
+Rule File Pathname: ./xControlFile
+photo.6: photoDiode must be enclosed by dnwell ring
+r_842_photo.7
+0 0 2 Apr 13 11:36:06 2020
+Rule File Pathname: ./xControlFile
+photo.7: photoDiode must be enclosed by p+tap ring
+r_843_photo.8
+0 0 2 Apr 13 11:36:06 2020
+Rule File Pathname: ./xControlFile
+photo.8: 0.840 min/max width of nwell inside photoDiode
+r_844_photo.9
+0 0 2 Apr 13 11:36:06 2020
+Rule File Pathname: ./xControlFile
+photo.9: 1.080 min/max enclosure of nwell inside photoDiode by photoDiode
+r_845_photo.10
+0 0 2 Apr 13 11:36:06 2020
+Rule File Pathname: ./xControlFile
+photo.10: 0.410 min/max width of tap inside photoDiode
+r_846_photo.11
+0 0 2 Apr 13 11:36:06 2020
+Rule File Pathname: ./xControlFile
+photo.11: 0.215 min/max enclosure of tap by nwell inside photoDiode
+r_847_via2.1d
+0 0 2 Apr 13 11:36:06 2020
+Rule File Pathname: ./xControlFile
+via2.1d: via size inside module cut must be 0.200, 0.280, 1.200, OR 1.500
+r_848_via2.1a
+0 0 2 Apr 13 11:36:06 2020
+Rule File Pathname: ./xControlFile
+via2.1a: rectVIA2noMT should be rectangular
+r_849_via2.1a
+0 0 2 Apr 13 11:36:06 2020
+Rule File Pathname: ./xControlFile
+via2.1a: 0.2 min. width of rectVIA2noMT
+r_850_via2.1a
+0 0 2 Apr 13 11:36:06 2020
+Rule File Pathname: ./xControlFile
+via2.1a: 0.2 max. length of rectVIA2noMT
+r_851_via2.2
+0 0 2 Apr 13 11:36:06 2020
+Rule File Pathname: ./xControlFile
+via2.2: 0.2 min. spacing/notch of via2
+r_852_via2.3
+0 0 2 Apr 13 11:36:06 2020
+Rule File Pathname: ./xControlFile
+via2.3: 0.2 min. width of ring-shaped via2
+r_853_via2.3
+0 0 2 Apr 13 11:36:06 2020
+Rule File Pathname: ./xControlFile
+via2.3: 0.205 max. width of ring-shaped via2
+r_854_via2.3
+0 0 2 Apr 13 11:36:06 2020
+Rule File Pathname: ./xControlFile
+via2.3: ring-shaped via2 must be enclosed by SEALID
+r_855_via2.4
+0 0 2 Apr 13 11:36:07 2020
+Rule File Pathname: ./xControlFile
+via2.4: 0.04 min. enclosure of via2 by met2
+r_856_via2.4
+0 0 2 Apr 13 11:36:07 2020
+Rule File Pathname: ./xControlFile
+via2.4: via2 must be enclosed by met2
+r_857_via2.4a
+0 0 2 Apr 13 11:36:07 2020
+Rule File Pathname: ./xControlFile
+via2.4a: 0.14 min. enclosure of rectVIA2Big by met2
+r_858_via2.4a
+0 0 2 Apr 13 11:36:07 2020
+Rule File Pathname: ./xControlFile
+via2.4a: rectVIA2Big must be enclosed by met2
+r_859_via2.5
+0 0 2 Apr 13 11:36:08 2020
+Rule File Pathname: ./xControlFile
+via2.5: 0.085 min. enclosure of adj. sides of via2 by met2
+r_860_m3.1
+0 0 2 Apr 13 11:36:08 2020
+Rule File Pathname: ./xControlFile
+m3.1: 0.3 min. width of met3
+r_861_m3.2
+0 0 2 Apr 13 11:36:08 2020
+Rule File Pathname: ./xControlFile
+m3.2: 0.3 min. spacing/notch of met3
+r_862_m3.4
+0 0 2 Apr 13 11:36:08 2020
+Rule File Pathname: ./xControlFile
+m3.4: 0.065 min. enclosure of via2 by met3
+r_863_m3.4
+0 0 2 Apr 13 11:36:08 2020
+Rule File Pathname: ./xControlFile
+m3.4: via2 must be enclosed by met3
+r_864_m3.6
+0 0 2 Apr 13 11:36:08 2020
+Rule File Pathname: ./xControlFile
+m3.6: 0.24 min. area of met3
+r_865_m3.3d
+0 0 2 Apr 13 11:36:09 2020
+Rule File Pathname: ./xControlFile
+m3.3d: 0.4 min. spacing between huge met3 and normal met3
+r_866_m3.3c
+0 0 2 Apr 13 11:36:09 2020
+Rule File Pathname: ./xControlFile
+m3.3c: 0.4 min. spacing/notch of huge met3+nearby met3
+r_867_via3.1
+0 0 2 Apr 13 11:36:09 2020
+Rule File Pathname: ./xControlFile
+via3.1: rectVIA3noMT should be rectangular
+r_868_via3.1
+0 0 2 Apr 13 11:36:09 2020
+Rule File Pathname: ./xControlFile
+via3.1: 0.2 min. width of rectVIA3noMT
+r_869_via3.1
+0 0 2 Apr 13 11:36:09 2020
+Rule File Pathname: ./xControlFile
+via3.1: 0.2 max. length of rectVIA3noMT
+r_870_via3.1a
+0 0 2 Apr 13 11:36:09 2020
+Rule File Pathname: ./xControlFile
+via3.1a: via size inside module cut must be 0.200 OR 0.800
+r_871_via3.2
+0 0 2 Apr 13 11:36:09 2020
+Rule File Pathname: ./xControlFile
+via3.2: 0.2 min. spacing/notch of via3
+r_872_via3.3
+0 0 2 Apr 13 11:36:09 2020
+Rule File Pathname: ./xControlFile
+via3.3: 0.2 min. width of ring-shaped via3
+r_873_via3.3
+0 0 2 Apr 13 11:36:09 2020
+Rule File Pathname: ./xControlFile
+via3.3: 0.205 max. width of ring-shaped via3
+r_874_via3.3
+0 0 2 Apr 13 11:36:09 2020
+Rule File Pathname: ./xControlFile
+via3.3: ring-shaped via3 must be enclosed by SEALID
+r_875_via3.4
+0 0 2 Apr 13 11:36:09 2020
+Rule File Pathname: ./xControlFile
+via3.4: 0.06 min. enclosure of non-ring via3 by met3
+r_876_via3.4
+0 0 2 Apr 13 11:36:09 2020
+Rule File Pathname: ./xControlFile
+via3.4: non-ring via3 must be enclosed by met3
+r_877_via3.5
+0 0 2 Apr 13 11:36:10 2020
+Rule File Pathname: ./xControlFile
+via3.5: 0.09 min. enclosure of adj. sides of via3 by met3
+r_878_m4.1
+0 0 2 Apr 13 11:36:10 2020
+Rule File Pathname: ./xControlFile
+m4.1: 0.3 min. width of met4
+r_879_m4.2
+0 0 2 Apr 13 11:36:10 2020
+Rule File Pathname: ./xControlFile
+m4.2: 0.3 min. spacing/notch of met4
+r_880_m4.3
+0 0 2 Apr 13 11:36:10 2020
+Rule File Pathname: ./xControlFile
+m4.3: 0.065 min. enclosure of via3 by met4
+r_881_m4.3
+0 0 2 Apr 13 11:36:10 2020
+Rule File Pathname: ./xControlFile
+m4.3: via3 must be enclosed by met4
+r_882_m4.4a
+0 0 2 Apr 13 11:36:10 2020
+Rule File Pathname: ./xControlFile
+m4.4a: 0.24 min. area of met4
+r_883_m4.5b
+0 0 2 Apr 13 11:36:10 2020
+Rule File Pathname: ./xControlFile
+m4.5b: 0.4 min. spacing between huge met4 and normal met4
+r_884_m4.5a
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+m4.5a: 0.4 min. spacing/notch of huge met4+nearby met4
+r_885_via4.1
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+via4.1: non-ring via4 should be rectangular
+r_886_via4.1
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+via4.1: 0.8 min. width of non-ring via4
+r_887_via4.1
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+via4.1: 0.8 max. length of non-ring via4
+r_888_via4.2
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+via4.2: 0.8 min. spacing/notch of via4
+r_889_via4.3
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+via4.3: 0.8 min. width of ring-shaped via4
+r_890_via4.3
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+via4.3: 0.805 max. width of ring-shaped via4
+r_891_via4.3
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+via4.3: ring-shaped via4 must be enclosed by SEALID
+r_892_via4.4
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+via4.4: 0.19 min. enclosure of non-ring via4 by met4
+r_893_via4.4
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+via4.4: non-ring via4 must be enclosed by met4
+r_894_m5.1
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+m5.1: 1.6 min. width of met5
+r_895_m5.2
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+m5.2: 1.6 min. spacing/notch of met5
+r_896_m5.3
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+m5.3: 0.31 min. enclosure of via4 by met5
+r_897_m5.3
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+m5.3: via4 must be enclosed by met5
+r_898_m5.4
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+m5.4: 4 min. area of met5
+r_899_pad.2
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+pad.2: 1.27 min. spacing/notch of pad
+r_900_pad.3
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+pad.3: hugepad with area less than 30000.0 not allowed
+r_901_denmos.1
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+denmos.1: 1.055 min. width of gate of Drain Extended nFET
+r_902_denmos.2
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+denmos.2: 0.28 min. width of deNFetSource not overlapping poly
+r_903_denmos.3
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+denmos.3: 0.925 min. width of deNFetSource overlapping poly
+r_904_denmos.4
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+denmos.4: 0.17 min. width of drain of Drain Extended nFET
+r_905_denmos.5
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+denmos.5: min/max extension between de_nFET_source over nwell 0.225
+r_906_denmos.6
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+denmos.6: min/max spacing between de_nFET_source and de_nFET_drain 1.585
+r_907_denmos.7
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+denmos.7: min channel width 5.000
+r_908_denmos.8
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+denmos.8: 90 degree angles are not permitted for nwell over poly
+r_909_denmos.10
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+denmos.10: 0.66 min. enclosure of drain of Drain Extended nFET by nwell
+r_910_denmos.11
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+denmos.11: 0.86 min. spacing of ptap & nwellOVRdeNFetDrain
+r_911_denmos.12
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+denmos.12: 2.4 min. spacing of nwellOVRdeNFetDrain
+r_912_denmos.13
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+denmos.13: 0.13 min. enclosure of source of Drain Extended nFET by nsdm
+r_913_denmos.13
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+denmos.13: source of Drain Extended nFET must be enclosed by nsdm
+r_915_depmos.1
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+depmos.1: 1.05 min. width of gate of Drain Extended pFET
+r_916_depmos.2
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+depmos.2: 0.28 min. width of dePFetSourceNotpoly
+r_917_depmos.3
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+depmos.3: 0.92 min. width of dePFetSource overlapping poly
+r_918_depmos.4
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+depmos.4: 0.17 min. width of drain of Drain Extended pFET
+r_919_depmos.5
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+depmos.5: min/max extension between de_pFET_source beyond nwell 0.260
+r_920_depmos.6
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+depmos.6: min/max spacing between de_pFET_source and de_pFET_drain 1.190
+r_921_depmos.7
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+depmos.7: min channel width 5.000
+r_922_depmos.8
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+depmos.8: 90 degree angles are not permitted for nwellhole over poly
+r_923_depmos.10
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+depmos.10: 0.86 min. enclosure of drain of Drain Extended pFET by nwellhole
+r_924_depmos.11
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+depmos.11: 0.66 min. spacing of ntap & dePFetDrainNwellhole
+r_925_depmos.12
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+depmos.12: 0.13 min. enclosure of source of Drain Extended pFET by psdm
+r_926_depmos.12
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+depmos.12: source of Drain Extended pFET must be enclosed by psdm
+r_927_depmos.13
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+depmos.13: pvhv_depmos13 must be enclosed by moduleCutAREA
+r_928_extd.1
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+extd.1: difftap must not straddle ENID
+r_929_extd.2
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+extd.2: diff tap must have two or three coincident edges with areaid.en if enclosed by areaid.en
+r_930_extd.3
+0 0 2 Apr 13 11:36:11 2020
+Rule File Pathname: ./xControlFile
+extd.3: deFetPoly must overlap polyGap
+r_928_uhvi.1
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+uhvi.1: difftap must not straddle uhvi
+r_929_uhvi.2
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+uhvi.2: poly must not straddle uhvi
+r_931_uhvi.3
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+uhvi.3: pwbmNotLOWVTID must be enclosed by uhvi
+r_928_uhvi.4
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+uhvi.4: dnwell must not straddle uhvi
+r_928_uhvi.5
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+uhvi.5: UHVI must enclose areaid.ext
+r_928_uhvi.6
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+uhvi.6: UHVI must enclose dnwell
+r_928_pwbm.1
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+pwbm.1: 0.84 min. width of pwbm
+r_929_pwbm.2
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+pwbm.2: 1.27 min. spacing/notch of pwbm inside uhvi
+r_923_pwbm.3
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+pwbm.3: 0 min. enclosure of dnwell and uhvi by pwbm hole
+r_923_pwbm.4
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+pwbm.4: dnwell_uhvi must be enclosed by pwbm_and_holes
+r_924_pwbm.5
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+pwbm.5: 0.84 min. spacing of pwbm_holes
+r_928_pwde.1
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+pwde.1: 0.84 min. width of pwde
+r_929_pwde.2
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+pwde.2: 1.27 min. spacing of pwde_uhvi
+r_923_pwde.3
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+pwde.3: 0 min. enclosure of pwde_uhvi and pwbm_uhvi
+r_923_pwde.4
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+pwde.4: pwde must be enclosed by uhvi
+r_923_pwde.5
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+pwde.5: pwde_uhvi must be enclosed by dnwell
+r_923_pwde.6
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+pwde.6: 1.00 min. enclosure of pwde_uhvi by dnwell_uhvi
+r_923_dnwell.3a
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+dnwell.3a: dnwell in UHVI on same net cannot be less than 2.5
+r_923_dnwell.3d
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+dnwell.3d: dnwell in UHVI on different nets cannot be less than 12.0
+r_924_dnwell.3b
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+dnwell.3b: 12.0 min. spacing of dnwell_uhvi and dnwell_outside_uhvi
+r_924_dnwell.3c
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+dnwell.3c: 9.5 min. spacing of dnwell_uhvi and nwell_outside_uhvi
+r_923_nwell.5a
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+nwell.5a: 0 min. enclosure of nwell_uhvi by dnwell_uhvi
+r_923_nwell.5b
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+nwell.5b: nwell outside of UHVI cannot be on the same net with nwell inside UHVI
+r_924_difftap.26
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+difftap.26: 0.5 min. spacing of pwbm and diffTap_nonUHVI
+r_396_ultv.3
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+ulvt.3: LOWVTID must not straddle uhvi
+r_931_pwres.1
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+pwres.1: pwres must be enclosed by DnwNoRing
+r_932_pwres.2
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+pwres.2: PwresDnw should be rectangular
+r_933_pwres.2
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+pwres.2: 2.65 min. width of PwresDnw
+r_934_pwres.2
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+pwres.2: 2.65 max. width of PwresDnw
+r_935_pwres.2
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+pwres.2: 26.5 min. length of PwresDnw
+r_936_pwres.2
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+pwres.2: 265 max. length of PwresDnw
+r_937_pwres.5
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+pwres.5: pwres Tap to nwell spacing must be 0.220
+r_938_pwres.6
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+pwres.6: 0.53 min. width of PwresTerm
+r_939_pwres.6
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+pwres.6: Exceeds allowed width of pwell res tap
+r_940_pwres.7a
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+pwres.7a: Tap in pwell must enclose 12 licon1
+r_941_pwres.7b
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+pwres.7b: Tap in pwell must enclose 12 mcon
+r_942_pwres.8a
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+pwres.8a: poly must not overlap PwresDnw
+r_943_pwres.8b
+0 0 2 Apr 13 11:36:12 2020
+Rule File Pathname: ./xControlFile
+pwres.8b: diff must not overlap PwresDnw
+r_944_pwres.9
+0 0 2 Apr 13 11:36:13 2020
+Rule File Pathname: ./xControlFile
+pwres.9: Nwell around pwell res must have strapped tap with metal
+r_945_pwres.11
+0 0 2 Apr 13 11:36:13 2020
+Rule File Pathname: ./xControlFile
+pwres.11: Pwell res must abut nwell edges on opposite sides
+r_946_pwres.10
+0 0 2 Apr 13 11:36:13 2020
+Rule File Pathname: ./xControlFile
+pwres.10: Pwell res must abut 2 pwres_terminal on opposite sides
+r_947_rfdiode.1
+0 0 2 Apr 13 11:36:13 2020
+Rule File Pathname: ./xControlFile
+rfdiode.1: non-manhattan RFDIODEID edge
+r_948_rfdiode.2
+0 0 2 Apr 13 11:36:13 2020
+Rule File Pathname: ./xControlFile
+rfdiode.2: areaid.re must be coincident with nwell for the rf nwell diode
+r_949_rfdiode.3
+0 0 2 Apr 13 11:36:13 2020
+Rule File Pathname: ./xControlFile
+rfdiode.3: areaid.re must be coincident with inner nwell ring edge for rf pwell-deep nwell diode
+r_950_nsm.1
+0 0 2 Apr 13 11:36:13 2020
+Rule File Pathname: ./xControlFile
+nsm.1: 3 min. width of nsm
+r_951_nsm.2
+0 0 2 Apr 13 11:36:13 2020
+Rule File Pathname: ./xControlFile
+nsm.2: 4 min. spacing/notch of nsm
+r_952_nsm.3
+0 0 2 Apr 13 11:36:13 2020
+Rule File Pathname: ./xControlFile
+nsm.3: 1 min. spacing of diff_not_NSM3_exempt & nsm OR NSMmk
+r_953_nsm.3
+0 0 2 Apr 13 11:36:13 2020
+Rule File Pathname: ./xControlFile
+nsm.3: diff_not_NSM3_exempt must not overlap nsm OR NSMmk
+r_954_nsm.3
+0 0 2 Apr 13 11:36:13 2020
+Rule File Pathname: ./xControlFile
+nsm.3: 1 min. spacing of tap_not_NSM3_exempt & nsm OR NSMmk
+r_955_nsm.3
+0 0 2 Apr 13 11:36:13 2020
+Rule File Pathname: ./xControlFile
+nsm.3: tap_not_NSM3_exempt must not overlap nsm OR NSMmk
+r_956_nsm.3
+0 0 2 Apr 13 11:36:13 2020
+Rule File Pathname: ./xControlFile
+nsm.3: 1 min. spacing of fomDummyDRC_not_NSM3_exempt & nsm OR NSMmk
+r_957_nsm.3
+0 0 2 Apr 13 11:36:13 2020
+Rule File Pathname: ./xControlFile
+nsm.3: fomDummyDRC_not_NSM3_exempt must not overlap nsm OR NSMmk
+r_958_nsm.3
+0 0 2 Apr 13 11:36:13 2020
+Rule File Pathname: ./xControlFile
+nsm.3: 1 min. spacing of FOMmk_not_NSM3_exempt & nsm OR NSMmk
+r_959_nsm.3
+1 1 2 Apr 13 11:36:13 2020
+Rule File Pathname: ./xControlFile
+nsm.3: FOMmk_not_NSM3_exempt must not overlap nsm OR NSMmk
+p 1 12
+CN mM_seal_ring_corner c 1 0 0 1 0 0
+1800 2750
+2750 2750
+2750 1800
+3250 1800
+3250 2750
+4200 2750
+4200 3250
+3250 3250
+3250 4200
+2750 4200
+2750 3250
+1800 3250
+r_960_nsm.3
+0 0 2 Apr 13 11:36:13 2020
+Rule File Pathname: ./xControlFile
+nsm.3: 1 min. spacing of poly_not_NSM3_exempt & nsm OR NSMmk
+r_961_nsm.3
+0 0 2 Apr 13 11:36:13 2020
+Rule File Pathname: ./xControlFile
+nsm.3: poly_not_NSM3_exempt must not overlap nsm OR NSMmk
+r_962_nsm.3
+0 0 2 Apr 13 11:36:13 2020
+Rule File Pathname: ./xControlFile
+nsm.3: 1 min. spacing of P1Mmk_not_NSM3_exempt & nsm OR NSMmk
+r_963_nsm.3
+1 1 2 Apr 13 11:36:13 2020
+Rule File Pathname: ./xControlFile
+nsm.3: P1Mmk_not_NSM3_exempt must not overlap nsm OR NSMmk
+p 1 12
+CN mM_seal_ring_corner c 1 0 0 1 0 0
+1800 2750
+2750 2750
+2750 1800
+3250 1800
+3250 2750
+4200 2750
+4200 3250
+3250 3250
+3250 4200
+2750 4200
+2750 3250
+1800 3250
+r_964_nsm.3
+0 0 2 Apr 13 11:36:13 2020
+Rule File Pathname: ./xControlFile
+nsm.3: 1 min. spacing of li1_not_NSM3_exempt & nsm OR NSMmk
+r_965_nsm.3
+0 0 2 Apr 13 11:36:13 2020
+Rule File Pathname: ./xControlFile
+nsm.3: li1_not_NSM3_exempt must not overlap nsm OR NSMmk
+r_966_nsm.3
+0 0 2 Apr 13 11:36:13 2020
+Rule File Pathname: ./xControlFile
+nsm.3: 1 min. spacing of LI1Mmk_not_NSM3_exempt & nsm OR NSMmk
+r_967_nsm.3
+1 1 2 Apr 13 11:36:13 2020
+Rule File Pathname: ./xControlFile
+nsm.3: LI1Mmk_not_NSM3_exempt must not overlap nsm OR NSMmk
+p 1 12
+CN mM_seal_ring_corner c 1 0 0 1 0 0
+1800 2750
+2750 2750
+2750 1800
+3250 1800
+3250 2750
+4200 2750
+4200 3250
+3250 3250
+3250 4200
+2750 4200
+2750 3250
+1800 3250
+r_968_nsm.3
+0 0 2 Apr 13 11:36:14 2020
+Rule File Pathname: ./xControlFile
+nsm.3: 1 min. spacing of met1_not_NSM3_exempt & nsm OR NSMmk
+r_969_nsm.3
+0 0 2 Apr 13 11:36:14 2020
+Rule File Pathname: ./xControlFile
+nsm.3: met1_not_NSM3_exempt must not overlap nsm OR NSMmk
+r_970_nsm.3
+0 0 2 Apr 13 11:36:14 2020
+Rule File Pathname: ./xControlFile
+nsm.3: 1 min. spacing of MM1mk_not_NSM3_exempt & nsm OR NSMmk
+r_971_nsm.3
+1 1 2 Apr 13 11:36:14 2020
+Rule File Pathname: ./xControlFile
+nsm.3: MM1mk_not_NSM3_exempt must not overlap nsm OR NSMmk
+p 1 12
+CN mM_seal_ring_corner c 1 0 0 1 0 0
+1800 2750
+2750 2750
+2750 1800
+3250 1800
+3250 2750
+4200 2750
+4200 3250
+3250 3250
+3250 4200
+2750 4200
+2750 3250
+1800 3250
+r_972_nsm.3
+0 0 2 Apr 13 11:36:14 2020
+Rule File Pathname: ./xControlFile
+nsm.3: 1 min. spacing of met2_not_NSM3_exempt & nsm OR NSMmk
+r_973_nsm.3
+0 0 2 Apr 13 11:36:14 2020
+Rule File Pathname: ./xControlFile
+nsm.3: met2_not_NSM3_exempt must not overlap nsm OR NSMmk
+r_974_nsm.3
+0 0 2 Apr 13 11:36:14 2020
+Rule File Pathname: ./xControlFile
+nsm.3: 1 min. spacing of MM2Mk_not_NSM3_exempt & nsm OR NSMmk
+r_975_nsm.3
+1 1 2 Apr 13 11:36:14 2020
+Rule File Pathname: ./xControlFile
+nsm.3: MM2Mk_not_NSM3_exempt must not overlap nsm OR NSMmk
+p 1 12
+CN mM_seal_ring_corner c 1 0 0 1 0 0
+1800 2750
+2750 2750
+2750 1800
+3250 1800
+3250 2750
+4200 2750
+4200 3250
+3250 3250
+3250 4200
+2750 4200
+2750 3250
+1800 3250
+r_976_nsm.3
+0 0 2 Apr 13 11:36:14 2020
+Rule File Pathname: ./xControlFile
+nsm.3: 1 min. spacing of met3_not_NSM3_exempt & nsm OR NSMmk
+r_977_nsm.3
+0 0 2 Apr 13 11:36:14 2020
+Rule File Pathname: ./xControlFile
+nsm.3: met3_not_NSM3_exempt must not overlap nsm OR NSMmk
+r_978_nsm.3
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3: 1 min. spacing of MM3mk_not_NSM3_exempt & nsm OR NSMmk
+r_979_nsm.3
+1 1 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3: MM3mk_not_NSM3_exempt must not overlap nsm OR NSMmk
+p 1 12
+CN mM_seal_ring_corner c 1 0 0 1 0 0
+1800 2750
+2750 2750
+2750 1800
+3250 1800
+3250 2750
+4200 2750
+4200 3250
+3250 3250
+3250 4200
+2750 4200
+2750 3250
+1800 3250
+r_980_nsm.3
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3: 1 min. spacing of met4_not_NSM3_exempt & nsm OR NSMmk
+r_981_nsm.3
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3: met4_not_NSM3_exempt must not overlap nsm OR NSMmk
+r_982_nsm.3
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3: 1 min. spacing of MM4mk_not_NSM3_exempt & nsm OR NSMmk
+r_983_nsm.3
+1 1 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3: MM4mk_not_NSM3_exempt must not overlap nsm OR NSMmk
+p 1 12
+CN mM_seal_ring_corner c 1 0 0 1 0 0
+1800 2750
+2750 2750
+2750 1800
+3250 1800
+3250 2750
+4200 2750
+4200 3250
+3250 3250
+3250 4200
+2750 4200
+2750 3250
+1800 3250
+r_984_nsm.3
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3: 1 min. spacing of met5_not_NSM3_exempt & nsm OR NSMmk
+r_985_nsm.3
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3: met5_not_NSM3_exempt must not overlap nsm OR NSMmk
+r_986_nsm.3
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3: 1 min. spacing of MM5mk_not_NSM3_exempt & nsm OR NSMmk
+r_987_nsm.3
+1 1 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3: MM5mk_not_NSM3_exempt must not overlap nsm OR NSMmk
+p 1 12
+CN mM_seal_ring_corner c 1 0 0 1 0 0
+1800 2750
+2750 2750
+2750 1800
+3250 1800
+3250 2750
+4200 2750
+4200 3250
+3250 3250
+3250 4200
+2750 4200
+2750 3250
+1800 3250
+r_988_nsm.3a
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3a: 3 min. enclosure of diff_not_NSM3a_exempt by frameBndr
+r_989_nsm.3a
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3a: 3 min. enclosure of tap_not_NSM3a_exempt by frameBndr
+r_990_nsm.3a
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3a: 3 min. enclosure of fomDummyDRC_not_NSM3a_exempt by frameBndr
+r_991_nsm.3a
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3a: 3 min. enclosure of FOMmk_not_NSM3a_exempt by frameBndr
+r_992_nsm.3a
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3a: 3 min. enclosure of poly_not_NSM3a_exempt by frameBndr
+r_993_nsm.3a
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3a: 3 min. enclosure of P1Mmk_not_NSM3a_exempt by frameBndr
+r_994_nsm.3a
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3a: 3 min. enclosure of li1_not_NSM3a_exempt by frameBndr
+r_995_nsm.3a
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3a: 3 min. enclosure of LI1Mmk_not_NSM3a_exempt by frameBndr
+r_996_nsm.3a
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3a: 3 min. enclosure of met1_not_NSM3a_exempt by frameBndr
+r_997_nsm.3a
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3a: 3 min. enclosure of MM1mk_not_NSM3a_exempt by frameBndr
+r_998_nsm.3a
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3a: 3 min. enclosure of met2_not_NSM3a_exempt by frameBndr
+r_999_nsm.3a
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3a: 3 min. enclosure of MM2Mk_not_NSM3a_exempt by frameBndr
+r_1000_nsm.3a
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3a: 3 min. enclosure of met3_not_NSM3a_exempt by frameBndr
+r_1001_nsm.3a
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3a: 3 min. enclosure of MM3mk_not_NSM3a_exempt by frameBndr
+r_1002_nsm.3a
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3a: 3 min. enclosure of met4_not_NSM3a_exempt by frameBndr
+r_1003_nsm.3a
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3a: 3 min. enclosure of MM4mk_not_NSM3a_exempt by frameBndr
+r_1004_nsm.3a
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3a: 3 min. enclosure of met5_not_NSM3a_exempt by frameBndr
+r_1005_nsm.3a
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3a: 3 min. enclosure of MM5mk_not_NSM3a_exempt by frameBndr
+r_1006_nsm.3b
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3b: 3 min. spacing of diff_not_NSM3b_exempt & dieCut
+r_1007_nsm.3b
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3b: 3 min. spacing of tap_not_NSM3b_exempt & dieCut
+r_1008_nsm.3b
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3b: 3 min. spacing of fomDummyDRC_not_NSM3b_exempt & dieCut
+r_1009_nsm.3b
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3b: 3 min. spacing of FOMmk_not_NSM3b_exempt & dieCut
+r_1010_nsm.3b
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3b: 3 min. spacing of poly_not_NSM3b_exempt & dieCut
+r_1011_nsm.3b
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3b: 3 min. spacing of P1Mmk_not_NSM3b_exempt & dieCut
+r_1012_nsm.3b
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3b: 3 min. spacing of li1_not_NSM3b_exempt & dieCut
+r_1013_nsm.3b
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3b: 3 min. spacing of LI1Mmk_not_NSM3b_exempt & dieCut
+r_1014_nsm.3b
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3b: 3 min. spacing of met1_not_NSM3b_exempt & dieCut
+r_1015_nsm.3b
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3b: 3 min. spacing of MM1mk_not_NSM3b_exempt & dieCut
+r_1016_nsm.3b
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3b: 3 min. spacing of met2_not_NSM3b_exempt & dieCut
+r_1017_nsm.3b
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3b: 3 min. spacing of MM2Mk_not_NSM3b_exempt & dieCut
+r_1018_nsm.3b
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3b: 3 min. spacing of met3_not_NSM3b_exempt & dieCut
+r_1019_nsm.3b
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3b: 3 min. spacing of MM3mk_not_NSM3b_exempt & dieCut
+r_1020_nsm.3b
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3b: 3 min. spacing of met4_not_NSM3b_exempt & dieCut
+r_1021_nsm.3b
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3b: 3 min. spacing of MM4mk_not_NSM3b_exempt & dieCut
+r_1022_nsm.3b
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3b: 3 min. spacing of met5_not_NSM3b_exempt & dieCut
+r_1023_nsm.3b
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+nsm.3b: 3 min. spacing of MM5mk_not_NSM3b_exempt & dieCut
+r_1024_ncm.X.3
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+ncm.X.3: ncm_CORE not tech_CD must not overlap "ndiff" in periphery
+r_1025_ncm.1
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+ncm.1: 0.38 min. width of ncmPeri
+r_1026_ncm.2a
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+ncm.2a: 0.38 min. spacing/notch of ncmPeri
+r_1027_ncm.7
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+ncm.7: 0.265 min. area of ncm
+r_1028_ncm.8
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+ncm.8: 0.265 min. area of ncmHoles
+r_1029_ncm.c8
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+ncm.c8: 0.235 min. enclosure of PDIFF by ncm_CORE not tech_CD
+r_1030_ncm.c9
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+ncm.c9: 0.235 min. spacing of ncm_CORE not tech_CD & ndiff
+r_1031_ncm.c9
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+ncm.c9: ncm_CORE not tech_CD must not overlap ndiff
+r_1032_ncm.c10
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+ncm.c10: 0.38 min. spacing of nwellOutCore & ncm_CORE not tech_CD
+r_1033_ldntm.c1
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+ldntm.c1: 0.7 min. width of ldntmCore
+r_1034_ldntm.c2
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+ldntm.c2: 0.7 min. spacing/notch of ldntmCore
+r_1035_ldntm.c3
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+ldntm.c3: enclosure of ndiff by ldntm must be more than 0.180
+r_1036_ldntm.c4
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+ldntm.c4: 0.125 min. enclosure of nFet by ldntmCore
+r_1037_ldntm.c5
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+ldntm.c5: ldntm not allowed outside areaid.ce
+r_1038_ldntm.c6
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+ldntm.c6: 0.18 min. spacing of ldntmCoreExempt & pdiff
+r_1039_rpm.1a
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+rpm.1a: 1.27 min. width of rpm
+r_1039_urpm.1a
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+urpm.1a: 1.27 min. width of urpm
+r_1046_rpm.2
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+rpm.2: 0.84 min. spacing/notch of rpm
+r_1046_urpm.2
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+urpm.2: 0.84 min. spacing/notch of urpm
+r_1047_rpm.3
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+rpm.3: 0.2 min. enclosure of precResistor by rpm
+r_1047_urpm.3
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+urpm.3: 0.2 min. enclosure of precResistor by rpm
+r_1048_rpm.3
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+rpm.3: precResistor must be enclosed by rpm
+r_1049_rpm.4
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+rpm.4: 0.11 min. enclosure of precResistor by psdm
+r_1050_rpm.4
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+rpm.4: precResistor must be enclosed by psdm
+r_1051_rpm.5
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+rpm.5: 0.095 min. enclosure of precResistor by npc
+r_1052_rpm.5
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+rpm.5: precResistor must be enclosed by npc
+r_1053_rpm.6
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+rpm.6: 0.2 min. spacing of rpm & nsdm
+r_1054_rpm.6
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+rpm.6: rpm must not overlap nsdm
+r_1055_rpm.7
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+rpm.7: 0.2 min. spacing of rpm & poly
+r_1056_rpm.8
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+rpm.8: poly must not straddle rpm
+r_1057_rpm.9
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+rpm.9: 0.185 min. spacing of precResistor & hvntm
+r_1058_rpm.9
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+rpm.9: precResistor must not overlap hvntm
+r_1059_rpm.10
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+rpm.10: 2 min. spacing of rpmNotXmt & pwbm
+r_1060_rpm.10
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+rpm.10: rpmNotXmt must not overlap pwbm
+r_1061_hvntm.X.1
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+hvntm.X.1: hvntm must be drawn inside hvi
+r_1062_hvntm.1
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+hvntm.1: 0.7 min. width of hvntm_peri
+r_1063_hvntm.2
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+hvntm.2: 0.7 min. spacing/notch of hvntm_peri
+r_1064_hvntm.3
+0 0 2 Apr 13 11:36:15 2020
+Rule File Pathname: ./xControlFile
+hvntm.3: 0.185 min. enclosure of ndiffInHviPeri by hvntm_peri
+r_1065_hvntm.4
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+hvntm.4: 0.185 min. spacing of hvntm_peri & ndiffOutsideHvi
+r_1066_hvntm.4
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+hvntm.4: hvntm_peri must not overlap ndiffOutsideHvi
+r_1067_hvntm.5
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+hvntm.5: 0.185 min. spacing of hvntm_peri & PDIFF_notENID
+r_1068_hvntm.5
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+hvntm.5: hvntm_peri must not overlap PDIFF_notENID
+r_1069_hvntm.6a
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+hvntm.6a: 0.185 min. spacing of hvntm_peri & PTAPnoButtDiff
+r_1070_hvntm.6a
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+hvntm.6a: hvntm_peri must not overlap ptap
+r_1071_hvntm.6b
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+hvntm.6b: hvntm_peri must not overlap diffpTapButtEdge_sz
+r_1072_hvntm.7
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+hvntm.7: 0 min. enclosure of ESD_nwell_tap_hvi by hvntm_peri
+r_1073_hvntm.7
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+hvntm.7: ESD_nwell_tap_hvi must be enclosed by hvntm_peri
+r_1074_hvntm.9
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+hvntm.9: hvntm must not overlap COREID
+r_1075_hvntm.10
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+hvntm.10: hvntm must overlap hvi
+r_1076_cfom_nikon
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+cfom_nikon: FOMmk in the nikon cross has the wrong polarity
+r_1077_cfom_nikon
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+cfom_nikon: FOMmk is missing from the nikon cross in the layout.
+r_1078_cdnm_nikon
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+cdnm_nikon: DNMmk in the nikon cross has the wrong polarity
+r_1079_cdnm_nikon
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+cdnm_nikon: DNMmk is missing from the nikon cross in the layout.
+r_1080_cnwm_nikon
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+cnwm_nikon: NWMmk in the nikon cross has the wrong polarity
+r_1081_cnwm_nikon
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+cnwm_nikon: NWMmk is missing from the nikon cross in the layout.
+r_1082_chvtpm_nikon
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+chvtpm_nikon: HVTPMmk in the nikon cross has the wrong polarity
+r_1083_chvtpm_nikon
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+chvtpm_nikon: HVTPMmk is missing from the nikon cross in the layout.
+r_1084_clvtnm_nikon
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+clvtnm_nikon: LVTNMmk in the nikon cross has the wrong polarity
+r_1085_clvtnm_nikon
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+clvtnm_nikon: LVTNMmk is missing from the nikon cross in the layout.
+r_1086_clvom_nikon
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+clvom_nikon: LVOMmk in the nikon cross has the wrong polarity
+r_1087_clvom_nikon
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+clvom_nikon: LVOMmk is missing from the nikon cross in the layout.
+r_1088_cp1m_nikon
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+cp1m_nikon: P1Mmk in the nikon cross has the wrong polarity
+r_1089_cp1m_nikon
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+cp1m_nikon: P1Mmk is missing from the nikon cross in the layout.
+r_1090_cntm_nikon
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+cntm_nikon: NTMmk in the nikon cross has the wrong polarity
+r_1091_cntm_nikon
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+cntm_nikon: NTMmk is missing from the nikon cross in the layout.
+r_1092_chvntm_nikon
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+chvntm_nikon: HVNTMmk in the nikon cross has the wrong polarity
+r_1093_chvntm_nikon
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+chvntm_nikon: HVNTMmk is missing from the nikon cross in the layout.
+r_1094_cldntm_nikon
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+cldntm_nikon: LDNTMmk in the nikon cross has the wrong polarity
+r_1095_cldntm_nikon
+0 0 2 Apr 13 11:36:16 2020
+Rule File Pathname: ./xControlFile
+cldntm_nikon: LDNTMmk is missing from the nikon cross in the layout.
+r_1096_cnpc_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cnpc_nikon: NPCMmk in the nikon cross has the wrong polarity
+r_1097_cnpc_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cnpc_nikon: NPCMmk is missing from the nikon cross in the layout.
+r_1098_cnsdm_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cnsdm_nikon: NSDMmk in the nikon cross has the wrong polarity
+r_1099_cnsdm_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cnsdm_nikon: NSDMmk is missing from the nikon cross in the layout.
+r_1100_cpsdm_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cpsdm_nikon: PSDMmk in the nikon cross has the wrong polarity
+r_1101_cpsdm_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cpsdm_nikon: PSDMmk is missing from the nikon cross in the layout.
+r_1102_clicm1_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+clicm1_nikon: LICM1mk in the nikon cross has the wrong polarity
+r_1103_clicm1_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+clicm1_nikon: LICM1mk is missing from the nikon cross in the layout.
+r_1104_cli1m_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cli1m_nikon: LI1Mmk in the nikon cross has the wrong polarity
+r_1105_cli1m_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cli1m_nikon: LI1Mmk is missing from the nikon cross in the layout.
+r_1106_cctm1_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cctm1_nikon: CTM1mk in the nikon cross has the wrong polarity
+r_1107_cctm1_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cctm1_nikon: CTM1mk is missing from the nikon cross in the layout.
+r_1108_cmm1_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cmm1_nikon: MM1mk in the nikon cross has the wrong polarity
+r_1109_cmm1_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cmm1_nikon: MM1mk is missing from the nikon cross in the layout.
+r_1110_cviam_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cviam_nikon: VIMmk in the nikon cross has the wrong polarity
+r_1111_cviam_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cviam_nikon: VIMmk is missing from the nikon cross in the layout.
+r_1112_cmm2_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cmm2_nikon: MM2mk in the nikon cross has the wrong polarity
+r_1113_cmm2_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cmm2_nikon: MM2mk is missing from the nikon cross in the layout.
+r_1114_cnsm_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cnsm_nikon: NSMmk in the nikon cross has the wrong polarity
+r_1115_cnsm_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cnsm_nikon: NSMmk is missing from the nikon cross in the layout.
+r_1116_cpdm_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cpdm_nikon: PDMmk in the nikon cross has the wrong polarity
+r_1117_cpdm_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cpdm_nikon: PDMmk is missing from the nikon cross in the layout.
+r_1118_cviam2_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cviam2_nikon: VIM2mk in the nikon cross has the wrong polarity
+r_1119_cviam2_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cviam2_nikon: VIM2mk is missing from the nikon cross in the layout.
+r_1120_cmm3_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cmm3_nikon: MM3mk in the nikon cross has the wrong polarity
+r_1121_cmm3_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cmm3_nikon: MM3mk is missing from the nikon cross in the layout.
+r_1122_cviam3_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cviam3_nikon: VIM3mk in the nikon cross has the wrong polarity
+r_1123_cviam3_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cviam3_nikon: VIM3mk is missing from the nikon cross in the layout.
+r_1124_cmm4_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cmm4_nikon: MM4mk in the nikon cross has the wrong polarity
+r_1125_cmm4_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cmm4_nikon: MM4mk is missing from the nikon cross in the layout.
+r_1126_cviam4_nikon
+0 0 2 Apr 13 11:36:17 2020
+Rule File Pathname: ./xControlFile
+cviam4_nikon: VIM4mk in the nikon cross has the wrong polarity
+r_1127_cviam4_nikon
+0 0 2 Apr 13 11:36:18 2020
+Rule File Pathname: ./xControlFile
+cviam4_nikon: VIM4mk is missing from the nikon cross in the layout.
+r_1128_cmm5_nikon
+0 0 2 Apr 13 11:36:18 2020
+Rule File Pathname: ./xControlFile
+cmm5_nikon: MM5mk in the nikon cross has the wrong polarity
+r_1129_cmm5_nikon
+0 0 2 Apr 13 11:36:18 2020
+Rule File Pathname: ./xControlFile
+cmm5_nikon: MM5mk is missing from the nikon cross in the layout.
+r_1130_crpm_nikon
+0 0 2 Apr 13 11:36:18 2020
+Rule File Pathname: ./xControlFile
+crpm_nikon: RPMmk in the nikon cross has the wrong polarity
+r_1131_crpm_nikon
+0 0 2 Apr 13 11:36:18 2020
+Rule File Pathname: ./xControlFile
+crpm_nikon: RPMmk is missing from the nikon cross in the layout.
+r_1132_areaid.1
+0 0 2 Apr 13 11:36:18 2020
+Rule File Pathname: ./xControlFile
+areaid.1: Unapproved cells contain areaid.ce layer
+r_1133_vpp.5
+0 0 2 Apr 13 11:36:20 2020
+Rule File Pathname: ./xControlFile
+vpp.5: 1.5 min spacing of (li1, poly, or met1/2) overlapping cap.dg to other li1
+r_1134_vpp.5
+0 0 2 Apr 13 11:36:20 2020
+Rule File Pathname: ./xControlFile
+vpp.5: 1.5 min spacing of (li1, poly, or met1/2) overlapping cap.dg to other poly
+r_1135_vpp.5
+0 0 2 Apr 13 11:36:21 2020
+Rule File Pathname: ./xControlFile
+vpp.5: 1.5 min spacing of (li1, poly, or met1/2) overlapping cap.dg to other met1
+r_1136_vpp.5
+0 0 2 Apr 13 11:36:22 2020
+Rule File Pathname: ./xControlFile
+vpp.5: 1.5 min spacing of (li1, poly, or met1/2) overlapping cap.dg to other met2
+r_1137_vpp.5a
+0 0 2 Apr 13 11:36:22 2020
+Rule File Pathname: ./xControlFile
+vpp.5a: 0.25 max PD ratio of met3.dg to capacitor.dg
+r_1138_vpp.5b
+0 0 2 Apr 13 11:36:22 2020
+Rule File Pathname: ./xControlFile
+vpp.5b: 0.3 max PD ratio of met4.dg to capacitor.dg
+r_1139_vpp.5c
+0 0 2 Apr 13 11:36:22 2020
+Rule File Pathname: ./xControlFile
+vpp.5c: 0.4 max PD ratio of met5.dg to capacitor.dg
+r_1140_vpp.10
+0 0 2 Apr 13 11:36:22 2020
+Rule File Pathname: ./xControlFile
+vpp.10: capacitors are not allow to overlap
+r_1141_vpp.11
+0 0 2 Apr 13 11:36:22 2020
+Rule File Pathname: ./xControlFile
+vpp.11: 0.87 Minimum vpp_over_MOSCAP density over related gate
+r_1142_vpp.12a
+0 0 2 Apr 13 11:36:23 2020
+Rule File Pathname: ./xControlFile
+vpp.12a: capacitor in s8rf2_xcmvpp8p6x7p9_m3_lim5shield must overlap only 9.0 met4 2.01x2.01 polygons
+r_1143_vpp.12b
+0 0 2 Apr 13 11:36:23 2020
+Rule File Pathname: ./xControlFile
+vpp.12b: capacitor in s8rf2_xcmvpp11p5x11p7_m3_lim5shield must overlap only 16.0 met4 2.01x2.01 polygons
+r_1144_vpp.12c
+0 0 2 Apr 13 11:36:23 2020
+Rule File Pathname: ./xControlFile
+vpp.12c: capacitor in s8rf2_xcmvpp4p4x4p6_m3_lim5shield must overlap only 4.0 met4 1.5x1.5 polygons
+r_1145_vpp.1
+0 0 2 Apr 13 11:36:23 2020
+Rule File Pathname: ./xControlFile
+vpp.1: 1.43 min. width of capacitor
+r_1146_vpp.1b
+0 0 2 Apr 13 11:36:23 2020
+Rule File Pathname: ./xControlFile
+vpp.1b: 11.35 max. width of vpp_1b_err
+r_1147_vpp.1c
+0 0 2 Apr 13 11:36:23 2020
+Rule File Pathname: ./xControlFile
+vpp.1c: vppM3shieldA should be rectangular
+r_1148_vpp.1c
+0 0 2 Apr 13 11:36:23 2020
+Rule File Pathname: ./xControlFile
+vpp.1c: 3.88 min. width of vppM3shieldA
+r_1149_vpp.1c
+0 0 2 Apr 13 11:36:23 2020
+Rule File Pathname: ./xControlFile
+vpp.1c: 3.88 max. length of vppM3shieldA
+r_1150_vpp.3
+0 0 4 Apr 13 11:36:23 2020
+Rule File Pathname: ./xControlFile
+vpp.3: vpp3NotXmt must not overlap poly
+vpp.3: vpp3NotXmt must not overlap diff
+vpp.3: vpp3NotXmt must not overlap tap
+r_1151_vpp.4
+0 0 2 Apr 13 11:36:23 2020
+Rule File Pathname: ./xControlFile
+vpp.4: capacitor must not straddle nwell
+r_1152_vpp.4
+0 0 2 Apr 13 11:36:23 2020
+Rule File Pathname: ./xControlFile
+vpp.4: capacitor must not straddle dnwell
+r_1153_vpp.8
+0 0 2 Apr 13 11:36:23 2020
+Rule File Pathname: ./xControlFile
+vpp.8: 1.5 min. enclosure of capacitor by nwell
+r_1154_vpp.9
+0 0 2 Apr 13 11:36:23 2020
+Rule File Pathname: ./xControlFile
+vpp.9: 1.5 min. spacing of capacitor & nwell
+r_1155_vhvi.vhv.5
+0 0 2 Apr 13 11:36:31 2020
+Rule File Pathname: ./xControlFile
+vhvi.vhv.5: diffusion not in drain-extended devices must not be connected to VHVSrcDrn
+r_1156_vhvi.1
+0 0 2 Apr 13 11:36:31 2020
+Rule File Pathname: ./xControlFile
+vhvi.1: 0.02 min. width of vhvi
+r_1157_vhvi.2
+0 0 2 Apr 13 11:36:31 2020
+Rule File Pathname: ./xControlFile
+vhvi.2: vhvi must not overlap areaid.ce
+r_1158_vhvi.3
+0 0 2 Apr 13 11:36:31 2020
+Rule File Pathname: ./xControlFile
+vhvi.3: VHVGate must overlap hvi
+r_1159_vhvi.4
+0 0 2 Apr 13 11:36:31 2020
+Rule File Pathname: ./xControlFile
+vhvi.4: poly connected to same net as VHVsourcedrain must be tagged by vhvi
+r_1160_vhvi.5
+0 0 2 Apr 13 11:36:31 2020
+Rule File Pathname: ./xControlFile
+vhvi.5: vhvi must not straddle VHVSrcDrn
+r_1161_vhvi.6
+0 0 2 Apr 13 11:36:31 2020
+Rule File Pathname: ./xControlFile
+vhvi.6: vhvi overlapping VHVSrcDrn must not overlap poly
+r_1162_vhvi.7
+0 0 2 Apr 13 11:36:31 2020
+Rule File Pathname: ./xControlFile
+vhvi.7: vhvi must not straddle VHVPoly
+r_1163_vhvi.8
+0 0 2 Apr 13 11:36:31 2020
+Rule File Pathname: ./xControlFile
+vhvi.8: 11.24 min. spacing of VHVnwell & VHVnwellNoConn
+r_1164_hv.diff.1a
+0 0 2 Apr 13 11:36:39 2020
+Rule File Pathname: ./xControlFile
+hv.diff.1a: Min space between hv_srcdrn and hv_srcdrn/diff for edges not butting tap is 0.3
+r_1165_hv.diff.1b
+0 0 2 Apr 13 11:36:39 2020
+Rule File Pathname: ./xControlFile
+hv.diff.1b: 0.3 min. spacing of diffResButtHV & diff
+r_1166_hv.diff.1b
+0 0 2 Apr 13 11:36:39 2020
+Rule File Pathname: ./xControlFile
+hv.diff.1b: 0.3 min. spacing of diffDiodeHV & diff
+r_1167_hv.diff.2
+0 0 2 Apr 13 11:36:39 2020
+Rule File Pathname: ./xControlFile
+hv.diff.2: 0.43 min. spacing of nwellConHVdiff & ndiff (not for source of drain extended device)
+r_1168_hv.diff.3a
+0 0 2 Apr 13 11:36:39 2020
+Rule File Pathname: ./xControlFile
+hv.diff.3a: 0.55 min. spacing of HVnSrcDrn & nwell
+r_1169_hv.diff.3b
+0 0 2 Apr 13 11:36:39 2020
+Rule File Pathname: ./xControlFile
+hv.diff.3b: 0.55 min. spacing of diffResButtHV & nwell
+r_1170_hv.diff.3b
+0 0 2 Apr 13 11:36:39 2020
+Rule File Pathname: ./xControlFile
+hv.diff.3b: 0.55 min. spacing of diffDiodeHV & nwell
+r_1171_hv.poly.1
+0 0 2 Apr 13 11:36:39 2020
+Rule File Pathname: ./xControlFile
+hv.poly.1: hv poly can be drawn over only one diff
+r_1172_hv.poly.1
+0 0 2 Apr 13 11:36:39 2020
+Rule File Pathname: ./xControlFile
+hv.poly.1: hvPolyExmpt must not straddle nwell
+r_1173_hv.poly.1
+0 0 2 Apr 13 11:36:39 2020
+Rule File Pathname: ./xControlFile
+hv.poly.1: hvpoly cannot cross nwell boundary (except nwell hole edge
+r_1174_hv.poly.2
+0 0 2 Apr 13 11:36:39 2020
+Rule File Pathname: ./xControlFile
+hv.poly.2: 0.3 min. spacing of hvPolyExmpt & unrelDiff
+r_1175_hv.poly.3
+0 0 2 Apr 13 11:36:39 2020
+Rule File Pathname: ./xControlFile
+hv.poly.3: 0.55 min. spacing of hvPolyExmpt2 & nwell
+r_1176_hv.poly.4
+0 0 2 Apr 13 11:36:39 2020
+Rule File Pathname: ./xControlFile
+hv.poly.4: 0.3 min. enclosure of hvPolyExmpt2 by nwell
+r_1177_hv.poly.6a
+0 0 2 Apr 13 11:36:39 2020
+Rule File Pathname: ./xControlFile
+hv.poly.6a: 0.16 min extension of poly beyond hv gate is
+r_1178_hv.poly.6b
+0 0 2 Apr 13 11:36:39 2020
+Rule File Pathname: ./xControlFile
+hv.poly.6b: 0.16 min extension of hvpoly beyond gate
+r_1179_X.22
+0 0 2 Apr 13 11:37:01 2020
+Rule File Pathname: ./xControlFile
+X.22: Floating poly_float or poly_tie text not over poly
+r_1180_X.22
+0 0 2 Apr 13 11:37:01 2020
+Rule File Pathname: ./xControlFile
+X.22: poly marked with poly_float not floating
+r_1181_X.22
+0 0 2 Apr 13 11:37:01 2020
+Rule File Pathname: ./xControlFile
+X.22: Nets on poly is floating
+r_1182_X.22
+0 0 2 Apr 13 11:37:01 2020
+Rule File Pathname: ./xControlFile
+X.22: Metal on poly is texted as both tied and floating (IP Level)
+r_1183_X.22
+0 0 2 Apr 13 11:37:19 2020
+Rule File Pathname: ./xControlFile
+X.22: Floating li1_float or li1_tie text not over li1
+r_1184_X.22
+0 0 2 Apr 13 11:37:19 2020
+Rule File Pathname: ./xControlFile
+X.22: li1 marked with li1_float not floating
+r_1185_X.22
+0 0 2 Apr 13 11:37:19 2020
+Rule File Pathname: ./xControlFile
+X.22: Nets on li1 is floating
+r_1186_X.22
+0 0 2 Apr 13 11:37:19 2020
+Rule File Pathname: ./xControlFile
+X.22: Metal on li1 is texted as both tied and floating (IP Level)
+r_1187_X.22
+0 0 2 Apr 13 11:38:34 2020
+Rule File Pathname: ./xControlFile
+X.22: Floating m1_float or m1_tie text not over met1
+r_1188_X.22
+0 0 2 Apr 13 11:38:34 2020
+Rule File Pathname: ./xControlFile
+X.22: met1 marked with m1_float not floating
+r_1189_X.22
+0 0 2 Apr 13 11:38:34 2020
+Rule File Pathname: ./xControlFile
+X.22: Nets on met1 is floating
+r_1190_X.22
+0 0 2 Apr 13 11:38:34 2020
+Rule File Pathname: ./xControlFile
+X.22: Metal on met1 is texted as both tied and floating (IP Level)
+r_1191_X.22
+0 0 2 Apr 13 11:39:51 2020
+Rule File Pathname: ./xControlFile
+X.22: Floating m2_float or m2_tie text not over met2
+r_1192_X.22
+0 0 2 Apr 13 11:39:51 2020
+Rule File Pathname: ./xControlFile
+X.22: met2 marked with m2_float not floating
+r_1193_X.22
+0 0 2 Apr 13 11:39:51 2020
+Rule File Pathname: ./xControlFile
+X.22: Nets on met2 is floating
+r_1194_X.22
+0 0 2 Apr 13 11:39:51 2020
+Rule File Pathname: ./xControlFile
+X.22: Metal on met2 is texted as both tied and floating (IP Level)
+r_1195_X.22
+0 0 2 Apr 13 11:40:16 2020
+Rule File Pathname: ./xControlFile
+X.22: Floating m3_float or m3_tie text not over met3
+r_1196_X.22
+0 0 2 Apr 13 11:40:16 2020
+Rule File Pathname: ./xControlFile
+X.22: met3 marked with m3_float not floating
+r_1197_X.22
+0 0 2 Apr 13 11:40:16 2020
+Rule File Pathname: ./xControlFile
+X.22: Nets on met3 is floating
+r_1198_X.22
+0 0 2 Apr 13 11:40:16 2020
+Rule File Pathname: ./xControlFile
+X.22: Metal on met3 is texted as both tied and floating (IP Level)
+r_1199_X.22
+0 0 2 Apr 13 11:40:17 2020
+Rule File Pathname: ./xControlFile
+X.22: Floating m4_float or m4_tie text not over met4
+r_1200_X.22
+0 0 2 Apr 13 11:40:17 2020
+Rule File Pathname: ./xControlFile
+X.22: met4 marked with m4_float not floating
+r_1201_X.22
+0 0 2 Apr 13 11:40:17 2020
+Rule File Pathname: ./xControlFile
+X.22: Nets on met4 is floating
+r_1202_X.22
+0 0 2 Apr 13 11:40:17 2020
+Rule File Pathname: ./xControlFile
+X.22: Metal on met4 is texted as both tied and floating (IP Level)
+r_1203_X.22
+0 0 2 Apr 13 11:40:17 2020
+Rule File Pathname: ./xControlFile
+X.22: Floating m5_float or m5_tie text not over met5
+r_1204_X.22
+0 0 2 Apr 13 11:40:17 2020
+Rule File Pathname: ./xControlFile
+X.22: met5 marked with m5_float not floating
+r_1205_X.22
+0 0 2 Apr 13 11:40:17 2020
+Rule File Pathname: ./xControlFile
+X.22: Nets on met5 is floating
+r_1206_X.22
+0 0 2 Apr 13 11:40:17 2020
+Rule File Pathname: ./xControlFile
+X.22: Metal on met5 is texted as both tied and floating (IP Level)
+r_1207_X.24
+0 0 2 Apr 13 11:40:18 2020
+Rule File Pathname: ./xControlFile
+X.24: condiode label must be in isolated pwell
+r_1208_pad.20
+0 0 2 Apr 13 11:40:18 2020
+Rule File Pathname: ./xControlFile
+pad.20: met1 shielding pad, must not float
+r_1209_pad.20
+0 0 2 Apr 13 11:40:18 2020
+Rule File Pathname: ./xControlFile
+pad.20: met1 shielding pad, must not connected to pad
+r_1210_m1.x.1
+0 0 2 Apr 13 11:40:19 2020
+Rule File Pathname: ./xControlFile
+m1.x.1: <70% metal density when 700x700 window 100% covered by mm1.waffledrop
+r_1211_m1.x.1
+0 0 2 Apr 13 11:40:19 2020
+Rule File Pathname: ./xControlFile
+m1.x.1: <65% metal density when 700x700 window 80-100% covered by mm1.waffledrop
+r_1212_m1.x.1
+0 0 2 Apr 13 11:40:19 2020
+Rule File Pathname: ./xControlFile
+m1.x.1: <60% metal density when 700x700 window 60-80% covered by mm1.waffledrop
+r_1213_m1.x.1
+0 0 2 Apr 13 11:40:19 2020
+Rule File Pathname: ./xControlFile
+m1.x.1: <50% metal density when 700x700 window 50-60% covered by mm1.waffledrop
+r_1214_m1.x.1
+0 0 2 Apr 13 11:40:19 2020
+Rule File Pathname: ./xControlFile
+m1.x.1: <40% metal density when 700x700 window 40-50% covered by mm1.waffledrop
+r_1215_m1.x.1
+0 0 2 Apr 13 11:40:19 2020
+Rule File Pathname: ./xControlFile
+m1.x.1: <30% metal density when 700x700 window 30-40% covered by mm1.waffledrop
+r_1216_m2.x.1
+0 0 2 Apr 13 11:40:20 2020
+Rule File Pathname: ./xControlFile
+m2.x.1: <70% metal density when 700x700 window 100% covered by mm2.waffledrop
+r_1217_m2.x.1
+0 0 2 Apr 13 11:40:20 2020
+Rule File Pathname: ./xControlFile
+m2.x.1: <65% metal density when 700x700 window 80-100% covered by mm2.waffledrop
+r_1218_m2.x.1
+0 0 2 Apr 13 11:40:20 2020
+Rule File Pathname: ./xControlFile
+m2.x.1: <60% metal density when 700x700 window 60-80% covered by mm2.waffledrop
+r_1219_m2.x.1
+0 0 2 Apr 13 11:40:20 2020
+Rule File Pathname: ./xControlFile
+m2.x.1: <50% metal density when 700x700 window 50-60% covered by mm2.waffledrop
+r_1220_m2.x.1
+0 0 2 Apr 13 11:40:20 2020
+Rule File Pathname: ./xControlFile
+m2.x.1: <40% metal density when 700x700 window 40-50% covered by mm2.waffledrop
+r_1221_m2.x.1
+0 0 2 Apr 13 11:40:20 2020
+Rule File Pathname: ./xControlFile
+m2.x.1: <30% metal density when 700x700 window 30-40% covered by mm2.waffledrop
+r_1222_m3.x.1
+0 0 2 Apr 13 11:40:20 2020
+Rule File Pathname: ./xControlFile
+m3.x.1: <70% metal density when 700x700 window 100% covered by mm3.waffledrop
+r_1223_m3.x.1
+0 0 2 Apr 13 11:40:20 2020
+Rule File Pathname: ./xControlFile
+m3.x.1: <65% metal density when 700x700 window 80-100% covered by mm3.waffledrop
+r_1224_m3.x.1
+0 0 2 Apr 13 11:40:20 2020
+Rule File Pathname: ./xControlFile
+m3.x.1: <60% metal density when 700x700 window 60-80% covered by mm3.waffledrop
+r_1225_m3.x.1
+0 0 2 Apr 13 11:40:20 2020
+Rule File Pathname: ./xControlFile
+m3.x.1: <50% metal density when 700x700 window 50-60% covered by mm3.waffledrop
+r_1226_m3.x.1
+0 0 2 Apr 13 11:40:20 2020
+Rule File Pathname: ./xControlFile
+m3.x.1: <40% metal density when 700x700 window 40-50% covered by mm3.waffledrop
+r_1227_m3.x.1
+0 0 2 Apr 13 11:40:20 2020
+Rule File Pathname: ./xControlFile
+m3.x.1: <30% metal density when 700x700 window 30-40% covered by mm3.waffledrop
+r_1228_m4.x.1
+0 0 2 Apr 13 11:40:21 2020
+Rule File Pathname: ./xControlFile
+m4.x.1: <70% metal density when 700x700 window 100% covered by mm4.waffledrop
+r_1229_m4.x.1
+0 0 2 Apr 13 11:40:21 2020
+Rule File Pathname: ./xControlFile
+m4.x.1: <65% metal density when 700x700 window 80-100% covered by mm4.waffledrop
+r_1230_m4.x.1
+0 0 2 Apr 13 11:40:21 2020
+Rule File Pathname: ./xControlFile
+m4.x.1: <60% metal density when 700x700 window 60-80% covered by mm4.waffledrop
+r_1231_m4.x.1
+0 0 2 Apr 13 11:40:21 2020
+Rule File Pathname: ./xControlFile
+m4.x.1: <50% metal density when 700x700 window 50-60% covered by mm4.waffledrop
+r_1232_m4.x.1
+0 0 2 Apr 13 11:40:21 2020
+Rule File Pathname: ./xControlFile
+m4.x.1: <40% metal density when 700x700 window 40-50% covered by mm4.waffledrop
+r_1233_m4.x.1
+0 0 2 Apr 13 11:40:21 2020
+Rule File Pathname: ./xControlFile
+m4.x.1: <30% metal density when 700x700 window 30-40% covered by mm4.waffledrop
+r_1234_metblk.1
+0 0 2 Apr 13 11:40:21 2020
+Rule File Pathname: ./xControlFile
+metblk.1: 0.14 min. spacing of met1 & met1Block
+r_1235_metblk.1
+0 0 2 Apr 13 11:40:21 2020
+Rule File Pathname: ./xControlFile
+metblk.1: met1 must not overlap met1Block
+r_1236_metblk.3
+0 0 2 Apr 13 11:40:23 2020
+Rule File Pathname: ./xControlFile
+metblk.3: 0.145 min. spacing of met1Block & met1Routing
+r_1237_metblk.1
+0 0 2 Apr 13 11:40:23 2020
+Rule File Pathname: ./xControlFile
+metblk.1: 0.14 min. spacing of met2 & met2Block
+r_1238_metblk.1
+0 0 2 Apr 13 11:40:23 2020
+Rule File Pathname: ./xControlFile
+metblk.1: met2 must not overlap met2Block
+r_1239_metblk.3
+0 0 2 Apr 13 11:40:23 2020
+Rule File Pathname: ./xControlFile
+metblk.3: 0.145 min. spacing of met2Block & met2Routing
+r_1240_metblk.1
+0 0 2 Apr 13 11:40:23 2020
+Rule File Pathname: ./xControlFile
+metblk.1: 0.3 min. spacing of met3 & met3Block
+r_1241_metblk.1
+0 0 2 Apr 13 11:40:23 2020
+Rule File Pathname: ./xControlFile
+metblk.1: met3 must not overlap met3Block
+r_1242_metblk.3
+0 0 2 Apr 13 11:40:23 2020
+Rule File Pathname: ./xControlFile
+metblk.3: 0.305 min. spacing of met3Block & met3Routing
+r_1243_metblk.1
+0 0 2 Apr 13 11:40:23 2020
+Rule File Pathname: ./xControlFile
+metblk.1: 0.3 min. spacing of met4 & met4Block
+r_1244_metblk.1
+0 0 2 Apr 13 11:40:23 2020
+Rule File Pathname: ./xControlFile
+metblk.1: met4 must not overlap met4Block
+r_1245_metblk.3
+0 0 2 Apr 13 11:40:23 2020
+Rule File Pathname: ./xControlFile
+metblk.3: 0.305 min. spacing of met4Block & met4Routing
+r_1246_metblk.1
+0 0 2 Apr 13 11:40:23 2020
+Rule File Pathname: ./xControlFile
+metblk.1: 1.6 min. spacing of met5 & met5Block
+r_1247_metblk.1
+0 0 2 Apr 13 11:40:23 2020
+Rule File Pathname: ./xControlFile
+metblk.1: met5 must not overlap met5Block
+r_1248_metblk.3
+0 0 2 Apr 13 11:40:23 2020
+Rule File Pathname: ./xControlFile
+metblk.3: 1.605 min. spacing of met5Block & met5Routing
+r_1249_metblk.2
+0 0 2 Apr 13 11:40:23 2020
+Rule File Pathname: ./xControlFile
+metblk.2: 0.17 min. spacing of li1 & li1Block
+r_1250_metblk.2
+0 0 2 Apr 13 11:40:23 2020
+Rule File Pathname: ./xControlFile
+metblk.2: li1 must not overlap li1Block
+r_1251_metblk.4
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+metblk.4: 0.17 min. spacing of li1Block & li1Routing
+r_1252_metblk.6
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+metblk.6: prBoundary.boundary not allowed in layout
+r_1253_metblk.7
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+metblk.7: poly.boundary not allowed in layout
+r_1254_metblk.7
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+metblk.7: diff.boundary not allowed in layout
+r_1255_metblk.7
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+metblk.7: tap.boundary not allowed in layout
+r_1256_fomdmy.1
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+fomdmy.1: 0.5 min. width of fomDummyDRC
+r_1257_fomdmy_1a
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+fomdmy_1a: max width of fom dummy 25.0
+r_1258_fomdmy.2
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+fomdmy.2: 0.4 min. spacing/notch of fomDummyDRC
+r_1259_fomdmy.4
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+fomdmy.4: 1 min. spacing of fomDummyDRC & SEALID
+r_1260_fomdmy.4
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+fomdmy.4: fomDummyDRC must not overlap SEALID
+r_1261_fomdmy.6
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+fomdmy.6: 3.25 min. spacing of fomDummyDRC & fuse
+r_1262_fomdmy.6
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+fomdmy.6: fomDummyDRC must not overlap fuse
+r_1263_fomdmy.7
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+fomdmy.7: 0.13 min. spacing of fomDummyDRC & nsdm
+r_1264_fomdmy.7
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+fomdmy.7: fomDummyDRC must not overlap nsdm
+r_1265_fomdmy.7
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+fomdmy.7: 0.13 min. spacing of fomDummyDRC & psdm
+r_1266_fomdmy.7
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+fomdmy.7: fomDummyDRC must not overlap psdm
+r_1267_fomdmy.8
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+fomdmy.8: 0.18 min. enclosure of fomDummyDRC by nwell
+r_1268_fomdmy.9
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+fomdmy.9: 0.34 min. spacing of fomDummyDRC & nwell
+r_1269_fomdmy.10
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+fomdmy.10: 0.43 min. enclosure of fomDummyDRC by HVnwell
+r_1270_fomdmy.11
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+fomdmy.11: 0.33 min. spacing of fomDummyDRC & HVnwell
+r_1271_fomdmy.12
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+fomdmy.12: 0.5 min. enclosure of fomDummyDRC by FRAMEID
+r_1272_fomdmy.13
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+fomdmy.13: 0.5 min. spacing of fomDummyDRC & dieCut
+r_1273_rdl.1
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+rdl.1: 10 min. width of rdl
+r_1274_rdl.2
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+rdl.2: 10 min. spacing/notch of rdl
+r_1275_rdl.2
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+rdl.2: 10 min. spacing/notch of rdl
+r_1276_rdl.3
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+rdl.3: 10.75 min. enclosure of pad by nonCSPRDL
+r_1277_rdl.4
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+rdl.4: 15 min. enclosure of rdl by SEALnoHoles_ORIGIN
+r_1278_rdl.5
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+rdl.5: (rdl OR ccu1m.mk) in scribe must not overlap areaid.ft.
+r_1279_rdl.6
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+rdl.6: 19.66 min. spacing of nonCSPRDL & pad
+r_1280_mf.1&2
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+mf.1&2: metal4 fuse should be rectangular
+r_1281_mf.1&2
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+mf.1&2: 0.8 min. width of metal4 fuse
+r_1282_mf.1&2
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+mf.1&2: 0.8 max. width of metal4 fuse
+r_1283_mf.1&2
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+mf.1&2: 7.2 min. length of metal4 fuse
+r_1284_mf.1&2
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+mf.1&2: 7.2 max. length of metal4 fuse
+r_1285_mf.3
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+mf.3: 2.75 min. spacing of target
+r_1286_mf.5
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+mf.5: 0.83 max extension of met4 beyond fuse boundary
+r_1287_mf.22
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+mf.22: 1.96 min. spacing of METxContact
+r_1288_mf.6
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+mf.6: 3.295 min. spacing of target & met1
+r_1289_mf.6
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+mf.6: target must not overlap met1
+r_1290_mf.7
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+mf.7: 3.295 min. spacing of target & li1
+r_1291_mf.7
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+mf.7: target must not overlap li1
+r_1292_mf.8
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+mf.8: 2.655 min. spacing of target & poly
+r_1293_mf.8
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+mf.8: target must not overlap poly
+r_1294_mf.9
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+mf.9: 2.635 min. spacing of target & tap
+r_1295_mf.9
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+mf.9: target must not overlap tap
+r_1296_mf.10
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+mf.10: 3.245 min. spacing of target & diff
+r_1297_mf.10
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+mf.10: target must not overlap diff
+r_1298_mf.11
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+mf.11: 3.315 min. spacing of target & nwell
+r_1299_mf.11
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+mf.11: target must not overlap nwell
+r_1300_mf.19
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+mf.19: 3.295 min. spacing of target & met2
+r_1301_mf.19
+0 0 2 Apr 13 11:40:25 2020
+Rule File Pathname: ./xControlFile
+mf.19: target must not overlap met2
+r_1302_mf.12
+0 0 2 Apr 13 11:40:26 2020
+Rule File Pathname: ./xControlFile
+mf.12: mf.12: 2.40x0.50 size of a fuse_shield
+r_1303_mf.4
+0 0 2 Apr 13 11:40:26 2020
+Rule File Pathname: ./xControlFile
+mf.4: 3.295 min. spacing of target & METnotFUSE
+r_1304_mf.13
+0 0 2 Apr 13 11:40:26 2020
+Rule File Pathname: ./xControlFile
+mf.13: 2.195 min. spacing of target & fuseShield
+r_1305_mf.14
+0 0 2 Apr 13 11:40:26 2020
+Rule File Pathname: ./xControlFile
+mf.14: max shield to target spacing
+r_1306_mf.15a
+0 0 2 Apr 13 11:40:26 2020
+Rule File Pathname: ./xControlFile
+mf.15a: fuseShield is allowed for non_isolated fuse edges ONLY
+r_1307_mf.15b
+0 0 2 Apr 13 11:40:26 2020
+Rule File Pathname: ./xControlFile
+mf.15b: fuseShield is required between peri metal and non isolated fuse edges
+r_1308_mf.18
+0 0 2 Apr 13 11:40:26 2020
+Rule File Pathname: ./xControlFile
+mf.18: 0.6 min&max space between fuse_shield and met4
+r_1309_mf.20
+0 0 2 Apr 13 11:40:26 2020
+Rule File Pathname: ./xControlFile
+mf.20: only one fuse allowed per metal line
+r_1310_mf.24
+0 0 2 Apr 13 11:40:26 2020
+Rule File Pathname: ./xControlFile
+mf.24: 3.295 min. spacing of target & met5
+r_1311_mf.24
+0 0 2 Apr 13 11:40:26 2020
+Rule File Pathname: ./xControlFile
+mf.24: target must not overlap met5
+r_1312_pad.1
+0 0 2 Apr 13 11:40:26 2020
+Rule File Pathname: ./xControlFile
+pad.1: padPL pcells should be used for bondpad
+r_1313_pad.1
+0 0 2 Apr 13 11:40:26 2020
+Rule File Pathname: ./xControlFile
+pad.1: padPL pcells should have text plastic to be used for bondpad
+r_1314_pad.16
+0 0 2 Apr 13 11:40:26 2020
+Rule File Pathname: ./xControlFile
+pad.16: Hermetic package pads are not supported inthis flow
+r_1315_pad.4/4a
+0 0 2 Apr 13 11:40:26 2020
+Rule File Pathname: ./xControlFile
+pad.4/4a: 2.7 min. enclosure of bondpadNormal by met5
+r_1316_pad.5
+0 0 2 Apr 13 11:40:26 2020
+Rule File Pathname: ./xControlFile
+pad.5: Zero Spacing between lower level met4 ring and Advanced Bondpad
+r_1317_pad.6
+0 0 2 Apr 13 11:40:29 2020
+Rule File Pathname: ./xControlFile
+pad.6: 5 min. spacing of smallGroupingY & met5OutsidePad
+r_1318_pad.7
+0 0 2 Apr 13 11:40:29 2020
+Rule File Pathname: ./xControlFile
+pad.7: 10 min. spacing of largeGroupingY & met5OutsidePad
+r_1319_pad.6
+0 0 2 Apr 13 11:40:30 2020
+Rule File Pathname: ./xControlFile
+pad.6: 5 min. spacing of smallGroupingX & met5OutsidePad
+r_1320_pad.7
+0 0 2 Apr 13 11:40:30 2020
+Rule File Pathname: ./xControlFile
+pad.7: 10 min. spacing of largeGroupingX & met5OutsidePad
+r_1321_pad.6
+0 0 2 Apr 13 11:40:30 2020
+Rule File Pathname: ./xControlFile
+pad.6: 5 min. spacing of smallGroupingY & met4OutsidePad
+r_1322_pad.7
+0 0 2 Apr 13 11:40:30 2020
+Rule File Pathname: ./xControlFile
+pad.7: 10 min. spacing of largeGroupingY & met4OutsidePad
+r_1323_pad.6
+0 0 2 Apr 13 11:40:30 2020
+Rule File Pathname: ./xControlFile
+pad.6: 5 min. spacing of smallGroupingX & met4OutsidePad
+r_1324_pad.7
+0 0 2 Apr 13 11:40:30 2020
+Rule File Pathname: ./xControlFile
+pad.7: 10 min. spacing of largeGroupingX & met4OutsidePad
+r_1325_pad.10
+0 0 2 Apr 13 11:40:30 2020
+Rule File Pathname: ./xControlFile
+pad.10: bondpadNormalNoprobe must not overlap met4
+r_1326_pad.11
+0 0 2 Apr 13 11:40:30 2020
+Rule File Pathname: ./xControlFile
+pad.11: Bondpad should not have 90 degree corner
+r_1327_pad.11
+0 0 2 Apr 13 11:40:30 2020
+Rule File Pathname: ./xControlFile
+pad.11: Bondpad should have 45 degree corner
+r_1328_pad.11
+0 0 2 Apr 13 11:40:30 2020
+Rule File Pathname: ./xControlFile
+pad.11: Bondpad should have only 4 45 degree corner
+r_1329_pad.11
+0 0 2 Apr 13 11:40:30 2020
+Rule File Pathname: ./xControlFile
+pad.11: Bondpad should have only 4 orthogonal edges
+r_1330_pad.12
+0 0 2 Apr 13 11:40:30 2020
+Rule File Pathname: ./xControlFile
+pad.12: 7.0 Min length of 45 degree bevel on Bond pad
+r_1331_pad.13
+0 0 2 Apr 13 11:40:30 2020
+Rule File Pathname: ./xControlFile
+pad.13: 8.8 Max length of 45 degree bevel on Bond pad
+r_1332_pad.14
+0 0 2 Apr 13 11:40:30 2020
+Rule File Pathname: ./xControlFile
+pad.14: 16.99 min. enclosure of anyPadPlastic by solid_seal
+r_1333_pad.15
+0 0 2 Apr 13 11:40:30 2020
+Rule File Pathname: ./xControlFile
+pad.15: 500.0 Max spacing between bondpad opening and edge of scribe line(outer end of seal ring)
+r_1334_pad.17
+0 0 2 Apr 13 11:40:31 2020
+Rule File Pathname: ./xControlFile
+pad.17: 1.5 min. spacing/notch of met1UndPadMetOnly
+r_1335_pad.18
+0 0 2 Apr 13 11:40:31 2020
+Rule File Pathname: ./xControlFile
+pad.18: 0.14 min width of met1 under pad metal
+r_1336_pad.17
+0 0 2 Apr 13 11:40:32 2020
+Rule File Pathname: ./xControlFile
+pad.17: 1.5 min. spacing/notch of met2UndPadMetOnly
+r_1337_pad.18
+0 0 2 Apr 13 11:40:32 2020
+Rule File Pathname: ./xControlFile
+pad.18: 0.14 min width of met2 under pad metal
+r_1338_pad.17
+0 0 2 Apr 13 11:40:32 2020
+Rule File Pathname: ./xControlFile
+pad.17: 1.5 min. spacing/notch of met3UndPadMetOnly
+r_1339_pad.18
+0 0 2 Apr 13 11:40:32 2020
+Rule File Pathname: ./xControlFile
+pad.18: 0.3 min width of met3 under pad metal
+r_1340_pad.19
+0 0 2 Apr 13 11:40:32 2020
+Rule File Pathname: ./xControlFile
+pad.19: 25 max width of met1 under pad metal
+r_1341_pad.19
+0 0 2 Apr 13 11:40:32 2020
+Rule File Pathname: ./xControlFile
+pad.19: 25 max width of met2 under pad metal
+r_1342_pad.19
+0 0 2 Apr 13 11:40:32 2020
+Rule File Pathname: ./xControlFile
+pad.19: 6 max width of met3 under pad metal
+r_1343_pad.2.1
+0 0 2 Apr 13 11:40:32 2020
+Rule File Pathname: ./xControlFile
+pad.2.1: 60 min width of padPLFP in x direction
+r_1344_pad.3.1
+0 0 2 Apr 13 11:40:32 2020
+Rule File Pathname: ./xControlFile
+pad.3.1: 60 min length of padPLFP in y direction
+r_1345_pad.4.1
+0 0 2 Apr 13 11:40:32 2020
+Rule File Pathname: ./xControlFile
+pad.4.1: 60 min width of padPLSTG in x direction
+r_1346_pad.5.1
+0 0 2 Apr 13 11:40:32 2020
+Rule File Pathname: ./xControlFile
+pad.5.1: 60 min length of padPLSTG in y direction
+r_1347_pad.6.1
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+pad.6.1: 60 min width of padPLHP in x direction
+r_1348_pad.6.1
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+pad.6.1: 60 min length of padPLHP in y direction
+r_1349_pad.6.1a
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+pad.6.1a: 58 min width of padPLHPcu in x direction
+r_1350_pad.6.1b
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+pad.6.1b: 60 min length of padPLHPcu in y direction
+r_1351_pad.6.1a/b
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+pad.6.1a/b: 58x60 min dimensions of padPLHPcu which are not within 50 of other pad
+r_1352_pad.7.1
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+pad.7.1: 50 min width of padPLWLBI in x direction
+r_1353_pad.8.1
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+pad.8.1: 60 min length of padPLWLBI in y direction
+r_1354_pad_2/3.1
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+pad_2/3.1: bondpadCuPillarSz should be rectangular
+r_1355_pad_2/3.1
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+pad_2/3.1: 39 min. width of bondpadCuPillarSz
+r_1356_pad_2/3.1
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+pad_2/3.1: 39 max. length of bondpadCuPillarSz
+r_1357_pad.1.2
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+pad.1.2: 8 min space of padPLFP in x direction to padPLFP/HP/STG/WLBI
+r_1358_pad.2.2
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+pad.2.2: 15 min space of padPLHPorg in x direction to padPLHP/STG/WLBI
+r_1359_pad.2.2a
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+pad.2.2a: 7 min space of padPLHPcu in x direction to padPLHPcu/STG/WLBI
+r_1360_pad.3.2
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+pad.3.2: 50 min space of padPLWLBI in x direction to padPLSTG/WLBI
+r_1361_pad.4.2
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+pad.4.2: 30 min space of padPLSTG in x direction to padPLSTG
+r_1362_pad.9.1
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+pad.9.1: 150.0um Max Width/Length of bond pad
+r_1363_pad_6_2
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+pad_6_2: 39.8 min. spacing of padCenterSTGinDieXy
+r_1364_pad_6_2
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+pad_6_2: 39.8 min. spacing of padCenterSTGinDieYy
+r_1365_pad_5_2_4
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+pad_5_2_4: 9 min. spacing of padSTGinDieXsp & bondPadSTG
+r_1366_pad.7.2.1
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+pad.7.2.1: 284 min space of padPLSTG in x direction to adjacent scribe
+r_1367_pad.7.2.2
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+pad.7.2.2: 200 min space of padPLFP in x direction to adjacent scribe
+r_1368_pad.7.2.2
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+pad.7.2.2: 200 min space of padPLWLBI in x direction to adjacent scribe
+r_1369_cupad.1
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+cupad.1: 5 min. width of pad opening inside inductor
+r_1370_cupad.2
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+cupad.2: 0 min. enclosure of pad opening inside inductor by pmm
+r_1371_cupad.2
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+cupad.2: pad opening inside inductor must be enclosed by pmm
+r_1372_cupad.3
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+cupad.3: 2.7 min. enclosure of pad opening inside inductor by met5
+r_1373_cupad.3
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+cupad.3: pad opening inside inductor must be enclosed by met5
+r_1374_cupad.4
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+cupad.4: 10.75 min. enclosure of pmm inside inductor by rdl
+r_1375_cupad.4
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+cupad.4: pmm inside inductor must be enclosed by rdl
+r_1376_scribe.5
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide diff >= 10.0x10.0um within 150.0 of scribe junction
+r_1377_scribe.5
+0 0 2 Apr 13 11:40:33 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide poly >= 10.0x10.0um within 150.0 of scribe junction
+r_1378_scribe.5
+0 0 2 Apr 13 11:40:35 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide li1 >= 10.0x10.0um within 150.0 of scribe junction
+r_1379_scribe.5
+0 0 2 Apr 13 11:40:36 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide met1 >= 10.0x10.0um within 150.0 of scribe junction
+r_1380_scribe.5
+0 0 2 Apr 13 11:40:37 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide met2 >= 10.0x10.0um within 150.0 of scribe junction
+r_1381_scribe.5
+0 0 2 Apr 13 11:40:37 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide met3 >= 10.0x10.0um within 150.0 of scribe junction
+r_1382_scribe.5
+0 0 2 Apr 13 11:40:38 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide mcon >= 10.0x10.0um within 150.0 of scribe junction
+r_1383_scribe.5
+0 0 2 Apr 13 11:40:38 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide licon1 >= 10.0x10.0um within 150.0 of scribe junction
+r_1384_scribe.5
+0 0 2 Apr 13 11:40:39 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide via >= 10.0x10.0um within 150.0 of scribe junction
+r_1385_scribe.5
+0 0 2 Apr 13 11:40:39 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide via2 >= 10.0x10.0um within 150.0 of scribe junction
+r_1386_scribe.5
+0 0 2 Apr 13 11:40:39 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide met4 >= 10.0x10.0um within 150.0 of scribe junction
+r_1387_scribe.5
+0 0 2 Apr 13 11:40:39 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide met5 >= 10.0x10.0um within 150.0 of scribe junction
+r_1388_scribe.5
+0 0 2 Apr 13 11:40:39 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide via3 >= 10.0x10.0um within 150.0 of scribe junction
+r_1389_scribe.5
+0 0 2 Apr 13 11:40:39 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide via4 >= 10.0x10.0um within 150.0 of scribe junction
+r_1390_scribe.5
+0 0 2 Apr 13 11:40:39 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide mm1mk >= 10.0x10.0um within 150.0 of scribe junction
+r_1391_scribe.5
+0 0 2 Apr 13 11:40:39 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide mm2mk >= 10.0x10.0um within 150.0 of scribe junction
+r_1392_scribe.5
+0 0 2 Apr 13 11:40:39 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide mm3mk >= 10.0x10.0um within 150.0 of scribe junction
+r_1393_scribe.5
+0 0 2 Apr 13 11:40:39 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide p1mmk >= 10.0x10.0um within 150.0 of scribe junction
+r_1394_scribe.5
+0 0 2 Apr 13 11:40:39 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide fommk >= 10.0x10.0um within 150.0 of scribe junction
+r_1395_scribe.5
+0 0 2 Apr 13 11:40:39 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide ctm1mk >= 10.0x10.0um within 150.0 of scribe junction
+r_1396_scribe.5
+0 0 2 Apr 13 11:40:39 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide licm1mk >= 10.0x10.0um within 150.0 of scribe junction
+r_1397_scribe.5
+0 0 2 Apr 13 11:40:39 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide li1mmk >= 10.0x10.0um within 150.0 of scribe junction
+r_1398_scribe.5
+0 0 2 Apr 13 11:40:39 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide vimmk >= 10.0x10.0um within 150.0 of scribe junction
+r_1399_scribe.5
+0 0 2 Apr 13 11:40:39 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide vim2mk >= 10.0x10.0um within 150.0 of scribe junction
+r_1400_scribe.5
+0 0 2 Apr 13 11:40:39 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide mm4mk >= 10.0x10.0um within 150.0 of scribe junction
+r_1401_scribe.5
+0 0 2 Apr 13 11:40:39 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide mm5mk >= 10.0x10.0um within 150.0 of scribe junction
+r_1402_scribe.5
+0 0 2 Apr 13 11:40:39 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide vim3mk >= 10.0x10.0um within 150.0 of scribe junction
+r_1403_scribe.5
+0 0 2 Apr 13 11:40:39 2020
+Rule File Pathname: ./xControlFile
+scribe.5: Wide vim4mk >= 10.0x10.0um within 150.0 of scribe junction
+r_1404_scribe.6a
+0 0 2 Apr 13 11:40:39 2020
+Rule File Pathname: ./xControlFile
+scribe.6a: pad inside frame or moduleCut without text label
+r_1405_scribe.6d
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.6d: mconOrVia must not overlap EUTESTPAD
+r_1406_scribe.6e
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.6e: EUTESTPAD must be enclosed by areaid module cut AND areaid etest
+r_1407_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: nwell drawn layer cannot straddle areaid:ModuleCut
+r_1408_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: diff drawn layer cannot straddle areaid:ModuleCut
+r_1409_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: dnwell drawn layer cannot straddle areaid:ModuleCut
+r_1410_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: tap drawn layer cannot straddle areaid:ModuleCut
+r_1411_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: lvtn drawn layer cannot straddle areaid:ModuleCut
+r_1412_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: hvtp drawn layer cannot straddle areaid:ModuleCut
+r_1413_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: hvi drawn layer cannot straddle areaid:ModuleCut
+r_1414_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: tunm drawn layer cannot straddle areaid:ModuleCut
+r_1415_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: poly drawn layer cannot straddle areaid:ModuleCut
+r_1416_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: npc drawn layer cannot straddle areaid:ModuleCut
+r_1417_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: nsdm drawn layer cannot straddle areaid:ModuleCut
+r_1418_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: psdm drawn layer cannot straddle areaid:ModuleCut
+r_1419_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: licon1 drawn layer cannot straddle areaid:ModuleCut
+r_1420_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: li1 drawn layer cannot straddle areaid:ModuleCut
+r_1421_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: mcon drawn layer cannot straddle areaid:ModuleCut
+r_1422_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: met1 drawn layer cannot straddle areaid:ModuleCut
+r_1423_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: via drawn layer cannot straddle areaid:ModuleCut
+r_1424_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: met2 drawn layer cannot straddle areaid:ModuleCut
+r_1425_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: vhvi drawn layer cannot straddle areaid:ModuleCut
+r_1426_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: via2 drawn layer cannot straddle areaid:ModuleCut
+r_1427_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: met3 drawn layer cannot straddle areaid:ModuleCut
+r_1428_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: via3 drawn layer cannot straddle areaid:ModuleCut
+r_1429_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: met4 drawn layer cannot straddle areaid:ModuleCut
+r_1430_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: via4 drawn layer cannot straddle areaid:ModuleCut
+r_1431_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: met5 drawn layer cannot straddle areaid:ModuleCut
+r_1432_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: nsm drawn layer cannot straddle areaid:ModuleCut
+r_1433_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: pad drawn layer cannot straddle areaid:ModuleCut
+r_1434_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: ldntm drawn layer cannot straddle areaid:ModuleCut
+r_1435_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: hvntm drawn layer cannot straddle areaid:ModuleCut
+r_1436_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: pmm drawn layer cannot straddle areaid:ModuleCut
+r_1437_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: pnp drawn layer cannot straddle areaid:ModuleCut
+r_1438_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: capacitor drawn layer cannot straddle areaid:ModuleCut
+r_1439_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: ncm drawn layer cannot straddle areaid:ModuleCut
+r_1440_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: pmm2 drawn layer cannot straddle areaid:ModuleCut
+r_1441_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: inductor drawn layer cannot straddle areaid:ModuleCut
+r_1442_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: rdl drawn layer cannot straddle areaid:ModuleCut
+r_1443_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: rpm drawn layer cannot straddle areaid:ModuleCut
+r_1444_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: hvtr drawn layer cannot straddle areaid:ModuleCut
+r_1445_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: ubm drawn layer cannot straddle areaid:ModuleCut
+r_1446_scribe.7
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.7: bump drawn layer cannot straddle areaid:ModuleCut
+r_1447_scribe.8
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.8: Etest-pad-67 and Etest-pad-35 should not exist in the same module
+r_1448_scribe.9
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.9: Etest pad Width and Length is either 67.00 um or 35.00um
+r_1449_scribe.10
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.10: Min/Max Spacing between Etest pad (67um*67um) with in same module should be 90.5um
+r_1450_scribe.10
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.10: Min/MaxSpacing between Etest pad (67um*67um)with in same module should be 90.5um
+r_1451_scribe.11
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.11: Min/Max Spacing between Etest pad (35um*35um) with in same module should be 55um
+r_1452_scribe.11
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.11: Min/MaxSpacing between Etest pad (35um*35um)with in same module should be 55um
+r_1453_scribe.12
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.12: 7.5 min. enclosure of ETESTPAD by areaid module cut
+r_1454_scribe.13
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.13: 2.50um min. enclosure of Etest pad by met1
+r_1455_scribe.13
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.13: 2.5 min. enclosure of ETESTPAD_met1 by met1
+r_1456_scribe.13
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.13: 2.50um min. enclosure of Etest pad by met2
+r_1457_scribe.13
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.13: 2.5 min. enclosure of ETESTPAD_met2 by met2
+r_1458_scribe.13
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.13: 2.50um min. enclosure of Etest pad by met3
+r_1459_scribe.13
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.13: 2.5 min. enclosure of ETESTPAD_met3 by met3
+r_1460_scribe.13
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.13: 2.50um min. enclosure of Etest pad by met4
+r_1461_scribe.13
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.13: 2.5 min. enclosure of ETESTPAD_met4 by met4
+r_1462_scribe.13
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.13: 2.50um min. enclosure of Etest pad by met5
+r_1463_scribe.13
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.13: 2.5 min. enclosure of ETESTPAD_met5 by met5
+r_1464_scribe.14
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.14: Minimum Utest pad Width and Length is 10um
+r_1465_scribe.15
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.15: Min Spacing between Utest pad opening should be 15um
+r_1466_scribe.16
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.16: Min Spacing between Utest pad and Etest pad opening should be 7um
+r_1467_scribe.17
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.17: 2.5 min. enclosure of UTESTPAD by met5
+r_1468_scribe.18
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.18: Spacing of E-test pad opening to E-test pad opening in the same module must all be equal
+r_1469_scribe.18
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.18: Spacing of E-test pad opening to E-test pad opening in the same module must all be equal
+r_1470_scribe.19
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.19: 76 min. width of realScribeLine
+r_1471_scribe.20
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.20: Pad.dg is to be drawn from 3.0um from scribe edge to 13.0um from scribe edge
+r_1472_scribe.21
+0 0 2 Apr 13 11:40:40 2020
+Rule File Pathname: ./xControlFile
+scribe.21: Scribe must not enclose pdm.dg nor pdm.mk except for etest pads, die pad rings
+r_733_capm.x.1
+0 0 2 Apr 13 11:40:49 2020
+Rule File Pathname: ./xControlFile
+capm.x.1: ccapm mask should not be used
+r_734_capm.1
+0 0 2 Apr 13 11:40:49 2020
+Rule File Pathname: ./xControlFile
+capm.1: 1 min. width of capm
+r_735_capm.2a
+0 0 2 Apr 13 11:40:49 2020
+Rule File Pathname: ./xControlFile
+capm.2a: 0.84 min. spacing/notch of capm
+r_736_capm.2b
+0 0 2 Apr 13 11:40:49 2020
+Rule File Pathname: ./xControlFile
+capm.2b: 1.2 min spacing between bottom plates
+r_737_capm.2b
+0 0 2 Apr 13 11:40:49 2020
+Rule File Pathname: ./xControlFile
+capm.2b: 1.2 min. spacing of m3_bot_plate
+r_738_capm.3
+0 0 2 Apr 13 11:40:49 2020
+Rule File Pathname: ./xControlFile
+capm.3: 0.14 min. enclosure of capm by met3
+r_739_capm.4
+0 0 2 Apr 13 11:40:49 2020
+Rule File Pathname: ./xControlFile
+capm.4: 0.14 min. enclosure of via3 by capm
+r_740_capm.5
+0 0 2 Apr 13 11:40:49 2020
+Rule File Pathname: ./xControlFile
+capm.5: 0.14 min. spacing of capm & via3
+r_741_capm.6
+0 0 2 Apr 13 11:40:49 2020
+Rule File Pathname: ./xControlFile
+capm.6: Maximum aspect ratio (L/W) is 20.00
+r_742_capm.7
+0 0 2 Apr 13 11:40:49 2020
+Rule File Pathname: ./xControlFile
+capm.7: Only Rectangular or L-shape Capacitors allowed
+r_743_capm.8
+0 0 2 Apr 13 11:40:49 2020
+Rule File Pathname: ./xControlFile
+capm.8: 0.14 min. spacing of capm & via2
+r_744_capm.8
+0 0 2 Apr 13 11:40:49 2020
+Rule File Pathname: ./xControlFile
+capm.8: capm must not overlap via2
+r_745_capm.9
+0 0 2 Apr 13 11:40:49 2020
+Rule File Pathname: ./xControlFile
+capm.9: capm must be enclosed by met3
+r_745_capm.11
+0 0 2 Apr 13 11:40:49 2020
+Rule File Pathname: ./xControlFile
+capm.11: min spacing of capm and met3 not overlapping capm
+r_746_cap2m.1
+0 0 2 Apr 13 11:40:50 2020
+Rule File Pathname: ./xControlFile
+cap2m.1: 1 min. width of cap2m
+r_747_cap2m.2a
+0 0 2 Apr 13 11:40:50 2020
+Rule File Pathname: ./xControlFile
+cap2m.2a: 0.84 min. spacing/notch of cap2m
+r_748_cap2m.2b
+0 0 2 Apr 13 11:40:50 2020
+Rule File Pathname: ./xControlFile
+cap2m.2b: 1.2 min spacing between m4 bottom plates
+r_749_cap2m.2b
+0 0 2 Apr 13 11:40:50 2020
+Rule File Pathname: ./xControlFile
+cap2m.2b: 1.2 min. spacing of m4_bot_plate
+r_750_cap2m.3
+0 0 2 Apr 13 11:40:50 2020
+Rule File Pathname: ./xControlFile
+cap2m.3: 0.14 min. enclosure of cap2m by met4
+r_751_cap2m.4
+0 0 2 Apr 13 11:40:50 2020
+Rule File Pathname: ./xControlFile
+cap2m.4: 0.20 min. enclosure of via4 by cap2m
+r_752_cap2m.5
+0 0 2 Apr 13 11:40:50 2020
+Rule File Pathname: ./xControlFile
+cap2m.5: 0.20 min. spacing of cap2m & via4
+r_753_cap2m.6
+0 0 2 Apr 13 11:40:50 2020
+Rule File Pathname: ./xControlFile
+cap2m.6: Maximum aspect ratio (L/W) is 20.00
+r_754_cap2m.7
+0 0 2 Apr 13 11:40:50 2020
+Rule File Pathname: ./xControlFile
+cap2m.7: Only Rectangular or L-shape Capacitors allowed
+r_755_cap2m.8
+0 0 2 Apr 13 11:40:50 2020
+Rule File Pathname: ./xControlFile
+cap2m.8: 0.14 min. spacing of cap2m & via3
+r_756_cap2m.8
+0 0 2 Apr 13 11:40:50 2020
+Rule File Pathname: ./xControlFile
+cap2m.8: cap2m must not overlap via3
+r_756_cap2m.11
+0 0 2 Apr 13 11:40:50 2020
+Rule File Pathname: ./xControlFile
+cap2m.11: min spacing of cap2m and met4 not overlapping cap2m
+r_836_viatop.1
+0 0 2 Apr 13 11:40:58 2020
+Rule File Pathname: ./xControlFile
+viatop.1: viatop should be rectangular
+r_837_viatop.1
+0 0 2 Apr 13 11:40:58 2020
+Rule File Pathname: ./xControlFile
+viatop.1: 0.42 min. width of viatop
+r_838_viatop.1
+0 0 2 Apr 13 11:40:58 2020
+Rule File Pathname: ./xControlFile
+viatop.1: 0.42 max. length of viatop
+r_839_viatop_2
+0 0 2 Apr 13 11:40:58 2020
+Rule File Pathname: ./xControlFile
+viatop_2: 0.42 min. spacing/notch of viatop
+r_840_viatop.3
+0 0 2 Apr 13 11:40:58 2020
+Rule File Pathname: ./xControlFile
+viatop.3: Only min square ViaTop's are allowed
+r_841_viatop.4
+0 0 2 Apr 13 11:40:58 2020
+Rule File Pathname: ./xControlFile
+viatop.4: 0.29 min. enclosure of viatop by met5
+r_842_viatop.4
+0 0 2 Apr 13 11:40:58 2020
+Rule File Pathname: ./xControlFile
+viatop.4: viatop must be enclosed by met5
+r_843_viatop.5
+0 0 2 Apr 13 11:40:58 2020
+Rule File Pathname: ./xControlFile
+viatop.5: ViaTop must not be placed over Pad
+r_844_viatop_6
+0 0 2 Apr 13 11:40:58 2020
+Rule File Pathname: ./xControlFile
+viatop_6: 10.00 min. spacing of viatop to pad
+r_845_viatop_7
+0 0 2 Apr 13 11:40:58 2020
+Rule File Pathname: ./xControlFile
+viatop_7: viatop connected to gate must be connected to antenna diode
+r_1473_chvtpm.1
+0 0 2 Apr 13 11:40:58 2020
+Rule File Pathname: ./xControlFile
+chvtpm.1: 0.38 min. width of CLHVTPM
+r_1474_chvtpm.2a
+0 0 2 Apr 13 11:40:58 2020
+Rule File Pathname: ./xControlFile
+chvtpm.2a: 0.38 min. spacing/notch of CLHVTPM
+r_1475_chvtpm.3
+0 0 2 Apr 13 11:40:58 2020
+Rule File Pathname: ./xControlFile
+chvtpm.3: 0 min. enclosure of ((LVnwell not overlapping Var_channel) NOT lvtn) by CLHVTPM
+r_1476_chvtpm.4
+0 0 2 Apr 13 11:40:58 2020
+Rule File Pathname: ./xControlFile
+chvtpm.4: 0 min. enclosure of ((LVnwell overlapping Var_channel) AND hvtp) by CLHVTPM
+r_1477_clvtnm.1
+0 0 2 Apr 13 11:40:59 2020
+Rule File Pathname: ./xControlFile
+clvtnm.1: 0.38 min. width of clvtnm in periphery
+r_1478_clvtnm.2
+0 0 2 Apr 13 11:40:59 2020
+Rule File Pathname: ./xControlFile
+clvtnm.2: 0.38 min. spacing/notch of CLLVTNM
+r_1479_cntm.2
+0 0 2 Apr 13 11:41:02 2020
+Rule File Pathname: ./xControlFile
+cntm.2: 0.7 min. spacing/notch of CLNTM
+r_1480_cntm.1
+2 2 2 Apr 13 11:41:02 2020
+Rule File Pathname: ./xControlFile
+cntm.1: 0.84 min. width of CLNTM
+p 1 4
+CN striVe c 1 0 0 1 0 0
+870395 2243625
+871228 2243625
+870640 2244225
+870395 2244225
+p 2 4
+CN striVe c 1 0 0 1 0 0
+879552 2243625
+880365 2243625
+880365 2244225
+880140 2244225
+r_1481_cntm.3
+0 0 2 Apr 13 11:41:02 2020
+Rule File Pathname: ./xControlFile
+cntm.3: 0 min. enclosure of nwell by CLNTM
+r_1482_cntm.3
+0 0 2 Apr 13 11:41:02 2020
+Rule File Pathname: ./xControlFile
+cntm.3: nwell must be enclosed by CLNTM
+r_1483_cntm.4a
+0 0 2 Apr 13 11:41:02 2020
+Rule File Pathname: ./xControlFile
+cntm.4a: 0 min. enclosure of hvitmp by CLNTM
+r_1484_cntm.4a
+0 0 2 Apr 13 11:41:02 2020
+Rule File Pathname: ./xControlFile
+cntm.4a: hvitmp must be enclosed by CLNTM
+r_1485_cntm.7
+0 0 2 Apr 13 11:41:02 2020
+Rule File Pathname: ./xControlFile
+cntm.7: 0 min. enclosure of ldntm by CLNTM
+r_1486_cntm.7
+0 0 2 Apr 13 11:41:02 2020
+Rule File Pathname: ./xControlFile
+cntm.7: ldntm must be enclosed by CLNTM
+r_1487_chvntm.1
+0 0 2 Apr 13 11:41:04 2020
+Rule File Pathname: ./xControlFile
+chvntm.1: 0.7 min. width of CLHVNTM
+r_1488_chvntm.2a
+0 0 2 Apr 13 11:41:04 2020
+Rule File Pathname: ./xControlFile
+chvntm.2a: 0.7 min. spacing/notch of CLHVNTM
+r_1489_chvntm.4
+0 0 2 Apr 13 11:41:04 2020
+Rule File Pathname: ./xControlFile
+chvntm.4: 0.185 min. spacing of CLHVNTM & NDIFFnoHV
+r_1490_chvntm.4
+0 0 2 Apr 13 11:41:04 2020
+Rule File Pathname: ./xControlFile
+chvntm.4: CLHVNTM must not overlap NDIFFnoHV
+r_1491_chvntm.5
+0 0 2 Apr 13 11:41:04 2020
+Rule File Pathname: ./xControlFile
+chvntm.5: 0.185 min. spacing of CLHVNTM & PDIFF_noENID
+r_1492_chvntm.5
+0 0 2 Apr 13 11:41:04 2020
+Rule File Pathname: ./xControlFile
+chvntm.5: CLHVNTM must not overlap PDIFF_noENID
+r_1493_chvntm.3
+0 0 2 Apr 13 11:41:04 2020
+Rule File Pathname: ./xControlFile
+chvntm.3: 0.185 Min Enclosure of ndiff inside hvi by chvntm
+r_1494_chvntm.6a
+0 0 2 Apr 13 11:41:04 2020
+Rule File Pathname: ./xControlFile
+chvntm.6a: 0.185 min. spacing of CLHVNTM & p+tap (except along the diff butting edge)
+r_1495_chvntm.6a
+0 0 2 Apr 13 11:41:04 2020
+Rule File Pathname: ./xControlFile
+chvntm.6a: CLHVNTM must not overlap ptap
+r_1496_chvntm.6b
+0 0 2 Apr 13 11:41:04 2020
+Rule File Pathname: ./xControlFile
+chvntm.6b: CLHVNTM must not overlap p+diff along diff butting edge (ESDnWellTap excluded)
+r_1497_chvntm.7
+0 0 2 Apr 13 11:41:04 2020
+Rule File Pathname: ./xControlFile
+chvntm.7: ESDnWellTapHV must be enclosed by CLHVNTM
+DENSITY_RDBS
+0 0 24 Apr 13 11:41:05 2020
+mm1_70_window_700_err.rdb 0
+mm1_65_window_700_err.rdb 0
+mm1_60_window_700_err.rdb 0
+mm1_50_window_700_err.rdb 0
+mm1_40_window_700_err.rdb 0
+mm1_30_window_700_err.rdb 0
+mm2_70_window_700_err.rdb 0
+mm2_65_window_700_err.rdb 0
+mm2_60_window_700_err.rdb 0
+mm2_50_window_700_err.rdb 0
+mm2_40_window_700_err.rdb 0
+mm2_30_window_700_err.rdb 0
+mm3_70_window_700_err.rdb 0
+mm3_65_window_700_err.rdb 0
+mm3_60_window_700_err.rdb 0
+mm3_50_window_700_err.rdb 0
+mm3_40_window_700_err.rdb 0
+mm3_30_window_700_err.rdb 0
+mm4_70_window_700_err.rdb 0
+mm4_65_window_700_err.rdb 0
+mm4_60_window_700_err.rdb 0
+mm4_50_window_700_err.rdb 0
+mm4_40_window_700_err.rdb 0
+mm4_30_window_700_err.rdb 0
